jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Commit Graph

  • bdb8fec295 - added jens 2021-03-21 11:37:55 +00:00
  • 73cfd45401 - added jens 2021-03-21 11:31:55 +00:00
  • 5309734167 - added jens 2021-03-21 11:25:09 +00:00
  • 55ee041c08 - added jens 2021-03-21 11:14:50 +00:00
  • e3aeadebf5 - added jens 2021-03-21 11:09:13 +00:00
  • b06e84a2b7 - added jens 2021-03-21 11:06:59 +00:00
  • 0a2abde8bf - added jens 2021-03-21 11:05:13 +00:00
  • 097032e4d5 - added jens 2021-03-21 11:01:11 +00:00
  • d61b3c2e0c - added jens 2021-03-21 10:58:54 +00:00
  • 5af1242330 - added mac jens 2021-03-21 10:51:05 +00:00
  • ea60299d26 - added jens 2021-03-21 10:47:01 +00:00
  • 32440f7db9 moved jens 2021-03-21 10:46:11 +00:00
  • 00ae5a7810 - added cordic jens 2021-03-21 10:37:40 +00:00
  • 67d79572d7 - added ac97 Controller jens 2021-03-21 09:07:16 +00:00
  • c24915c0ba - target run only runs simmulation without dumping anything for wave - target wave runs with file dump for GTKwave jens 2021-03-20 12:15:14 +00:00
  • 808f924277 - added FST jens 2021-03-20 09:18:11 +00:00
  • 2650ac571e - run for 1500 us jens 2021-03-20 09:07:13 +00:00
  • 503a275b6f - fixed GHDL warnings jens 2021-03-20 08:55:13 +00:00
  • df5ede51c2 - use either VCD or GHW for sim and run jens 2021-03-20 08:55:00 +00:00
  • 398b9be4c1 - load GHW and GTKW jens 2021-03-20 08:17:04 +00:00
  • 82f44a02c8 - removed GHDL warnings jens 2021-03-20 08:16:40 +00:00
  • 3302a57d0c - added GCC flags jens 2021-03-19 18:42:48 +00:00
  • a7deab4d4b - added time-resolution - added ignore jens 2021-03-19 18:11:30 +00:00
  • 6f7fa8bd78 - added anaborate target jens 2021-03-19 17:47:24 +00:00
  • 7cf6386cff - added mips package - let tb end with assertion jens 2021-03-19 15:37:38 +00:00
  • 0404c24bdc - added ghdl jens 2021-03-19 15:34:19 +00:00
  • 356125d58d - also write vcd jens 2021-03-19 15:23:16 +00:00
  • 3846de5ae3 - moved to ghdl jens 2021-03-19 14:44:53 +00:00
  • bfbed487d5 - fixed jasm jens 2021-03-19 14:41:08 +00:00
  • 697150b619 - reduced verbosity jens 2021-03-19 13:35:58 +00:00
  • ea06df8e15 - added jens 2021-03-19 13:35:22 +00:00
  • 201c5d54de - fixed path jens 2021-03-19 13:35:03 +00:00
  • 9cf0030fe8 - fixed jasm to use with ruby > v1.9 jens 2021-03-19 13:28:03 +00:00
  • 73452b0abc - prepared synth target jens 2021-03-19 11:42:32 +00:00
  • 5743284dbf - moved Makefile jens 2021-03-19 11:14:51 +00:00
  • 9d6ff5fa17 - added makefiles for GHDL jens 2021-03-19 11:07:39 +00:00
  • c5d7d2fe3b - fixed issues with GHDL - fixed not closing file jens 2021-03-19 11:06:38 +00:00
  • 88975a56a0 - added GHDL make stuff jens 2021-03-19 11:05:04 +00:00
  • f84cdc7e6b - automatically build netlist in /lib/MIPS/syn - fixed path to bootloader ROM jens 2021-03-18 16:34:29 +00:00
  • 3419540ef7 [DE0-Nano] - use PLL clock output for feed back jens 2017-02-05 11:24:50 +00:00
  • 35c1a4e010 [DE0-Nano] - derive sys_clk from PLL jens 2017-02-05 11:10:29 +00:00
  • 364a66b1d3 - refactored clockgen for De0-nano jens 2017-02-05 10:47:45 +00:00
  • 43e83aa8df [MIPS/ml402] - fixed bootloader path jens 2017-02-04 17:25:06 +00:00
  • e6767de381 [J-MIPS] - I/D-Cache added input registers for data fetch jens 2017-02-04 15:43:28 +00:00
  • 3fdaeaed48 [J-MIPS] - D-Cache improved flush - I-Cache improved flush jens 2017-02-04 10:16:49 +00:00
  • 46e8e2d093 [DE0-Nano] - added dip switches jens 2017-01-28 10:08:56 +00:00
  • 7a62a6f245 - moved to mips software jens 2017-01-24 17:09:35 +00:00
  • 58b7ca02dd - deleted jens 2017-01-24 17:02:21 +00:00
  • b182c161b0 [J-MIPS] - fixed D-Cache invalidate-at - D-Cache improved flush - I-Cache improved flush jens 2017-01-23 05:14:05 +00:00
  • dd930a0530 - increased sim time jens 2017-01-23 05:12:47 +00:00
  • cb25248c3f [DE0-Nano] - increased CPU reset duration jens 2017-01-20 18:41:25 +00:00
  • 8043f0b373 - mips_cop: SR.IEC can also be written in user mode jens 2017-01-20 18:40:50 +00:00
  • d5c30504ac [DE0-Nano] - use dedicated bootloader jens 2017-01-18 23:35:47 +00:00
  • 9e5fa1c972 - fixed uart sim jens 2017-01-18 22:25:53 +00:00
  • 087210ce5c [DE0-Nano] - cleaned up top level - removed jtag regs - added SPI clk to SDC jens 2017-01-15 13:18:04 +00:00
  • ee807ecdc8 [BB-FIFO] - improved TB jens 2017-01-15 12:14:40 +00:00
  • 76c81bff41 [DE0-Nano] - changed default hex file jens 2017-01-12 16:33:32 +00:00
  • 5a2a217622 [DE0-Nano] - added POR for CPU - UART set to 460800 baud and added more FIFO depth jens 2017-01-12 02:54:47 +00:00
  • 6e9407ef79 [DE0-Nano] - reduce hard coded numbers jens 2017-01-11 08:09:41 +00:00
  • 652dfe00a2 [Uart_wb] - fixed: f_sysclk is in MHz jens 2017-01-11 08:08:40 +00:00
  • 7f91449b94 [DE0-Nano] - added 2nd uart jens 2017-01-07 15:34:40 +00:00
  • 84363d2734 [J-Uart] - fixed receiver jens 2017-01-05 10:56:59 +00:00
  • 9d420b16d4 [ml402::mips_sys] - use jUart jens 2017-01-04 18:26:52 +00:00
  • cb8367c67a [DE0-Nano] - reduce uart buffer to introduce more delay (work around for bus timeout) jens 2016-12-21 21:14:07 +00:00
  • ab321735e8 [J-Uart] - fixed generic jens 2016-12-21 20:36:09 +00:00
  • aefed52167 [DE0-Nano] - fixed uart jens 2016-12-21 19:58:45 +00:00
  • 9a188d8b8a [J-Uart] - use LSB first for UART - Uart_wb: added generic for default baudrate and fifo depth jens 2016-12-21 19:58:11 +00:00
  • e76ab469ca [Mips@DE0-Nano] - use JUART jens 2016-12-20 23:12:49 +00:00
  • 3bfefe621d [UART] - cleaned up jens 2016-12-20 22:49:15 +00:00
  • 2440831a07 [UART] - cleaned up jens 2016-12-20 22:48:31 +00:00
  • 26ffec7f49 [UART] - composed uart from uart_tx and uart_rx - tb_uart tests uart jens 2016-12-20 22:46:48 +00:00
  • c5d08ec384 [UART] - added UART with FIFO jens 2016-12-20 20:36:04 +00:00
  • e4da80768a [JUART] - renamed ports jens 2016-12-20 19:14:21 +00:00
  • 82a500a99b [JUART] - renamed ports jens 2016-12-20 19:09:45 +00:00
  • 9522e9e22e [BB-FIFO] - fixed full and half full jens 2016-12-20 18:30:10 +00:00
  • b8b6cfcd81 [BB-FIFO] - renamed ports - added quick 'n dirty half full jens 2016-12-19 18:55:37 +00:00
  • 4cd0065434 [BB-FIFO] - even nicer jens 2016-12-19 18:36:04 +00:00
  • f1c3a17fa8 [BB-FIFO] - now working jens 2016-12-19 18:26:15 +00:00
  • 58dcfb0ea1 git-svn-id: http://moon:8086/svn/vhdl/trunk@1346 cc03376c-175c-47c8-b038-4cd826a8556b jens 2016-12-18 11:20:05 +00:00
  • b1156e2163 [JUART] - better BAUD_DIV jens 2016-12-18 10:37:05 +00:00
  • 0300be76ce [JUART] - self checking TB with incremented data jens 2016-12-18 10:33:51 +00:00
  • 262d045890 [JUART] - fixed RX incorrect behavior with BAUD_DIV > 1 - added baud rate generator to TB - added TB with TX and RX jens 2016-12-18 10:13:12 +00:00
  • f7af661eda [Uart] - no auto reload for idle count - removed hard coded numbers jens 2016-12-18 00:12:24 +00:00
  • 3638a97abf - added J-UART jens 2016-12-17 17:54:33 +00:00
  • c8567cfede [mips_de0_nano] - initial import jens 2016-11-26 14:43:26 +00:00
  • 8d2c3bc81b - use bootloader_flash jens 2016-08-15 07:44:09 +00:00
  • a39f16486e - added jens 2016-07-28 06:45:50 +00:00
  • d4be0af140 - added jens 2016-07-28 06:44:49 +00:00
  • c78f82dd05 [MIPS] - added MMU (Zwischenstand) jens 2016-07-27 06:26:54 +00:00
  • 919293cab2 - added promgen - use Cclk as startup clock jens 2015-12-13 14:49:20 +00:00
  • b5bf49af28 [DDC] - changed frequencies and adjusted CIC bit depths jens 2015-12-13 13:19:37 +00:00
  • 9b50ec6a5b - test both 100 Mbps and 1000 Mbps jens 2015-12-13 13:18:35 +00:00
  • 5d542e783b [Mips_sys] - added GMII clock gen jens 2015-12-13 13:12:56 +00:00
  • a6fe149b7a - fixed Gibabit ethernet jens 2015-12-13 09:10:28 +00:00
  • 3897393a94 - set filter gain to unity jens 2015-10-25 10:03:56 +00:00
  • eafe4bf00d - added jens 2015-10-25 09:50:25 +00:00
  • a61b69bd79 - added jens 2015-10-25 09:44:51 +00:00
  • d516ec5004 - deleted jens 2015-10-25 08:23:27 +00:00
  • d2c79c26d0 deleted jens 2015-10-25 08:16:34 +00:00
  • 47e7daee7d - fixed renamed package inclusion - fixed problems after fixed_pkg update: explicit set round and saturation mode in Cordic and CIC jens 2015-10-24 16:14:54 +00:00