- added promgen

- use Cclk as startup clock git-svn-id: http://moon:8086/svn/vhdl/trunk@1335 cc03376c-175c-47c8-b038-4cd826a8556b
2015-12-13 14:49:20 +00:00
parent b5bf49af28
commit 919293cab2
2 changed files with 6 additions and 1 deletions
@@ -12,6 +12,7 @@ translate: $(PRJ).ngd
 map: $(PRJ)_map.ncd
 par: $(PRJ).ncd
 bit: $(PRJ).bit
+prom : $(PRJ).mcs
 timing : $(PRJ).twr

 # Netlist
@@ -38,6 +39,10 @@ $(PRJ).twr: $(PRJ).ncd $(PRJ).pcf ./project/$(PRJ).ucf
 $(PRJ).bit: $(PRJ).ncd ./project/$(PRJ).ut
 	bitgen -intstyle xflow -f ./project/$(PRJ).ut $(PRJ).ncd

+# Promgen
+$(PRJ).mcs: $(PRJ).bit
+	promgen -w -p mcs -c FF -o $(PRJ) -ver 0 $(PRJ).bit -x xcf32p
+
 $(DIRS):
 	mkdir -p $(DIRS)

@@ -21,7 +21,7 @@
 -g UnusedPin:PullDown
 -g UserID:0xFFFFFFFF
 -g DCIUpdateMode:AsRequired
-g StartUpClk:JtagClk
+-g StartUpClk:Cclk
 -g DONE_cycle:4
 -g GTS_cycle:5
 -g GWE_cycle:6