-> (record doesnt work for netlist synthesis)
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git-svn-id: http://moon:8086/svn/vhdl/trunk@1020 cc03376c-175c-47c8-b038-4cd826a8556b
- no STB_O if Bus input FIFO full.
=> Bus out FIFO is read if SRDY_I = '1' and MRDY_O = '1'
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git-svn-id: http://moon:8086/svn/vhdl/trunk@748 cc03376c-175c-47c8-b038-4cd826a8556b
Symptoms:
...
1.: lw $a0, 32($s0) # Uncached load from memory mapped I/O
2.: lw $a2, 4($v0) # Cached load and cache-miss.
# $a0 receives same value as $a2.
# CPU skips writing $a0 due to busy flag of D-Cache,
# which is already active in the previous cycle
...
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git-svn-id: http://moon:8086/svn/vhdl/trunk@681 cc03376c-175c-47c8-b038-4cd826a8556b
- BEV = 1 after NMI/RST (like hard reset)
- status not KUc,IEc not saved to KUp, IEp at NMI/RST (like hard reset)
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@523 cc03376c-175c-47c8-b038-4cd826a8556b
Newlib's memcpy() (MIPS-optimized) uses this for unaligned copy.
Consectutive load instructions without nops using same target register (which is legal) like
lw $1, 0(mem)
lwl $1, 1(mem)
or
lwl $1, 0(mem)
lwr $1, 1(mem)
or similar, lead to incorrect result. Now it's fixed.
git-svn-id: http://moon:8086/svn/vhdl/trunk@519 cc03376c-175c-47c8-b038-4cd826a8556b
Exception vector is reset vector at (X"BFC00000")
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Exception vector is reset vector at (X"BFC00000")
- Interrupt pending flags (IP) are not masked in hardware by IM.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@489 cc03376c-175c-47c8-b038-4cd826a8556b
- Removed possibility of writng read-only status bits
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git-svn-id: http://moon:8086/svn/vhdl/trunk@481 cc03376c-175c-47c8-b038-4cd826a8556b
This minimizes pc.nxt MUX (Better timing)
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@475 cc03376c-175c-47c8-b038-4cd826a8556b
Use fifo_sync instead and specified ditributed ram_style
in XCF-file during synthesis
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git-svn-id: http://moon:8086/svn/vhdl/trunk@472 cc03376c-175c-47c8-b038-4cd826a8556b
- added separate reg_pointer for read/write
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- registered 'ctrl_out.int' for better timing
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- added exc-Flag in WB_stage
- simplified int signals
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git-svn-id: http://moon:8086/svn/vhdl/trunk@428 cc03376c-175c-47c8-b038-4cd826a8556b
- Pipeline is now flushed and finished and all dependencies are solved before entering exception handler
- User mode writes on status register are now correctly finished before status is altered by exception
- Processor stalls for 2 cycles after RFE to ensure that status register is correct in user mode
- Added int-port
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git-svn-id: http://moon:8086/svn/vhdl/trunk@426 cc03376c-175c-47c8-b038-4cd826a8556b
- removed int-port (it's now in cop)
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git-svn-id: http://moon:8086/svn/vhdl/trunk@425 cc03376c-175c-47c8-b038-4cd826a8556b
cop register behavior is now hopefully the same as general registers.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@421 cc03376c-175c-47c8-b038-4cd826a8556b
- added invalidate_all and invalidate_at control
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jens