jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- debug output reverted to unsigned vector

Browse Source 
-> (record doesnt work for netlist synthesis)
Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@1020 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2013-08-24 11:44:56 +00:00
parent 11c9696320
commit f81cd4018f
3 changed files with 8 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/src/core/mips_top.vhd
+3 -3
View File
@@ -38,7 +38,7 @@ entity mips_top is
);
Port
(
debug : out chip_debug_t;
debug : out unsigned(1 downto 0);
eb : in STD_LOGIC;
nmi : in STD_LOGIC;
cpu_clk : in STD_LOGIC;
@@ -189,8 +189,8 @@ architecture rtl of mips_top is
begin
-------------------------------------------------------------------
debug.imem_err <= imem_err;
debug.dmem_err <= dmem_err;
debug(0) <= imem_err;
debug(1) <= dmem_err;
process(CLK_I)
variable reset_delay : unsigned (31 downto 0);
projects/mips_sys/src/mips_sys.vhd
+3 -4
View File
@@ -157,7 +157,7 @@ ARCHITECTURE behavior OF mips_sys IS
COMPONENT mips_top
Port
(
debug : out chip_debug_t;
debug : out unsigned(1 downto 0);
eb : in STD_LOGIC;
nmi : in STD_LOGIC;
cpu_clk : in STD_LOGIC;
@@ -487,7 +487,7 @@ ARCHITECTURE behavior OF mips_sys IS
signal usb_inten : std_logic;
signal phy_inten : std_logic;
signal debug : chip_debug_t;
signal debug : unsigned(1 downto 0);
-- DDR SDRAM
constant BURST_LEN : natural := 2;
@@ -539,8 +539,7 @@ BEGIN
sys_phy_mdio <= gpo_0(31);
eb <= sys_dip(7);
sys_error(0) <= debug.imem_err;
sys_error(1) <= debug.dmem_err;
sys_error <= debug;
nmi <= not sys_rst_n_in;
rst_in <= not sys_rst_n_in and sys_btn(0);
sys_flash_byten <= '1';
projects/mips_sys/src/mips_sys_sim.vhd
+2 -3
View File
@@ -317,7 +317,7 @@ ARCHITECTURE behavior OF mips_sys IS
signal usb_inten : std_logic;
signal phy_inten : std_logic;
signal debug : chip_debug_t;
signal debug : unsigned(1 downto 0);
-- DDR SDRAM
constant BURST_LEN : natural := 2;
@@ -362,8 +362,7 @@ BEGIN
sys_phy_mdio <= gpo_0(31);
eb <= sys_dip(7);
sys_error(0) <= debug.imem_err;
sys_error(1) <= debug.dmem_err;
sys_error <= debug;
nmi <= not sys_rst_n_in;
rst_in <= not sys_rst_n_in and sys_btn(0) and sys_btn(2);
sys_flash_byten <= '1';