Exception vector is reset vector at (X"BFC00000")
- added pin 'eb' for endian little/big choice. 'eb' is sampled at reset
- UART(): merged TX and RX interrupt to one interrupt line
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@498 cc03376c-175c-47c8-b038-4cd826a8556b
Exception vector is reset vector at (X"BFC00000")
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@497 cc03376c-175c-47c8-b038-4cd826a8556b
- added more programs
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git-svn-id: http://moon:8086/svn/vhdl/trunk@496 cc03376c-175c-47c8-b038-4cd826a8556b
S/W can write exception handler entry to this table.
Exception handler can now reside anywhere in memory.
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@494 cc03376c-175c-47c8-b038-4cd826a8556b
Exception vector is reset vector at (X"BFC00000")
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@490 cc03376c-175c-47c8-b038-4cd826a8556b
Exception vector is reset vector at (X"BFC00000")
- Interrupt pending flags (IP) are not masked in hardware by IM.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@489 cc03376c-175c-47c8-b038-4cd826a8556b
- Removed possibility of writng read-only status bits
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This minimizes pc.nxt MUX (Better timing)
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git-svn-id: http://moon:8086/svn/vhdl/trunk@475 cc03376c-175c-47c8-b038-4cd826a8556b
- CPU is configured as BIG-endian
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git-svn-id: http://moon:8086/svn/vhdl/trunk@474 cc03376c-175c-47c8-b038-4cd826a8556b
Use fifo_sync instead and specified ditributed ram_style
in XCF-file during synthesis
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git-svn-id: http://moon:8086/svn/vhdl/trunk@473 cc03376c-175c-47c8-b038-4cd826a8556b
Use fifo_sync instead and specified ditributed ram_style
in XCF-file during synthesis
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git-svn-id: http://moon:8086/svn/vhdl/trunk@472 cc03376c-175c-47c8-b038-4cd826a8556b
- added separate reg_pointer for read/write
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git-svn-id: http://moon:8086/svn/vhdl/trunk@470 cc03376c-175c-47c8-b038-4cd826a8556b
- improved flash error handling
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- added block_lock/unlock functions
- locked blocks are unlocked automatically during erase
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git-svn-id: http://moon:8086/svn/vhdl/trunk@461 cc03376c-175c-47c8-b038-4cd826a8556b
- control signals derived from register file are noe registered for better timing
- mem_offset updated from vga_mem_offset wehn new frame begins
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git-svn-id: http://moon:8086/svn/vhdl/trunk@459 cc03376c-175c-47c8-b038-4cd826a8556b
- registered 'ctrl_out.int' for better timing
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git-svn-id: http://moon:8086/svn/vhdl/trunk@458 cc03376c-175c-47c8-b038-4cd826a8556b
- switched to big-endian biuld
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- added functions for LWC0 and SWC0
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git-svn-id: http://moon:8086/svn/vhdl/trunk@443 cc03376c-175c-47c8-b038-4cd826a8556b
flash_aligned_addr_by...() to obtain block aligned addresses
- removed query in flash_find due to stack-problems
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git-svn-id: http://moon:8086/svn/vhdl/trunk@435 cc03376c-175c-47c8-b038-4cd826a8556b
- added exc-Flag in WB_stage
- simplified int signals
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- Pipeline is now flushed and finished and all dependencies are solved before entering exception handler
- User mode writes on status register are now correctly finished before status is altered by exception
- Processor stalls for 2 cycles after RFE to ensure that status register is correct in user mode
- Added int-port
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git-svn-id: http://moon:8086/svn/vhdl/trunk@426 cc03376c-175c-47c8-b038-4cd826a8556b
- removed int-port (it's now in cop)
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git-svn-id: http://moon:8086/svn/vhdl/trunk@425 cc03376c-175c-47c8-b038-4cd826a8556b
cop register behavior is now hopefully the same as general registers.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@421 cc03376c-175c-47c8-b038-4cd826a8556b
- added invalidate_all and invalidate_at control
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ICACHE_invalidate_at, ICACHE_invalidate_all,
DCACHE_invalidate_at, DCACHE_invalidate_all.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@412 cc03376c-175c-47c8-b038-4cd826a8556b
- due to cop_reg_we in MEM_Stage, the output register is removed
(timing is slightly degraded). The reg pointer is delayed instead by one cycle
- test-reg is now writable in user mode regardles of cop0 usability.
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@406 cc03376c-175c-47c8-b038-4cd826a8556b
if cop is read is now implemented into instruction decoder
- generate 'stall_all' signal if ID/EX/MEM stall is active
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@402 cc03376c-175c-47c8-b038-4cd826a8556b
jens