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git-svn-id: http://moon:8086/svn/vhdl/trunk@499 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2009-10-03 17:17:26 +00:00
parent c104a7b916
commit 822059724f
1 changed files with 6 additions and 0 deletions
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lib/CPUs/MIPS/dist/tmpl/notes.txt
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@@ -28,6 +28,12 @@ Changes in release 12
- Status register bit 'RE'= 1 (bit 25) reverses endianess in user-mode
- Status register bit 'TS' (TLB Shutdown, bit 21) is tied high to indicate the absence of a MMU.
- uart_wb.vhd: added interrupt enable
- Interrupt pending flags (IP) are not anymore masked by Interrupt mask flags (IM) in H/W.
Masking has to be done in S/W. H/W masking was removed because it isn't MIPS-compliant.
- added NMI pin (more MIPS compliant). Asserting causes exception. Exception vector is reset (0xBFC00000).
Using NMI as reset is dangerous because periphery is not reseted.
Unitialized/unreseted periphery may cause trouble (e.g. firing unwanted interrupts)
- Bootloader: Startup now invalidates I/D-Caches at boot
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Changes in release 11