jens
57f8626d86
CLOCKGEN: cpu_clock is now variable. SYS_CLK is fixed to input frequency
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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@951 cc03376c-175c-47c8-b038-4cd826a8556b
2013-04-27 13:39:29 +00:00
jens
e349fbcecf
- SDR-Clock now derived from clk_in, instead of sys_clk_fx
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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@948 cc03376c-175c-47c8-b038-4cd826a8556b
2013-04-26 10:42:07 +00:00
jens
0c50e933f8
- changed frequencies into MHz units (real data type)
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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@734 cc03376c-175c-47c8-b038-4cd826a8556b
2010-02-09 07:50:27 +00:00
jens
023b7e42a3
- added dedicated sys_clk_out frequency synthesis
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- SDRAM clocks use sys_clk_out for clock generation
- added cpu_clk_out which is the same as sys_clk_in
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@727 cc03376c-175c-47c8-b038-4cd826a8556b
2010-02-07 19:16:11 +00:00
jens
dd24468d48
Initial version
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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@609 cc03376c-175c-47c8-b038-4cd826a8556b
2009-11-05 12:02:23 +00:00
jens