- added
git-svn-id: http://moon:8086/svn/vhdl/trunk@1414 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
@@ -0,0 +1,284 @@
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; -------------------------------------------------
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; Register definitions
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; -------------------------------------------------
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include "../../../lib/jasm/cregs.inc.jsm"
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include "xregs.inc.jsm"
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; -------------------------------------------------
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; Constants
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; -------------------------------------------------
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CR: equ 0x0D
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LF: equ 0x0A
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report_ival: equ 0x64
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; External RAM/ROM
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xmem
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msg_txt: dc "J-CPU V1.", 0
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; Internal RAM
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cmem 0
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count: db 4
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cntDigit: db 8
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count_stat: db 1
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shifter: db 1
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ram_txt_start: db 15
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ram_txt_end: db 1
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ram_txt_ptr: db 1
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upd_z1: db 1
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page_test_var: db 1
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; -------------------------------------------------
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; Program
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; -------------------------------------------------
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code
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reset: org 0x000
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jmp ende
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org 1023
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ende: jmp init
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org 0x001
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; -------------------------------------------------
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; ISR
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; -------------------------------------------------
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isr: push R0
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push R1
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push R2
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push R3
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push R4
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push R5
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push R6
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push R7
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push R8
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push R9
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push R10
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push R11
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push R12
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push R13
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push R14
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push R15
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xin R0, (uart_status)
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and R0, 0x10
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jz rcv_empty
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xin R0, (uart_data)
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cmp R0, 0x0D
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jeq reset_ptr
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movc R1, (ram_txt_ptr)
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movc (R1), R0
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cmp R1, ram_txt_end
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jlt inc_ptr
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reset_ptr: mov R1, ram_txt_start
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dec R1
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movc (upd_z1), R1
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inc_ptr: inc R1
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movc (ram_txt_ptr), R1
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rcv_empty: call Cnt32
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pop R15
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pop R14
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pop R13
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pop R12
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pop R11
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pop R10
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pop R9
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pop R8
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pop R7
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pop R6
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pop R5
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pop R4
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pop R3
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pop R2
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pop R1
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pop R0
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reti
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; -------------------------------------------------
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; Main
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; -------------------------------------------------
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init: ; org 0x40
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call CounterInit
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call LCD_init
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mov R0, 0x00
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movc (count_stat), R0
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xout (led_port), R0
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movc (upd_z1), R0
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xin R1, (btn_port)
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or R1, 0x80
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movc (shifter), R1
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mov R0, ram_txt_start
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movc (ram_txt_ptr), R0
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mov R0, ctrl_reg
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; Enable timer
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xout (R0), 0x02
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; Enable interrupt source
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xout (R0), 0x03
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mov R0, report_ival
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movc (count_stat), R0
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; Enable CPU interrupt
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mov R0, 0x03
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cout (cpu_int_ctrl), R0
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; Print Hello world
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mov R0, LCD_CMD_CLEAR
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call LCD_writecmd
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mov R1, msg_txt
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call LCD_putsx
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; Read revision reg to form version number v1.<REV>
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end_txt: cin R0, (cpu_revision)
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add R0, 0x30
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call LCD_writechar
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; check page sel function
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mov R0, 0x00
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cout (cpu_control), R0
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mov R1, 0x00
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movc (page_test_var), R1
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mov R0, 0x01
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cout (cpu_control), R0
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mov R1, 0xAA
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movc (page_test_var), R1
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mov R0, 0x00
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cout (cpu_control), R0
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movc R0, (page_test_var)
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cmp R0, 0xAA
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jeq error
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mov R0, 0x01
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cout (cpu_control), R0
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movc R0, (page_test_var)
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cmp R0, 0xAA
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jeq page_reset
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error: jmp error
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page_reset: mov R0, 0x00
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cout (cpu_control), R0
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; -------------------------------------------------
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; Main loop
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; -------------------------------------------------
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start: halt
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movc R0, (count_stat)
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dec R0
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movc (count_stat), R0
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jnz start
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mov R7, report_ival
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movc R1, (cntDigit+0)
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movc R2, (cntDigit+1)
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swap R1
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xor R1, R2
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and R1, 0x02
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jnz do_add
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dec R7
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mov R0, 0x2D
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jmp upd_cs
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do_add: inc R7
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mov R0, 0x2B
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upd_cs: movc (count_stat), R7
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call sout
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; Toggle LED
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movc R0, (shifter)
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rol R0
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movc (shifter), R0
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; xin R0, (led_port)
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; xor R0, 0x02
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xout (led_port), R0
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movc R0, (upd_z1)
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mov R1, 0x00
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movc (upd_z1), R1
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tst R0
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jz upd_num
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mov R1, ram_txt_start
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read_ram: movc R0, (R1)
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call LCD_writechar
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inc R1
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cmp R1, ram_txt_end
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jle read_ram
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; Write digits to LCD and serial
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upd_num: call UpdateDigits
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mov R0, LCD_CMD_Z2
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call LCD_writecmd
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mov R1, cntDigit+7
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print_num: movc R0, (R1)
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call sout
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call LCD_writechar
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cmp R1, cntDigit+0
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jeq sendCRLF
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dec R1
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jmp print_num
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sendCRLF: mov R0, CR
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call sout
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mov R0, LF
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call sout
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ex_print: jmp start
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; -------------------------------------------------
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CounterInit: mov R0, 0x00
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movc (count+0), R0
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movc (count+1), R0
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movc (count+2), R0
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movc (count+3), R0
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ret
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; -------------------------------------------------
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Cnt32: mov R0, count+0
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cloop: movc R1, (R0)
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inc R1
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movc (R0), R1
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jnc CountRdy
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cmp R0, count+3
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jeq CountRdy
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inc R0
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jmp cloop
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CountRdy: ret
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; -------------------------------------------------
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UpdateDigits: mov R2, cntDigit+0
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mov R0, count+0
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dualLoop: movc R1, (R0)
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and R1, 0x0F
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cmp R1, 0x0A
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jlt isNum1
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add R1, 0x07
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isNum1: add R1, 0x30
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movc (R2), R1
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inc R2
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movc R1, (R0)
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swap R1
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and R1, 0x0F
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cmp R1, 0x0A
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jlt isNum2
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add R1, 0x07
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isNum2: add R1, 0x30
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movc (R2), R1
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cmp R0, count+3
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jeq UpdRdy
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inc R0
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inc R2
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jmp dualLoop
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UpdRdy: ret
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; -------------------------------------------------
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include "../../../lib/jasm/uart.inc.jsm"
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include "../../../lib/jasm/lcd.inc.jsm"
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include "../../../lib/jasm/delays.inc.jsm"
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,247 @@
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######################################################################
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# Copyright (c) 2006 Xilinx, Inc. All rights reserved.
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#
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# XILINX CONFIDENTIAL PROPERTY
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# This document contains proprietary information which is
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# protected by copyright. All rights are reserved. No part of
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# this document may be photocopied, reproduced or translated to
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# another program language without prior written consent of
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# XILINX Inc., San Jose, CA. 95124
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#
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# Xilinx, Inc.
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# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
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# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
|
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# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
|
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# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
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# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
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# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
|
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# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
|
||||
# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
|
||||
# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
|
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# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
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# AND FITNESS FOR A PARTICULAR PURPOSE.
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#
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######################################################################
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#
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# For Tcl Manual for builtin commands, see
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# http://www.tcl.tk/man/tcl8.3
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#
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#
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#
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# Example scanning devices and ChipScope cores, in a JTAG Chain,
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# using the Cse api.
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# Get the Cse DLL's and globals
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cd F:\\Xilinx9\\ChipScope_Pro_9_1i\\bin\\nt
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source csejtag.tcl
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namespace import ::chipscope::*
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# Create global variables
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# Parallel IV Cable
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set PARALLEL_CABLE_ARGS [list "port=LPT1" \
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"frequency=200000"]
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# "frequency=5000000 | 2500000 | 200000"
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# Platform USB Cable
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set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \
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"frequency=3000000"]
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# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
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set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB
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set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS
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set debug 0
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proc main {argc argv} {
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global debug
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global PLATFORM_USB_CABLE_ARGS
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global CSEJTAG_TARGET_PLATFORMUSB
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global CABLE_NAME
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global CABLE_ARGS
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global CSE_MSG_INFO
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if {[expr ($argc > 0) && [string equal "-h" [lindex $argv 0]]]} {
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writeMessage 0 $CSE_MSG_INFO "Usage: xtclsh csejtag_examplel1.tcl \[-usb\] \[-d\]\n"
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exit
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}
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# for CseServer/CseClient use
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set serverflag_idx 0
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set serveraddress_idx 0
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# Checks to see if usb or debug flag is set
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for {set i 0} {$i < $argc} {incr i} {
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if {[string equal "-usb" [lindex $argv $i]]} {
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set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB
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set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS
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} elseif {[string equal "-d" [lindex $argv $i]]} {
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set debug 1
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} elseif {[string equal "-server" [lindex $argv $i]]} {
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set serverflag_idx $i
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set serveraddress_idx [expr $i + 1]
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}
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}
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# Create Session. Pass location of idcode.lst to override default.
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set handle [csejtag_session create "writeMessage" [lindex $argv $serverflag_idx] [lindex $argv $serveraddress_idx] ]
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# Scan the JTAG chain
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scanChain $handle
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csejtag_session destroy $handle
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}
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proc scanChain {handle} {
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global CABLE_NAME
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||||
global CABLE_ARGS
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global CSE_MSG_ERROR
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global CSE_MSG_INFO
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global CSEJTAG_SCAN_DEFAULT
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||||
global CSEJTAG_LOCKED_ME
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global CSEJTAG_TEST_LOGIC_RESET
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global CSEJTAG_SHIFT_READ
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global CSEJTAG_RUN_TEST_IDLE
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|
||||
# Open cable
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csejtag_target open $handle \
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||||
$CABLE_NAME \
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||||
0 \
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||||
[lindex $CABLE_ARGS 0] \
|
||||
[lindex $CABLE_ARGS 1]
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||||
|
||||
# CseJtag_session sendMessage will call the messageRouter
|
||||
# function specified in csejtag_session create
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||||
csejtag_session send_message $handle $CSE_MSG_INFO "Open Cable successfully\n"
|
||||
|
||||
# Need to lock cable before actually accessing JTAG chain
|
||||
set cablelock [csejtag_target lock $handle 5000]
|
||||
if {$cablelock != $CSEJTAG_LOCKED_ME} {
|
||||
csejtag_session send_message $handle $CSE_MSG_ERROR "cse_lock_target failed"
|
||||
csejtag_target close $handle
|
||||
return
|
||||
}
|
||||
|
||||
csejtag_session send_message $handle $CSE_MSG_INFO "Obtained cable lock\n"
|
||||
|
||||
# Scan the JTAG chain, reading idcodes,
|
||||
# setting IR lengths for known devices in the CseJtag
|
||||
# data structures.
|
||||
# CseJtag needs to know in order to do JTAG shifts.
|
||||
csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT
|
||||
|
||||
# Get number of devices
|
||||
set deviceCount [csejtag_tap get_device_count $handle]
|
||||
|
||||
set str [format "Found %u devices\n" $deviceCount]
|
||||
csejtag_session send_message $handle $CSE_MSG_INFO $str
|
||||
|
||||
# Get a byte array of all idcodes by scanning the JTAG chain.
|
||||
csejtag_tap navigate $handle $CSEJTAG_TEST_LOGIC_RESET 0 0
|
||||
|
||||
set idcodeBuffer [csejtag_tap shift_chain_dr $handle\
|
||||
$CSEJTAG_SHIFT_READ \
|
||||
$CSEJTAG_RUN_TEST_IDLE \
|
||||
0 \
|
||||
[expr $deviceCount * 32] \
|
||||
0 \
|
||||
-hextdimask 0 \
|
||||
-hextdomask 0]
|
||||
|
||||
for {set deviceIndex 0} {$deviceIndex < $deviceCount} {incr deviceIndex} {
|
||||
scanDevice $handle $deviceIndex $deviceCount $idcodeBuffer
|
||||
}
|
||||
|
||||
csejtag_target unlock $handle
|
||||
csejtag_target close $handle
|
||||
csejtag_session send_message $handle $CSE_MSG_INFO "Closed cable successfully\n"
|
||||
}
|
||||
|
||||
# Note that this function (with the exception of the call to
|
||||
# scanUserReg() ) does not get any information
|
||||
# which requires a new scan of the device chain.
|
||||
# It is just lookup in the 'idcode.lst' file or
|
||||
# information which CseJtag data structures already has such as:
|
||||
# deviceCount and device idcodes.
|
||||
proc scanDevice {handle deviceIndex deviceCount idcodeBuffer} {
|
||||
global CSE_MSG_INFO
|
||||
|
||||
# position of buffer
|
||||
set startofidcodeBuf [expr $deviceIndex * 8 ]
|
||||
set idcodeBuf [string range $idcodeBuffer $startofidcodeBuf [expr $startofidcodeBuf + 7] ]
|
||||
|
||||
# Get idcode without scanning the JTAG chain
|
||||
set idcodeBuffer2 [csejtag_tap get_device_idcode $handle $deviceIndex]
|
||||
|
||||
# Convert idcodeFromBuffer and idcodeFromBuffer2 to unsigned integers
|
||||
set idcodeFromBuffer [expr "0x0$idcodeBuf"]
|
||||
|
||||
set idcode [expr [format "%u" [binaryStringToInt $idcodeBuffer2] ] ]
|
||||
|
||||
# Get IR length without scanning JTAG chain
|
||||
set irLength 0
|
||||
set irLength [csejtag_db get_irlength_for_idcode $handle $idcodeBuffer2]
|
||||
|
||||
# NOTE If (irLength == 0) an application program needs to set it,
|
||||
# ( using function csejtag_tap_set_irlength $handle $deviceIndex $irLength)
|
||||
# perhaps after asking the user or looking it up someway.
|
||||
# Without irLength known for all devices in the chain,
|
||||
# JTAG communication will fail.
|
||||
|
||||
# Get device name
|
||||
set deviceName [csejtag_db get_device_name_for_idcode $handle $idcodeBuffer2]
|
||||
|
||||
# print out device info
|
||||
set str [format "\nDEVICE %u, idcode:%x, Scanned idcode:%x, IRLength:%u, %s\n" \
|
||||
$deviceIndex $idcode $idcodeFromBuffer $irLength $deviceName]
|
||||
csejtag_session send_message $handle $CSE_MSG_INFO $str
|
||||
|
||||
# Compares the two methods of obtaining the idcode,
|
||||
# prints a message if they are different.
|
||||
|
||||
if {$idcode != $idcodeFromBuffer} {
|
||||
csejtag_session send_message $handle $CSE_MSG_INFO "IDCODES ARE NOT EQUAL!!!\n"
|
||||
}
|
||||
}
|
||||
|
||||
proc writeMessage {handle msgFlags msg} {
|
||||
global debug
|
||||
global CSE_MSG_ERROR
|
||||
global CSE_MSG_WARNING
|
||||
global CSE_MSG_STATUS
|
||||
global CSE_MSG_INFO
|
||||
global CSE_MSG_NOISE
|
||||
global CSE_MSG_DEBUG
|
||||
if {[expr $debug || ($msgFlags != $CSE_MSG_DEBUG)]} {
|
||||
if {$msgFlags == $CSE_MSG_ERROR} {
|
||||
puts -nonewline "Error:"
|
||||
} elseif {$msgFlags == $CSE_MSG_WARNING} {
|
||||
puts -nonewline "Warning:"
|
||||
} elseif {$msgFlags == $CSE_MSG_INFO} {
|
||||
puts -nonewline "Info:"
|
||||
} elseif {$msgFlags == $CSE_MSG_STATUS} {
|
||||
puts -nonewline "Status:"
|
||||
} elseif {$msgFlags == $CSE_MSG_DEBUG} {
|
||||
puts -nonewline "Debug:"
|
||||
}
|
||||
puts -nonewline $msg
|
||||
flush stdout
|
||||
}
|
||||
}
|
||||
|
||||
proc binaryStringToInt {binarystring} {
|
||||
set len [string length $binarystring]
|
||||
set retval 0
|
||||
for {set i 0} {$i < $len} {incr i} {
|
||||
set retval [expr $retval << 1]
|
||||
if {[string index $binarystring $i] == "1"} {
|
||||
set retval [expr $retval | 1]
|
||||
}
|
||||
}
|
||||
return $retval
|
||||
}
|
||||
|
||||
# Start the program
|
||||
main $argc $argv
|
||||
@@ -0,0 +1,379 @@
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
lcd_read: equ 0x20
|
||||
lcd_data: equ 0x40
|
||||
lcd_enable: equ 0x80
|
||||
|
||||
DIV10: equ 0x0A
|
||||
|
||||
CR: equ 0x0D
|
||||
LF: equ 0x0A
|
||||
|
||||
LCD_CMD_Z1: equ 0x80
|
||||
LCD_CMD_Z2: equ 0xC0
|
||||
|
||||
; I/O
|
||||
btn_port: equ 0xC0 ; RO
|
||||
led_port: equ 0xC1 ; Write
|
||||
uart_data: equ 0xC2 ; Write
|
||||
lcd_port: equ 0xC3 ; R/W
|
||||
ctrl_reg: equ 0xC4 ; R/W
|
||||
dip_port: equ 0xC5 ; RO
|
||||
uart_status: equ 0xC6 ; Read
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
reset: jmp init
|
||||
|
||||
org 0x001
|
||||
reti
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
init: call LCD_init
|
||||
|
||||
; Print Hello world
|
||||
call LCD_clear
|
||||
; J
|
||||
mov R0, 0x4A
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; -
|
||||
mov R0, 0x2D
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; C
|
||||
mov R0, 0x43
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; P
|
||||
mov R0, 0x50
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; U
|
||||
mov R0, 0x55
|
||||
call LCD_writechar
|
||||
call sout
|
||||
;
|
||||
mov R0, 0x20
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; V
|
||||
mov R0, 0x56
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; 1
|
||||
mov R0, 0x31
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; .
|
||||
mov R0, 0x2E
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; 0
|
||||
mov R0, 0x30
|
||||
call LCD_writechar
|
||||
call sout
|
||||
|
||||
; CRLF
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
mov R0, CR
|
||||
call sout
|
||||
mov R0, LF
|
||||
call sout
|
||||
|
||||
; R
|
||||
mov R0, 0x52
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; E
|
||||
mov R0, 0x65
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; A
|
||||
mov R0, 0x61
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; D
|
||||
mov R0, 0x64
|
||||
call LCD_writechar
|
||||
call sout
|
||||
; Y
|
||||
mov R0, 0x79
|
||||
call LCD_writechar
|
||||
call sout
|
||||
|
||||
; CRLF
|
||||
mov R0, CR
|
||||
call sout
|
||||
mov R0, LF
|
||||
call sout
|
||||
|
||||
jjj: jmp jjj
|
||||
|
||||
; -------------------------------------------------
|
||||
; sout
|
||||
; -------------------------------------------------
|
||||
; R0 = input
|
||||
sout: push R1
|
||||
sout1: movx R1, (uart_status)
|
||||
and R1, 0x02
|
||||
jnz sout1
|
||||
movx (uart_data), R0
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; sin
|
||||
; -------------------------------------------------
|
||||
; R0 = output
|
||||
sin: push R1
|
||||
sin1: movx R1, (uart_status)
|
||||
and R1, 0x10
|
||||
jnz sin1
|
||||
movx R0, (uart_data)
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Init LCD
|
||||
; -------------------------------------------------
|
||||
LCD_init: mov R1, lcd_port
|
||||
movx (R1), lcd_read
|
||||
|
||||
call delay10ms
|
||||
|
||||
; 0.
|
||||
mov R2, 0x00
|
||||
mov R0, 0x03
|
||||
call LCD_write_
|
||||
call delay10ms
|
||||
mov R2, 0x00
|
||||
mov R0, 0x03
|
||||
call LCD_write_
|
||||
call delay10ms
|
||||
|
||||
mov R2, 0x00
|
||||
mov R0, 0x02
|
||||
call LCD_write_
|
||||
call delay1ms
|
||||
|
||||
; 1.
|
||||
mov R0, 0x28
|
||||
call LCD_writecmd
|
||||
|
||||
; 2.
|
||||
mov R0, 0x0E
|
||||
call LCD_writecmd
|
||||
|
||||
; 3.
|
||||
mov R0, 0x06
|
||||
call LCD_writecmd
|
||||
|
||||
; 3.
|
||||
mov R0, 0x01
|
||||
call LCD_writecmd
|
||||
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_Clear
|
||||
; -------------------------------------------------
|
||||
LCD_clear: push R0
|
||||
mov R0, 0x01
|
||||
call LCD_writecmd
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_writecmd
|
||||
; -------------------------------------------------
|
||||
; R0 = cmd
|
||||
LCD_writecmd: call LCD_waitbsy
|
||||
push R2
|
||||
push R0
|
||||
push R0
|
||||
mov R2, 0x00
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
call LCD_write_
|
||||
pop R0
|
||||
and R0, 0x0F
|
||||
call LCD_write_
|
||||
pop R0
|
||||
pop R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_writechar
|
||||
; -------------------------------------------------
|
||||
; R0 = char
|
||||
LCD_writechar: call LCD_waitbsy
|
||||
push R2
|
||||
push R0
|
||||
push R0
|
||||
mov R2, lcd_data
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
call LCD_write_
|
||||
pop R0
|
||||
and R0, 0x0F
|
||||
call LCD_write_
|
||||
pop R0
|
||||
pop R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_write_
|
||||
; -------------------------------------------------
|
||||
; R0 = input
|
||||
LCD_write_: push R1
|
||||
|
||||
mov R1, R0
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
mov R1, R0
|
||||
or R1, R2
|
||||
or R1, lcd_enable
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
mov R1, R0
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_read_
|
||||
; -------------------------------------------------
|
||||
; R0 = output
|
||||
LCD_read_: push R1
|
||||
|
||||
mov R1, lcd_read
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
mov R1, lcd_read
|
||||
or R1, R2
|
||||
or R1, lcd_enable
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
movx R0, (lcd_port)
|
||||
|
||||
mov R1, lcd_read
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_readstat
|
||||
; -------------------------------------------------
|
||||
; R0 = status
|
||||
LCD_readstat: push R2
|
||||
mov R2, 0x00
|
||||
call LCD_read_
|
||||
shl R0
|
||||
shl R0
|
||||
shl R0
|
||||
shl R0
|
||||
push R0
|
||||
call LCD_read_
|
||||
and R0, 0x0F
|
||||
pop R2
|
||||
or R0, R2
|
||||
pop R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_waitbsy
|
||||
; -------------------------------------------------
|
||||
LCD_waitbsy: push R0
|
||||
bsy_loop: call LCD_readstat
|
||||
and R0, 0x80
|
||||
jz ex_bsy
|
||||
call delay1us
|
||||
jmp bsy_loop
|
||||
ex_bsy: pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Delays
|
||||
; -------------------------------------------------
|
||||
delay1s: push R15
|
||||
mov R15, DIV10
|
||||
loop1s: call delay100ms
|
||||
dec R15
|
||||
jnz loop1s
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay100ms: push R15
|
||||
mov R15, DIV10
|
||||
loop100ms: call delay10ms
|
||||
dec R15
|
||||
jnz loop100ms
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay10ms: push R15
|
||||
mov R15, DIV10
|
||||
loop10ms: call delay1ms
|
||||
dec R15
|
||||
jnz loop10ms
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay1ms: push R15
|
||||
mov R15, DIV10
|
||||
loop1ms: call delay100us
|
||||
dec R15
|
||||
jnz loop1ms
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay100us: push R15
|
||||
mov R15, DIV10
|
||||
loop100us: call delay10us
|
||||
dec R15
|
||||
jnz loop100us
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay10us: push R15
|
||||
mov R15, DIV10
|
||||
loop10us: call delay1us
|
||||
dec R15
|
||||
jnz loop10us
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay1us: push R15
|
||||
mov R15, DIV10
|
||||
loop1us: call delay100ns
|
||||
dec R15
|
||||
jnz loop1us
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay100ns: nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
ret
|
||||
@@ -0,0 +1,797 @@
|
||||
# ----------------------------------------------------------------------
|
||||
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
|
||||
# This file: The ROM file for upload to target over JTAG
|
||||
|
||||
# Copyright (C) 2007 J. Ahrensfeld
|
||||
|
||||
# This library is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU Lesser General Public
|
||||
# License as published by the Free Software Foundation; either
|
||||
# version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
# This library is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
# Lesser General Public License for more details.
|
||||
|
||||
# You should have received a copy of the GNU Lesser General Public
|
||||
# License along with this library; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
||||
# For questions and ideas, please contact the author at jens@jayfield.org
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
# For Chipscope 9.1
|
||||
# ---------------------------------------------------------------------
|
||||
# Source JTAG/TCL frame work
|
||||
cd $env(CHIPSCOPE)\\bin\\nt
|
||||
source csejtag.tcl
|
||||
|
||||
namespace import ::chipscope::*
|
||||
|
||||
# Platform USB Cable
|
||||
set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \
|
||||
"frequency=1500000"]
|
||||
# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
|
||||
|
||||
# Create session
|
||||
set handle [::chipscope::csejtag_session create 0]
|
||||
|
||||
# Open JTAG and lock
|
||||
set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS]
|
||||
set lock_result [::chipscope::csejtag_target lock $handle 1000]
|
||||
|
||||
set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]
|
||||
|
||||
# Get Device ID
|
||||
set devtype "Virtex-4SX"
|
||||
set devid 2
|
||||
set irlength [::chipscope::csejtag_tap get_irlength $handle $devid]
|
||||
set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid]
|
||||
|
||||
# ---------------------------------------------------------------
|
||||
# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA
|
||||
# User 1
|
||||
set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 $irlength "3C2"]
|
||||
|
||||
# Write Program
|
||||
# JASM_ROM_INSERT_HERE
|
||||
# 0x000: JMP 0x002
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00030002"
|
||||
|
||||
# 0x001: RETI
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0007F000"
|
||||
|
||||
# 0x002: CALL 0x04A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "000BB04A"
|
||||
|
||||
# 0x003: CALL 0x062
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "000FB062"
|
||||
|
||||
# 0x004: MOV R00, 0x4A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001034A0"
|
||||
|
||||
# 0x005: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0017B077"
|
||||
|
||||
# 0x006: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001BB03C"
|
||||
|
||||
# 0x007: MOV R00, 0x2D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001C32D0"
|
||||
|
||||
# 0x008: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0023B077"
|
||||
|
||||
# 0x009: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0027B03C"
|
||||
|
||||
# 0x00A: MOV R00, 0x43
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00283430"
|
||||
|
||||
# 0x00B: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "002FB077"
|
||||
|
||||
# 0x00C: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0033B03C"
|
||||
|
||||
# 0x00D: MOV R00, 0x50
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00343500"
|
||||
|
||||
# 0x00E: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "003BB077"
|
||||
|
||||
# 0x00F: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "003FB03C"
|
||||
|
||||
# 0x010: MOV R00, 0x55
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00403550"
|
||||
|
||||
# 0x011: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0047B077"
|
||||
|
||||
# 0x012: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "004BB03C"
|
||||
|
||||
# 0x013: MOV R00, 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "004C3200"
|
||||
|
||||
# 0x014: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0053B077"
|
||||
|
||||
# 0x015: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0057B03C"
|
||||
|
||||
# 0x016: MOV R00, 0x56
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00583560"
|
||||
|
||||
# 0x017: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "005FB077"
|
||||
|
||||
# 0x018: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0063B03C"
|
||||
|
||||
# 0x019: MOV R00, 0x31
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00643310"
|
||||
|
||||
# 0x01A: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "006BB077"
|
||||
|
||||
# 0x01B: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "006FB03C"
|
||||
|
||||
# 0x01C: MOV R00, 0x2E
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007032E0"
|
||||
|
||||
# 0x01D: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0077B077"
|
||||
|
||||
# 0x01E: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007BB03C"
|
||||
|
||||
# 0x01F: MOV R00, 0x30
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007C3300"
|
||||
|
||||
# 0x020: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0083B077"
|
||||
|
||||
# 0x021: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0087B03C"
|
||||
|
||||
# 0x022: MOV R00, 0xC0
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00883C00"
|
||||
|
||||
# 0x023: CALL 0x067
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "008FB067"
|
||||
|
||||
# 0x024: MOV R00, 0x0D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009030D0"
|
||||
|
||||
# 0x025: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0097B03C"
|
||||
|
||||
# 0x026: MOV R00, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009830A0"
|
||||
|
||||
# 0x027: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009FB03C"
|
||||
|
||||
# 0x028: MOV R00, 0x52
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A03520"
|
||||
|
||||
# 0x029: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A7B077"
|
||||
|
||||
# 0x02A: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00ABB03C"
|
||||
|
||||
# 0x02B: MOV R00, 0x65
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00AC3650"
|
||||
|
||||
# 0x02C: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B3B077"
|
||||
|
||||
# 0x02D: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B7B03C"
|
||||
|
||||
# 0x02E: MOV R00, 0x61
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B83610"
|
||||
|
||||
# 0x02F: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00BFB077"
|
||||
|
||||
# 0x030: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C3B03C"
|
||||
|
||||
# 0x031: MOV R00, 0x64
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C43640"
|
||||
|
||||
# 0x032: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00CBB077"
|
||||
|
||||
# 0x033: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00CFB03C"
|
||||
|
||||
# 0x034: MOV R00, 0x79
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D03790"
|
||||
|
||||
# 0x035: CALL 0x077
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D7B077"
|
||||
|
||||
# 0x036: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00DBB03C"
|
||||
|
||||
# 0x037: MOV R00, 0x0D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00DC30D0"
|
||||
|
||||
# 0x038: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E3B03C"
|
||||
|
||||
# 0x039: MOV R00, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E430A0"
|
||||
|
||||
# 0x03A: CALL 0x03C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00EBB03C"
|
||||
|
||||
# 0x03B: JMP 0x03B
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00EF003B"
|
||||
|
||||
# 0x03C: PUSH R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F3C001"
|
||||
|
||||
# 0x03D: MOVX R01, (0xC6)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F45C61"
|
||||
|
||||
# 0x03E: AND R01, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F99021"
|
||||
|
||||
# 0x03F: JNZ 0x03D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00FF203D"
|
||||
|
||||
# 0x040: MOVX (0xC2), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01008C20"
|
||||
|
||||
# 0x041: POP R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0107D001"
|
||||
|
||||
# 0x042: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "010BE000"
|
||||
|
||||
# 0x043: PUSH R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "010FC001"
|
||||
|
||||
# 0x044: MOVX R01, (0xC6)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01105C61"
|
||||
|
||||
# 0x045: AND R01, 0x10
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01159101"
|
||||
|
||||
# 0x046: JNZ 0x044
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "011B2044"
|
||||
|
||||
# 0x047: MOVX R00, (0xC2)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "011C5C20"
|
||||
|
||||
# 0x048: POP R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0123D001"
|
||||
|
||||
# 0x049: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0127E000"
|
||||
|
||||
# 0x04A: MOV R01, 0xC3
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01283C31"
|
||||
|
||||
# 0x04B: MOVX (R01), 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "012C7201"
|
||||
|
||||
# 0x04C: CALL 0x0CC
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0133B0CC"
|
||||
|
||||
# 0x04D: MOV R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01343002"
|
||||
|
||||
# 0x04E: MOV R00, 0x03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01383030"
|
||||
|
||||
# 0x04F: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "013FB087"
|
||||
|
||||
# 0x050: CALL 0x0CC
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0143B0CC"
|
||||
|
||||
# 0x051: MOV R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01443002"
|
||||
|
||||
# 0x052: MOV R00, 0x03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01483030"
|
||||
|
||||
# 0x053: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "014FB087"
|
||||
|
||||
# 0x054: CALL 0x0CC
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0153B0CC"
|
||||
|
||||
# 0x055: MOV R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01543002"
|
||||
|
||||
# 0x056: MOV R00, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01583020"
|
||||
|
||||
# 0x057: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "015FB087"
|
||||
|
||||
# 0x058: CALL 0x0D3
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0163B0D3"
|
||||
|
||||
# 0x059: MOV R00, 0x28
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01643280"
|
||||
|
||||
# 0x05A: CALL 0x067
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "016BB067"
|
||||
|
||||
# 0x05B: MOV R00, 0x0E
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "016C30E0"
|
||||
|
||||
# 0x05C: CALL 0x067
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0173B067"
|
||||
|
||||
# 0x05D: MOV R00, 0x06
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01743060"
|
||||
|
||||
# 0x05E: CALL 0x067
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "017BB067"
|
||||
|
||||
# 0x05F: MOV R00, 0x01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "017C3010"
|
||||
|
||||
# 0x060: CALL 0x067
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0183B067"
|
||||
|
||||
# 0x061: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0187E000"
|
||||
|
||||
# 0x062: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "018BC000"
|
||||
|
||||
# 0x063: MOV R00, 0x01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "018C3010"
|
||||
|
||||
# 0x064: CALL 0x067
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0193B067"
|
||||
|
||||
# 0x065: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0197D000"
|
||||
|
||||
# 0x066: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "019BE000"
|
||||
|
||||
# 0x067: CALL 0x0B6
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "019FB0B6"
|
||||
|
||||
# 0x068: PUSH R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01A3C002"
|
||||
|
||||
# 0x069: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01A7C000"
|
||||
|
||||
# 0x06A: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01ABC000"
|
||||
|
||||
# 0x06B: MOV R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01AC3002"
|
||||
|
||||
# 0x06C: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B1F000"
|
||||
|
||||
# 0x06D: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B5F000"
|
||||
|
||||
# 0x06E: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B9F000"
|
||||
|
||||
# 0x06F: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01BDF000"
|
||||
|
||||
# 0x070: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C3B087"
|
||||
|
||||
# 0x071: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C7D000"
|
||||
|
||||
# 0x072: AND R00, 0x0F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C990F0"
|
||||
|
||||
# 0x073: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01CFB087"
|
||||
|
||||
# 0x074: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01D3D000"
|
||||
|
||||
# 0x075: POP R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01D7D002"
|
||||
|
||||
# 0x076: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01DBE000"
|
||||
|
||||
# 0x077: CALL 0x0B6
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01DFB0B6"
|
||||
|
||||
# 0x078: PUSH R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01E3C002"
|
||||
|
||||
# 0x079: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01E7C000"
|
||||
|
||||
# 0x07A: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01EBC000"
|
||||
|
||||
# 0x07B: MOV R02, 0x40
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01EC3402"
|
||||
|
||||
# 0x07C: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F1F000"
|
||||
|
||||
# 0x07D: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F5F000"
|
||||
|
||||
# 0x07E: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F9F000"
|
||||
|
||||
# 0x07F: SHR R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01FDF000"
|
||||
|
||||
# 0x080: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0203B087"
|
||||
|
||||
# 0x081: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0207D000"
|
||||
|
||||
# 0x082: AND R00, 0x0F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "020990F0"
|
||||
|
||||
# 0x083: CALL 0x087
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "020FB087"
|
||||
|
||||
# 0x084: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0213D000"
|
||||
|
||||
# 0x085: POP R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0217D002"
|
||||
|
||||
# 0x086: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "021BE000"
|
||||
|
||||
# 0x087: PUSH R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "021FC001"
|
||||
|
||||
# 0x088: MOV R01, R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02202001"
|
||||
|
||||
# 0x089: OR R01, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0225A021"
|
||||
|
||||
# 0x08A: MOVX (0xC3), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02288C31"
|
||||
|
||||
# 0x08B: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "022FB0E8"
|
||||
|
||||
# 0x08C: MOV R01, R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02302001"
|
||||
|
||||
# 0x08D: OR R01, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0235A021"
|
||||
|
||||
# 0x08E: OR R01, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0239B801"
|
||||
|
||||
# 0x08F: MOVX (0xC3), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "023C8C31"
|
||||
|
||||
# 0x090: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0243B0E8"
|
||||
|
||||
# 0x091: MOV R01, R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02442001"
|
||||
|
||||
# 0x092: OR R01, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0249A021"
|
||||
|
||||
# 0x093: MOVX (0xC3), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "024C8C31"
|
||||
|
||||
# 0x094: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0253B0E8"
|
||||
|
||||
# 0x095: POP R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0257D001"
|
||||
|
||||
# 0x096: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "025BE000"
|
||||
|
||||
# 0x097: PUSH R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "025FC001"
|
||||
|
||||
# 0x098: MOV R01, 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02603201"
|
||||
|
||||
# 0x099: OR R01, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0265A021"
|
||||
|
||||
# 0x09A: MOVX (0xC3), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02688C31"
|
||||
|
||||
# 0x09B: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "026FB0E8"
|
||||
|
||||
# 0x09C: MOV R01, 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02703201"
|
||||
|
||||
# 0x09D: OR R01, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0275A021"
|
||||
|
||||
# 0x09E: OR R01, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0279B801"
|
||||
|
||||
# 0x09F: MOVX (0xC3), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "027C8C31"
|
||||
|
||||
# 0x0A0: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0283B0E8"
|
||||
|
||||
# 0x0A1: MOVX R00, (0xC3)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02845C30"
|
||||
|
||||
# 0x0A2: MOV R01, 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02883201"
|
||||
|
||||
# 0x0A3: OR R01, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "028DA021"
|
||||
|
||||
# 0x0A4: MOVX (0xC3), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02908C31"
|
||||
|
||||
# 0x0A5: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0297B0E8"
|
||||
|
||||
# 0x0A6: POP R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "029BD001"
|
||||
|
||||
# 0x0A7: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "029FE000"
|
||||
|
||||
# 0x0A8: PUSH R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02A3C002"
|
||||
|
||||
# 0x0A9: MOV R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02A43002"
|
||||
|
||||
# 0x0AA: CALL 0x097
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02ABB097"
|
||||
|
||||
# 0x0AB: SHL R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02ADE000"
|
||||
|
||||
# 0x0AC: SHL R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B1E000"
|
||||
|
||||
# 0x0AD: SHL R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B5E000"
|
||||
|
||||
# 0x0AE: SHL R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B9E000"
|
||||
|
||||
# 0x0AF: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02BFC000"
|
||||
|
||||
# 0x0B0: CALL 0x097
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C3B097"
|
||||
|
||||
# 0x0B1: AND R00, 0x0F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C590F0"
|
||||
|
||||
# 0x0B2: POP R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02CBD002"
|
||||
|
||||
# 0x0B3: OR R00, R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02CDA020"
|
||||
|
||||
# 0x0B4: POP R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02D3D002"
|
||||
|
||||
# 0x0B5: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02D7E000"
|
||||
|
||||
# 0x0B6: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02DBC000"
|
||||
|
||||
# 0x0B7: CALL 0x0A8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02DFB0A8"
|
||||
|
||||
# 0x0B8: AND R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02E19800"
|
||||
|
||||
# 0x0B9: JZ 0x0BC
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02E710BC"
|
||||
|
||||
# 0x0BA: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02EBB0E8"
|
||||
|
||||
# 0x0BB: JMP 0x0B7
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02EF00B7"
|
||||
|
||||
# 0x0BC: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02F3D000"
|
||||
|
||||
# 0x0BD: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02F7E000"
|
||||
|
||||
# 0x0BE: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02FBC00F"
|
||||
|
||||
# 0x0BF: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02FC30AF"
|
||||
|
||||
# 0x0C0: CALL 0x0C5
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0303B0C5"
|
||||
|
||||
# 0x0C1: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0305501F"
|
||||
|
||||
# 0x0C2: JNZ 0x0C0
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "030B20C0"
|
||||
|
||||
# 0x0C3: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "030FD00F"
|
||||
|
||||
# 0x0C4: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0313E000"
|
||||
|
||||
# 0x0C5: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0317C00F"
|
||||
|
||||
# 0x0C6: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "031830AF"
|
||||
|
||||
# 0x0C7: CALL 0x0CC
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "031FB0CC"
|
||||
|
||||
# 0x0C8: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0321501F"
|
||||
|
||||
# 0x0C9: JNZ 0x0C7
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032720C7"
|
||||
|
||||
# 0x0CA: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032BD00F"
|
||||
|
||||
# 0x0CB: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032FE000"
|
||||
|
||||
# 0x0CC: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0333C00F"
|
||||
|
||||
# 0x0CD: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033430AF"
|
||||
|
||||
# 0x0CE: CALL 0x0D3
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033BB0D3"
|
||||
|
||||
# 0x0CF: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033D501F"
|
||||
|
||||
# 0x0D0: JNZ 0x0CE
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034320CE"
|
||||
|
||||
# 0x0D1: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0347D00F"
|
||||
|
||||
# 0x0D2: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034BE000"
|
||||
|
||||
# 0x0D3: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034FC00F"
|
||||
|
||||
# 0x0D4: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "035030AF"
|
||||
|
||||
# 0x0D5: CALL 0x0DA
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0357B0DA"
|
||||
|
||||
# 0x0D6: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0359501F"
|
||||
|
||||
# 0x0D7: JNZ 0x0D5
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "035F20D5"
|
||||
|
||||
# 0x0D8: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0363D00F"
|
||||
|
||||
# 0x0D9: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0367E000"
|
||||
|
||||
# 0x0DA: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "036BC00F"
|
||||
|
||||
# 0x0DB: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "036C30AF"
|
||||
|
||||
# 0x0DC: CALL 0x0E1
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0373B0E1"
|
||||
|
||||
# 0x0DD: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0375501F"
|
||||
|
||||
# 0x0DE: JNZ 0x0DC
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "037B20DC"
|
||||
|
||||
# 0x0DF: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "037FD00F"
|
||||
|
||||
# 0x0E0: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0383E000"
|
||||
|
||||
# 0x0E1: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0387C00F"
|
||||
|
||||
# 0x0E2: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "038830AF"
|
||||
|
||||
# 0x0E3: CALL 0x0E8
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "038FB0E8"
|
||||
|
||||
# 0x0E4: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0391501F"
|
||||
|
||||
# 0x0E5: JNZ 0x0E3
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039720E3"
|
||||
|
||||
# 0x0E6: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039BD00F"
|
||||
|
||||
# 0x0E7: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039FE000"
|
||||
|
||||
# 0x0E8: PUSH R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03A3C00F"
|
||||
|
||||
# 0x0E9: MOV R15, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03A430AF"
|
||||
|
||||
# 0x0EA: CALL 0x0EF
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03ABB0EF"
|
||||
|
||||
# 0x0EB: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03AD501F"
|
||||
|
||||
# 0x0EC: JNZ 0x0EA
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B320EA"
|
||||
|
||||
# 0x0ED: POP R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B7D00F"
|
||||
|
||||
# 0x0EE: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03BBE000"
|
||||
|
||||
# 0x0EF: NOP
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03BC0000"
|
||||
|
||||
# 0x0F0: NOP
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C00000"
|
||||
|
||||
# 0x0F1: NOP
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C40000"
|
||||
|
||||
# 0x0F2: NOP
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C80000"
|
||||
|
||||
# 0x0F3: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03CFE000"
|
||||
|
||||
|
||||
::chipscope::csejtag_target unlock $handle
|
||||
::chipscope::csejtag_target close $handle
|
||||
::chipscope::csejtag_session destroy $handle
|
||||
exit
|
||||
@@ -0,0 +1,51 @@
|
||||
#!/bin/sh
|
||||
|
||||
# ----------------------------------------------------------------------
|
||||
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
|
||||
# This file: rom-file generation for cpu_core
|
||||
|
||||
# Copyright (C) 2007 J. Ahrensfeld
|
||||
|
||||
# This library is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU Lesser General Public
|
||||
# License as published by the Free Software Foundation; either
|
||||
# version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
# This library is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
# Lesser General Public License for more details.
|
||||
|
||||
# You should have received a copy of the GNU Lesser General Public
|
||||
# License along with this library; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
||||
# For questions and ideas, please contact the author at jens@jayfield.org
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
|
||||
TARGET=$2
|
||||
DSTDIR=$1
|
||||
|
||||
JASM_HOME=/cygdrive/w/vhdl/lib/CPUs/JCpu/tools
|
||||
|
||||
$JASM_HOME/jasm.rb $TARGET.jsm
|
||||
|
||||
irom_tcl_snippet="$TARGET.irom.tcl.snip"
|
||||
irom_vhdl_snippet="$TARGET.irom.vhdl.snip"
|
||||
irom_ld_vhdl_snippet="$TARGET.irom_ld.vhdl.snip"
|
||||
xrom_tcl_snippet="$TARGET.xrom.tcl.snip"
|
||||
xrom_vhdl_snippet="$TARGET.xrom.vhdl.snip"
|
||||
xrom_ld_vhdl_snippet="$TARGET.xrom_ld.vhdl.snip"
|
||||
|
||||
$JASM_HOME/insrom.rb $irom_vhdl_snippet $JASM_HOME/irom.vhd.tpl >$DSTDIR/$TARGET\_irom.vhdl
|
||||
$JASM_HOME/insrom.rb $irom_ld_vhdl_snippet $JASM_HOME/irom_ld.vhd.tpl >$DSTDIR/$TARGET\_irom_ld.vhdl
|
||||
|
||||
$JASM_HOME/insrom.rb $xrom_vhdl_snippet $JASM_HOME/xrom.vhd.tpl >$DSTDIR/$TARGET\_xrom.vhdl
|
||||
$JASM_HOME/insrom.rb $xrom_ld_vhdl_snippet $JASM_HOME/xrom_ld.vhd.tpl >$DSTDIR/$TARGET\_xrom_ld.vhdl
|
||||
|
||||
cat $irom_tcl_snippet > $TARGET.tcl.snip.snip
|
||||
cat $xrom_tcl_snippet >> $TARGET.tcl.snip.snip
|
||||
$JASM_HOME/insrom.rb $TARGET.tcl.snip.snip $JASM_HOME/rom.tcl.tpl >$TARGET.tcl
|
||||
|
||||
rm -f *.snip
|
||||
@@ -0,0 +1,773 @@
|
||||
; -------------------------------------------------
|
||||
; Register definitions
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/cregs.inc.jsm"
|
||||
include "xregs.inc.jsm"
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
BURST_LEN: equ 8
|
||||
SD_CMD_WRITE: equ 0x06
|
||||
SD_CMD_READ: equ 0x05
|
||||
START_ADDR0: equ 0x00
|
||||
START_ADDR1: equ 0x00
|
||||
START_ADDR2: equ 0x20
|
||||
END_ADDR0: equ 0xF8
|
||||
END_ADDR1: equ 0xFF
|
||||
END_ADDR2: equ 0xFF
|
||||
PEN_TIMEOUT0: equ 0xE8
|
||||
PEN_TIMEOUT1: equ 0x03
|
||||
PEN_BUFSIZE: equ 64
|
||||
|
||||
; External RAM/ROM
|
||||
xmem
|
||||
crlf: dc 13, 10, 0
|
||||
greet_txt: dc "SDRAM Test", 0
|
||||
msg_txt0: dc "Clearing SDRAM", 0
|
||||
msg_txt1: dc "Writing SDRAM", 0
|
||||
msg_txt2: dc "Reading SDRAM", 0
|
||||
msg_txt3: dc "Reading Bitmap", 0
|
||||
verify_ok: dc "Verify OK", 0
|
||||
verify_nok: dc "Failed at ", 0
|
||||
dot: dc ".", 0
|
||||
|
||||
org 0x80
|
||||
sdram_data: db 8 ; SDRAM data window at X:0x80
|
||||
|
||||
; Internal RAM
|
||||
cmem 0
|
||||
block_cnt: db 1
|
||||
round_cnt: db 1
|
||||
bmp_offset: db 4
|
||||
pixel_buf: db 32
|
||||
|
||||
pen_rx_buf: db 128
|
||||
pen_rx_ptr_r: db 1
|
||||
pen_rx_ptr_w: db 1
|
||||
pen_timeout: db 2
|
||||
pen_bit_cnt_w: db 1
|
||||
pen_octet_w: db 1
|
||||
pen_octet_r: db 1
|
||||
pen_last_state: db 1
|
||||
pen_enable: db 1
|
||||
pen_bit_cnt_r: db 1
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
code
|
||||
reset: org 0x000
|
||||
jmp main
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
org 0x001
|
||||
pen_isr: push R0
|
||||
push R1
|
||||
push R2
|
||||
|
||||
u_get_nxt: xin R1, (btn_port)
|
||||
movc R0, (pen_octet_w)
|
||||
and R1, 0x20
|
||||
shl R1
|
||||
shl R1
|
||||
shl R1
|
||||
rolc R0
|
||||
movc (pen_octet_w), R0
|
||||
movc R1, (pen_bit_cnt_w)
|
||||
inc R1
|
||||
movc (pen_bit_cnt_w), R1
|
||||
cmp R1, 8
|
||||
jne ex_uart_isr
|
||||
mov R1, 0
|
||||
movc (pen_bit_cnt_w), R1
|
||||
movc R2, (pen_rx_ptr_w)
|
||||
movc (R2), R0
|
||||
inc R2
|
||||
cmp R2, pen_rx_buf+128
|
||||
jne u_upd_nxt
|
||||
mov R2, pen_rx_buf
|
||||
u_upd_nxt: movc (pen_rx_ptr_w), R2
|
||||
ex_uart_isr: call Timer_isr
|
||||
pop R2
|
||||
pop R1
|
||||
pop R0
|
||||
reti
|
||||
|
||||
Timer_isr: xin R0, (btn_port)
|
||||
and R0, 0x20
|
||||
shr R0
|
||||
xin R1, (ctrl_reg)
|
||||
and R1, 0xEF
|
||||
or R0, R1
|
||||
xout (ctrl_reg), R0
|
||||
xin R0, (btn_port)
|
||||
and R0, 0x01
|
||||
jz btn_chk2
|
||||
mov R0, vga_read_addr
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x00
|
||||
jmp ex_t_isr
|
||||
btn_chk2: xin R0, (btn_port)
|
||||
and R0, 0x02
|
||||
jz ex_t_isr
|
||||
mov R0, vga_read_addr
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x20
|
||||
ex_t_isr: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
main: call pen_init
|
||||
call LCD_init
|
||||
mov R0, 0x00
|
||||
xout (led_port), R0
|
||||
|
||||
mov R0, CTRL_VGA_ENABLE
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, CTRL_TIMER_ENABLE
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
mov R0, 0x03
|
||||
cout (cpu_int_ctrl), R0
|
||||
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
mov R0, 0
|
||||
mov R1, 0xC0
|
||||
xout (reg_color_red), R1
|
||||
xout (reg_color_grn), R1
|
||||
xout (reg_color_blu), R1
|
||||
|
||||
call cg_wait_rdy
|
||||
call cg_clr_screen
|
||||
|
||||
; Print greeting message
|
||||
mov R1, greet_txt
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, greet_txt
|
||||
call cg_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
xin R0, (ctrl_reg)
|
||||
and R0, 0xCF
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
mov R0, 0
|
||||
movc (round_cnt), R0
|
||||
|
||||
mov R0, 0x0F
|
||||
xout (timer_reload+0), R0
|
||||
mov R0, 0x27
|
||||
xout (timer_reload+1), R0
|
||||
mov R0, 0x00
|
||||
xout (timer_reload+2), R0
|
||||
|
||||
main_loop: call do_clear
|
||||
call write_uart_data
|
||||
ML1: call do_write
|
||||
call do_read
|
||||
movc R0, (round_cnt)
|
||||
inc R0
|
||||
movc (round_cnt), R0
|
||||
jmp ML1
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM clear
|
||||
; ----------------------------------------------------------
|
||||
do_clear:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Clear message
|
||||
mov R1, msg_txt0
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt0
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
mov R0, 0
|
||||
mov R1, 0
|
||||
mov R2, 0
|
||||
call AddrCnt_Init
|
||||
|
||||
; Fill SDR Buffer with zeros
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
buf_clr_loop: movx (R0), 0
|
||||
inc R0
|
||||
dec R15
|
||||
jnz buf_clr_loop
|
||||
|
||||
sdr_clear: mov R2, BURST_LEN
|
||||
|
||||
poll_clear_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_clear_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz poll_clear_full
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, END_ADDR0
|
||||
jne next_addr_c
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, END_ADDR1
|
||||
jne next_addr_c
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, END_ADDR2
|
||||
jeq clear_finished
|
||||
|
||||
; Advance address counter
|
||||
next_addr_c: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
|
||||
jmp sdr_clear
|
||||
|
||||
clear_finished:
|
||||
call AddrCnt_Disp
|
||||
call delay1s
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
write_uart_data:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Clear message
|
||||
mov R1, msg_txt3
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt3
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
; mov R0, 0xF8 ; 800x600
|
||||
; mov R1, 0x52 ; 800x600
|
||||
; mov R2, 0x07 ; 800x600
|
||||
pen_restart: mov R0, 0x00 ; 1280x1024
|
||||
mov R1, 0x00 ; 1280x1024
|
||||
mov R2, 0x00 ; 1280x1024
|
||||
call AddrCnt_Init
|
||||
call pen_init
|
||||
|
||||
chk_pen_off: xin R0, (btn_port)
|
||||
and R0, 0x20
|
||||
jnz chk_pen_off
|
||||
mov R0, 1
|
||||
chk_pen_on: xin R0, (btn_port)
|
||||
and R0, 0x20
|
||||
jz chk_pen_on
|
||||
movc R0, (pen_rx_ptr_w)
|
||||
sub R0, 5
|
||||
cmp R0, pen_rx_buf+128
|
||||
jlt set_rx_ptr
|
||||
sub R0, 128
|
||||
set_rx_ptr: movc (pen_rx_ptr_r), R0
|
||||
|
||||
|
||||
; Fill SDR Buffer
|
||||
get_pen: mov R1, pixel_buf
|
||||
wls0: call pen_getchar
|
||||
movc (R1), R0
|
||||
inc R1
|
||||
cmp R1, pixel_buf+8
|
||||
jne wls0
|
||||
|
||||
; Start SDR write
|
||||
xin R0, (sdram_addr+0)
|
||||
push R0
|
||||
xin R0, (sdram_addr+1)
|
||||
push R0
|
||||
xin R0, (sdram_addr+2)
|
||||
push R0
|
||||
|
||||
mov R15, 64
|
||||
|
||||
write_sd_block: mov R2, BURST_LEN
|
||||
mov R1, pixel_buf
|
||||
copy_sdram: mov R3, sdram_data
|
||||
copy_pixel: movc R0, (R1)
|
||||
movx (R3), R0
|
||||
inc R3
|
||||
movx (R3), R0
|
||||
inc R3
|
||||
movx (R3), R0
|
||||
inc R3
|
||||
inc R1
|
||||
cmp R3, sdram_data+6
|
||||
jne copy_pixel
|
||||
pwf: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz pwf
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
sub R2, 2
|
||||
jnz copy_sdram
|
||||
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
; call AddrCnt_Disp
|
||||
xin R0, (sdram_addr+1)
|
||||
add R0, 0x05
|
||||
xout (sdram_addr+1), R0
|
||||
xin R0, (sdram_addr+2)
|
||||
addc R0, 0x00
|
||||
xout (sdram_addr+2), R0
|
||||
|
||||
dec R15
|
||||
jnz write_sd_block
|
||||
|
||||
; Advance address counter
|
||||
pop R0,
|
||||
xout (sdram_addr+2), R0
|
||||
pop R0
|
||||
xout (sdram_addr+1), R0
|
||||
pop R0
|
||||
xout (sdram_addr+0), R0
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, 0xF8
|
||||
jne next_addr
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, 0x04
|
||||
jne next_addr
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, 0x00
|
||||
jeq pen_restart
|
||||
|
||||
next_addr: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
jmp get_pen
|
||||
sdw_fin: call delay1s
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
do_write:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Write message
|
||||
mov R1, msg_txt1
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt1
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
mov R0, START_ADDR0
|
||||
mov R1, START_ADDR1
|
||||
mov R2, START_ADDR2
|
||||
call AddrCnt_Init
|
||||
movc R0, (round_cnt)
|
||||
movc (block_cnt), R0
|
||||
|
||||
sdr_write: mov R2, BURST_LEN
|
||||
|
||||
; Fill SDR Buffer
|
||||
sdr_burst_wr: movc R1, (block_cnt)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
write_loop: movx (R0), R1
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz write_loop
|
||||
|
||||
poll_write_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_write_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (block_cnt)
|
||||
inc R0
|
||||
movc (block_cnt), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz sdr_burst_wr
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, END_ADDR0
|
||||
jne next_addr_w
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, END_ADDR1
|
||||
jne next_addr_w
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, END_ADDR2
|
||||
jeq write_finished
|
||||
|
||||
; Advance address counter
|
||||
next_addr_w: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
|
||||
jmp sdr_write
|
||||
|
||||
write_finished: call AddrCnt_Disp
|
||||
call delay1s
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Verify
|
||||
; ----------------------------------------------------------
|
||||
do_read:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Read message
|
||||
mov R1, msg_txt2
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt2
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
mov R0, START_ADDR0
|
||||
mov R1, START_ADDR1
|
||||
mov R2, START_ADDR2
|
||||
call AddrCnt_Init
|
||||
movc R0, (round_cnt)
|
||||
movc (block_cnt), R0
|
||||
|
||||
; flush_data
|
||||
flush_data: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_READ_DATA_EMPTY
|
||||
jnz sdr_read
|
||||
mov R0, FIFO_CTRL_IS_READ
|
||||
xout (sdram_reg), R0
|
||||
jmp flush_data
|
||||
|
||||
sdr_read: ; Start SDR read
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
mov R3, BURST_LEN
|
||||
|
||||
; Wait last read
|
||||
poll_read_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_READ_DATA_EMPTY
|
||||
jnz poll_read_fin
|
||||
|
||||
; Verify SDR Buffer
|
||||
movc R1, (block_cnt)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
read_loop: movx R2, (R0)
|
||||
cmp R2, R1
|
||||
jne verify_error
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz read_loop
|
||||
|
||||
; Advance Read-FIFO
|
||||
mov R0, FIFO_CTRL_IS_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (block_cnt)
|
||||
inc R0
|
||||
movc (block_cnt), R0
|
||||
|
||||
sub R3, 2
|
||||
jnz poll_read_fin
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, END_ADDR0
|
||||
jne next_addr_r
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, END_ADDR1
|
||||
jne next_addr_r
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, END_ADDR2
|
||||
jeq read_finished
|
||||
|
||||
; Advance address counter
|
||||
next_addr_r: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
jmp sdr_read
|
||||
|
||||
; ----------------------------------------------------------
|
||||
wait_cmd_rdy: push R0
|
||||
wait4cmd: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_CMD_FULL
|
||||
jnz wait4cmd
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
read_finished:
|
||||
no_error: mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
mov R1, verify_ok
|
||||
call LCD_putsx
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
call print_addr
|
||||
|
||||
mov R1, verify_ok
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
jmp ende
|
||||
|
||||
verify_error: mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
mov R1, verify_nok
|
||||
call LCD_putsx
|
||||
call print_addr
|
||||
call print_data
|
||||
mov R1, verify_nok
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, 0x10
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
jmp ende
|
||||
|
||||
ende: call delay1s
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
AddrCnt_Init: xout (sdram_addr+0), R0
|
||||
xout (sdram_addr+1), R1
|
||||
xout (sdram_addr+2), R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: increment value
|
||||
AddrCnt_Inc: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
add R1, R0
|
||||
addc R2, 0
|
||||
addc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: decrement value
|
||||
AddrCnt_Dec: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
sub R1, R0
|
||||
subc R2, 0
|
||||
subc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Display Address counter
|
||||
AddrCnt_Disp: mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
call print_addr
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; PutHexByte
|
||||
; R0 : Byte value
|
||||
PutHexByte: push R1
|
||||
call bin2hex
|
||||
call LCD_writechar
|
||||
mov R0, R1
|
||||
call LCD_writechar
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_addr: push R0
|
||||
xin R0, (sdram_addr+2)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+1)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+0)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; R1 : ptr to byte array
|
||||
print_dword: push R0
|
||||
add R1, 3
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_data: push R0
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
movx R0, (sdram_data+7)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+6)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+5)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+4)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+3)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+2)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+1)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+0)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
pen_init: push R0
|
||||
mov R0, 0
|
||||
movc (pen_enable), R0
|
||||
call delay10ms
|
||||
mov R0, pen_rx_buf
|
||||
movc (pen_rx_ptr_r), R0
|
||||
movc (pen_rx_ptr_w), R0
|
||||
mov R0, PEN_TIMEOUT0
|
||||
movc (pen_timeout+0), R0
|
||||
mov R0, PEN_TIMEOUT1
|
||||
movc (pen_timeout+1), R0
|
||||
mov R0, 0
|
||||
movc (pen_bit_cnt_w), R0
|
||||
movc (pen_octet_w), R0
|
||||
movc (pen_octet_r), R0
|
||||
mov R0, 7
|
||||
movc (pen_bit_cnt_r), R0
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Params: none
|
||||
; Return:
|
||||
; R0 : received character
|
||||
pen_getchar: push R1
|
||||
push R2
|
||||
push R3
|
||||
movc R3, (pen_octet_r)
|
||||
movc R1, (pen_rx_ptr_r)
|
||||
movc R2, (pen_bit_cnt_r)
|
||||
inc R2
|
||||
cmp R2, 8
|
||||
jne u_upd_r_ptr
|
||||
mov R2, 0
|
||||
|
||||
pen_wait_rx: movc R0, (pen_rx_ptr_w)
|
||||
cmp R0, R1
|
||||
jeq pen_wait_rx
|
||||
movc R3, (R1)
|
||||
inc R1
|
||||
cmp R1, pen_rx_buf+128
|
||||
jne u_upd_r_ptr
|
||||
mov R1, pen_rx_buf
|
||||
u_upd_r_ptr: movc (pen_rx_ptr_r), R1
|
||||
movc (pen_bit_cnt_r), R2
|
||||
ex_pen_gc: mov R0, 0xFF
|
||||
shl R3
|
||||
jnc pen_is_zero
|
||||
mov R0, 0x00
|
||||
pen_is_zero: movc (pen_octet_r), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/utils.inc.jsm"
|
||||
include "../../../lib/jasm/lcd.inc.jsm"
|
||||
include "../../../lib/jasm/cg.inc.jsm"
|
||||
include "../../../lib/jasm/delays.inc.jsm"
|
||||
include "../../../lib/jasm/uart.inc.jsm"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,64 @@
|
||||
# ----------------------------------------------------------------------
|
||||
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
|
||||
# This file: The ROM file for upload to target over JTAG
|
||||
|
||||
# Copyright (C) 2007 J. Ahrensfeld
|
||||
|
||||
# This library is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU Lesser General Public
|
||||
# License as published by the Free Software Foundation; either
|
||||
# version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
# This library is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
# Lesser General Public License for more details.
|
||||
|
||||
# You should have received a copy of the GNU Lesser General Public
|
||||
# License along with this library; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
||||
# For questions and ideas, please contact the author at jens@jayfield.org
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
|
||||
# Source JTAG/TCL frame work
|
||||
#cd $env(CHIPSCOPE)\bin\nt
|
||||
cd F:\\Xilinx9\\ChipScope_Pro_9_1i\\bin\\nt
|
||||
source csejtag.tcl
|
||||
|
||||
namespace import ::chipscope::*
|
||||
|
||||
# Platform USB Cable
|
||||
set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \
|
||||
"frequency=6000000"]
|
||||
# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
|
||||
|
||||
set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB
|
||||
set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS
|
||||
|
||||
# Create session
|
||||
set handle [::chipscope::csejtag_session create 0]
|
||||
|
||||
# Open JTAG and lock
|
||||
set open_result [::chipscope::csejtag_target open $handle $CABLE_NAME 0 $CABLE_ARGS]
|
||||
set lock_result [::chipscope::csejtag_target lock $handle 1000]
|
||||
|
||||
set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]
|
||||
|
||||
# Get Device ID
|
||||
set devtype "Virtex-4SX"
|
||||
set devid 2
|
||||
|
||||
# ---------------------------------------------------------------
|
||||
# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA
|
||||
# User 1
|
||||
::chipscope::csejtag_tap shift_chain_ir $handle $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 10 3C2
|
||||
|
||||
# Write Program
|
||||
# JASM_ROM_INSERT_HERE
|
||||
|
||||
::chipscope::csejtag_target unlock $handle
|
||||
::chipscope::csejtag_target close $handle
|
||||
::chipscope::csejtag_session destroy $handle
|
||||
exit
|
||||
@@ -0,0 +1,306 @@
|
||||
; -------------------------------------------------
|
||||
; Register definitions
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/cregs.inc.jsm"
|
||||
include "xregs.inc.jsm"
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
addr_incr: equ 2
|
||||
addr_msb_max: equ 0xFF
|
||||
|
||||
; External RAM/ROM
|
||||
xmem
|
||||
greet_txt: dc "SDRAM Test", 0
|
||||
msg_txt0: dc "Clearing SDRAM", 0
|
||||
msg_txt1: dc "Writing SDRAM", 0
|
||||
msg_txt2: dc "Reading SDRAM", 0
|
||||
verify_ok: dc "Verify OK", 0
|
||||
verify_nok: dc "Verify Failed", 0
|
||||
dot: dc ".", 0
|
||||
|
||||
org 0x80
|
||||
sdram_data: db 8 ; SDRAM data window at X:0x80
|
||||
|
||||
; Internal RAM
|
||||
cmem 0
|
||||
round: db 1
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
code
|
||||
reset: org 0x000
|
||||
jmp main
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
org 0x001
|
||||
reti
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
main:
|
||||
call LCD_init
|
||||
mov R0, 0x00
|
||||
xout (led_port), R0
|
||||
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Wait until SDRAM ready
|
||||
poll_bsy_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, SDRAM_STAT_BUSY
|
||||
jnz poll_bsy_fin
|
||||
|
||||
; Print greeting message
|
||||
mov R1, greet_txt
|
||||
call LCD_putsx
|
||||
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, 0x10
|
||||
xout (ctrl_reg), R0
|
||||
call delay100ms
|
||||
or R0, 0x20
|
||||
xout (ctrl_reg), R0
|
||||
call delay100ms
|
||||
and R0, 0xEF
|
||||
xout (ctrl_reg), R0
|
||||
call delay100ms
|
||||
and R0, 0xCF
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
jmp do_clear
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM clear
|
||||
; ----------------------------------------------------------
|
||||
do_clear: ; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Clear message
|
||||
mov R1, msg_txt0
|
||||
call LCD_putsx
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
|
||||
; Fill SDR Buffer with zeros
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
buf_clr_loop: movx (R0), 0
|
||||
inc R0
|
||||
dec R15
|
||||
jnz buf_clr_loop
|
||||
|
||||
sdr_clear: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq clear_finished
|
||||
|
||||
; Wait finished last write
|
||||
poll_clear_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, SDRAM_STAT_WRITE_BUSY
|
||||
|
||||
jnz poll_clear_fin
|
||||
|
||||
; Start SDR write
|
||||
mov R0, sdram_reg
|
||||
xout (R0), SDRAM_CTRL_WRITE_REQUEST
|
||||
|
||||
; Advance address counter
|
||||
mov R0, addr_incr
|
||||
call AddrCnt_Adv
|
||||
|
||||
jmp sdr_clear
|
||||
|
||||
clear_finished:
|
||||
call AddrCnt_Disp
|
||||
call delay1s
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
do_write: ; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Write message
|
||||
mov R1, msg_txt1
|
||||
call LCD_putsx
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_write: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq write_finished
|
||||
|
||||
; Fill SDR Buffer
|
||||
movc R1, (round)
|
||||
; xin R0, (sdram_addr+2)
|
||||
; cmp R0, 0x7F
|
||||
; jne force_no_err
|
||||
; inc R1
|
||||
force_no_err: mov R0, sdram_data
|
||||
mov R15, 8
|
||||
write_loop: movx (R0), R1
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz write_loop
|
||||
|
||||
; Wait finished last write
|
||||
poll_write_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, SDRAM_STAT_WRITE_BUSY
|
||||
jnz poll_write_fin
|
||||
|
||||
; Start SDR write
|
||||
mov R0, sdram_reg
|
||||
xout (R0), SDRAM_CTRL_WRITE_REQUEST
|
||||
|
||||
; Advance address counter
|
||||
mov R0, addr_incr
|
||||
call AddrCnt_Adv
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
|
||||
jmp sdr_write
|
||||
|
||||
write_finished: call AddrCnt_Disp
|
||||
call delay1s
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Verify
|
||||
; ----------------------------------------------------------
|
||||
do_read: ; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Read message
|
||||
mov R1, msg_txt2
|
||||
call LCD_putsx
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_read: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq read_finished
|
||||
|
||||
; Start SDR read
|
||||
mov R0, sdram_reg
|
||||
xout (R0), SDRAM_CTRL_READ_REQUEST
|
||||
|
||||
; Wait last read
|
||||
poll_read_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, SDRAM_STAT_READ_BUSY
|
||||
jnz poll_read_fin
|
||||
|
||||
read_back_mem:
|
||||
; Verify SDR Buffer
|
||||
movc R1, (round)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
read_loop: movx R2, (R0)
|
||||
cmp R2, R1
|
||||
jne verify_error
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz read_loop
|
||||
|
||||
; Advance address counter
|
||||
mov R0, addr_incr
|
||||
call AddrCnt_Adv
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
jmp sdr_read
|
||||
|
||||
; ----------------------------------------------------------
|
||||
read_finished:
|
||||
no_error: mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
mov R1, verify_ok
|
||||
call LCD_putsx
|
||||
jmp ende
|
||||
|
||||
verify_error: mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
mov R1, verify_nok
|
||||
call LCD_putsx
|
||||
jmp ende
|
||||
|
||||
ende: call delay1s
|
||||
jmp do_clear
|
||||
|
||||
; -------------------------------------------------
|
||||
AddrCnt_Init: push R0
|
||||
mov R0, 0x00
|
||||
xout (sdram_addr+0), R0
|
||||
xout (sdram_addr+1), R0
|
||||
xout (sdram_addr+2), R0
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: increment value
|
||||
AddrCnt_Adv: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
add R1, R0
|
||||
addc R2, 0
|
||||
addc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Display Address counter
|
||||
AddrCnt_Disp: mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
|
||||
xin R0, (sdram_addr+2)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+1)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+0)
|
||||
call PutHexByte
|
||||
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; PutHexByte
|
||||
; R0 : Byte value
|
||||
PutHexByte: call bin2hex
|
||||
call LCD_writechar
|
||||
mov R0, R1
|
||||
call LCD_writechar
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/utils.inc.jsm"
|
||||
include "../../../lib/jasm/lcd.inc.jsm"
|
||||
include "../../../lib/jasm/delays.inc.jsm"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,215 @@
|
||||
; -------------------------------------------------
|
||||
; Register definitions
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/cregs.inc.jsm"
|
||||
include "xregs.inc.jsm"
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
addr_incr: equ 2
|
||||
addr_lsb_max: equ 0x08
|
||||
|
||||
; External RAM/ROM
|
||||
xmem
|
||||
org 0x80
|
||||
sdram_data: db 8 ; SDRAM data window at X:0x80
|
||||
|
||||
; Internal RAM
|
||||
cmem 0
|
||||
round: db 1
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
code
|
||||
reset: org 0x000
|
||||
jmp main
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
org 0x001
|
||||
reti
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
main: mov R0, 0x00
|
||||
xout (led_port), R0
|
||||
xin R0, (ctrl_reg)
|
||||
and R0, 0xCF
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
; Wait until SDRAM ready
|
||||
poll_bsy_fin: xin R0, (sdram_reg)
|
||||
and R0, SDRAM_STAT_BUSY
|
||||
jnz poll_bsy_fin
|
||||
|
||||
jmp do_clear
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM clear
|
||||
; ----------------------------------------------------------
|
||||
do_clear:
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
|
||||
; Fill SDR Buffer with zeros
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
buf_clr_loop: movx (R0), 0
|
||||
inc R0
|
||||
dec R15
|
||||
jnz buf_clr_loop
|
||||
|
||||
sdr_clear: xin R0, (sdram_addr+0)
|
||||
cmp R0, addr_lsb_max
|
||||
jeq clear_finished
|
||||
|
||||
; Wait finished last write
|
||||
poll_clear_fin: xin R0, (sdram_reg)
|
||||
and R0, SDRAM_STAT_WRITE_BUSY
|
||||
jnz poll_clear_fin
|
||||
|
||||
; Start SDR write
|
||||
mov R0, sdram_reg
|
||||
xout (R0), SDRAM_CTRL_WRITE_REQUEST
|
||||
|
||||
; Advance address counter
|
||||
mov R0, addr_incr
|
||||
call AddrCnt_Adv
|
||||
|
||||
jmp sdr_clear
|
||||
|
||||
clear_finished:
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
do_write:
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_write: xin R0, (sdram_addr+0)
|
||||
cmp R0, addr_lsb_max
|
||||
jeq write_finished
|
||||
|
||||
; Fill SDR Buffer
|
||||
movc R1, (round)
|
||||
force_no_err: mov R0, sdram_data
|
||||
mov R15, 8
|
||||
write_loop: movx (R0), R1
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz write_loop
|
||||
|
||||
; Wait finished last write
|
||||
poll_write_fin: xin R0, (sdram_reg)
|
||||
and R0, SDRAM_STAT_WRITE_BUSY
|
||||
jnz poll_write_fin
|
||||
|
||||
nop
|
||||
|
||||
; Start SDR write
|
||||
mov R0, sdram_reg
|
||||
xout (R0), SDRAM_CTRL_WRITE_REQUEST
|
||||
|
||||
; Advance address counter
|
||||
mov R0, addr_incr
|
||||
call AddrCnt_Adv
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
|
||||
jmp sdr_write
|
||||
|
||||
write_finished:
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Verify
|
||||
; ----------------------------------------------------------
|
||||
do_read:
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_read: xin R0, (sdram_addr+0)
|
||||
cmp R0, addr_lsb_max
|
||||
jeq read_finished
|
||||
|
||||
; Start SDR read
|
||||
mov R0, sdram_reg
|
||||
xout (R0), SDRAM_CTRL_READ_REQUEST
|
||||
|
||||
; Wait last read
|
||||
poll_read_fin: xin R0, (sdram_reg)
|
||||
and R0, SDRAM_STAT_READ_BUSY
|
||||
jnz poll_read_fin
|
||||
|
||||
read_back_mem:
|
||||
; Verify SDR Buffer
|
||||
movc R1, (round)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
read_loop: movx R2, (R0)
|
||||
cmp R2, R1
|
||||
jne verify_error
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz read_loop
|
||||
|
||||
; Advance address counter
|
||||
mov R0, addr_incr
|
||||
call AddrCnt_Adv
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
jmp sdr_read
|
||||
|
||||
; ----------------------------------------------------------
|
||||
read_finished:
|
||||
no_error: jmp ende
|
||||
|
||||
verify_error: xin R0, (ctrl_reg)
|
||||
or R0, 0x10
|
||||
xout (ctrl_reg), R0
|
||||
jmp ende
|
||||
|
||||
ende: jmp ende
|
||||
|
||||
; -------------------------------------------------
|
||||
AddrCnt_Init: push R0
|
||||
mov R0, 0x00
|
||||
xout (sdram_addr+0), R0
|
||||
xout (sdram_addr+1), R0
|
||||
xout (sdram_addr+2), R0
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: increment value
|
||||
AddrCnt_Adv: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
add R1, R0
|
||||
addc R2, 0
|
||||
addc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
|
||||
@@ -0,0 +1,542 @@
|
||||
# ----------------------------------------------------------------------
|
||||
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
|
||||
# This file: The ROM file for upload to target over JTAG
|
||||
#
|
||||
# Copyright (C) 2007 J. Ahrensfeld
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
# For questions and ideas, please contact the author at jens@jayfield.org
|
||||
#
|
||||
# ---------------------------------------------------------------------
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
# For Chipscope 9.1
|
||||
# ---------------------------------------------------------------------
|
||||
# Source JTAG/TCL frame work
|
||||
cd $env(CHIPSCOPE)\\bin\\nt
|
||||
source csejtag.tcl
|
||||
|
||||
namespace import ::chipscope::*
|
||||
|
||||
# Platform USB Cable
|
||||
set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"]
|
||||
# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
|
||||
|
||||
# Create session
|
||||
set handle [::chipscope::csejtag_session create 0]
|
||||
|
||||
# Open JTAG and lock
|
||||
set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS]
|
||||
set lock_result [::chipscope::csejtag_target lock $handle 1000]
|
||||
|
||||
set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]
|
||||
|
||||
# Get Device ID
|
||||
set devtype "Virtex-4SX"
|
||||
set devid 2
|
||||
set irlength [::chipscope::csejtag_tap get_irlength $handle $devid]
|
||||
set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid]
|
||||
|
||||
set CSE_OP $CSEJTAG_SHIFT_READWRITE
|
||||
set CSE_ES $CSEJTAG_RUN_TEST_IDLE
|
||||
|
||||
# Write Program
|
||||
# JASM_ROM_INSERT_HERE
|
||||
# Assembled from sdr_test_short.jsm
|
||||
# ---------------------------------------------------------------
|
||||
# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA
|
||||
# User 1
|
||||
set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"]
|
||||
|
||||
# 0x000: JMP 0x002
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030002"
|
||||
|
||||
# 0x001: RETI
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013F000"
|
||||
|
||||
# 0x002: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00203000"
|
||||
|
||||
# 0x003: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00324010"
|
||||
|
||||
# 0x004: XIN R00, (0x04)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00428040"
|
||||
|
||||
# 0x005: AND R00, 0xCF
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00519CF0"
|
||||
|
||||
# 0x006: XOUT (0x04), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00624040"
|
||||
|
||||
# 0x007: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00728070"
|
||||
|
||||
# 0x008: AND R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00819800"
|
||||
|
||||
# 0x009: JNZ 0x007
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00932007"
|
||||
|
||||
# 0x00A: JMP 0x00B
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A3000B"
|
||||
|
||||
# 0x00B: CALL 0x058
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B3B058"
|
||||
|
||||
# 0x00C: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C03800"
|
||||
|
||||
# 0x00D: MOV R15, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D0308F"
|
||||
|
||||
# 0x00E: MOVX (R00), 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E07000"
|
||||
|
||||
# 0x00F: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F11010"
|
||||
|
||||
# 0x010: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0101501F"
|
||||
|
||||
# 0x011: JNZ 0x00E
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0113200E"
|
||||
|
||||
# 0x012: XIN R00, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01228080"
|
||||
|
||||
# 0x013: CMP R00, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0130F080"
|
||||
|
||||
# 0x014: JEQ 0x01D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0143901D"
|
||||
|
||||
# 0x015: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01528070"
|
||||
|
||||
# 0x016: AND R00, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01619020"
|
||||
|
||||
# 0x017: JNZ 0x015
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01732015"
|
||||
|
||||
# 0x018: MOV R00, 0x07
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01803070"
|
||||
|
||||
# 0x019: XOUT (R00), 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01925020"
|
||||
|
||||
# 0x01A: MOV R00, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A03020"
|
||||
|
||||
# 0x01B: CALL 0x05F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B3B05F"
|
||||
|
||||
# 0x01C: JMP 0x012
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C30012"
|
||||
|
||||
# 0x01D: CALL 0x058
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D3B058"
|
||||
|
||||
# 0x01E: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E03000"
|
||||
|
||||
# 0x01F: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F0D000"
|
||||
|
||||
# 0x020: XIN R00, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02028080"
|
||||
|
||||
# 0x021: CMP R00, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0210F080"
|
||||
|
||||
# 0x022: JEQ 0x037
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02239037"
|
||||
|
||||
# 0x023: MOVC R01, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0230A001"
|
||||
|
||||
# 0x024: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02403800"
|
||||
|
||||
# 0x025: MOV R15, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0250308F"
|
||||
|
||||
# 0x026: MOVX (R01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02606001"
|
||||
|
||||
# 0x027: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02711010"
|
||||
|
||||
# 0x028: INC R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02811011"
|
||||
|
||||
# 0x029: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0291501F"
|
||||
|
||||
# 0x02A: JNZ 0x026
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A32026"
|
||||
|
||||
# 0x02B: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B28070"
|
||||
|
||||
# 0x02C: AND R00, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C19020"
|
||||
|
||||
# 0x02D: JNZ 0x02B
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D3202B"
|
||||
|
||||
# 0x02E: NOP
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E00000"
|
||||
|
||||
# 0x02F: MOV R00, 0x07
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F03070"
|
||||
|
||||
# 0x030: XOUT (R00), 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03025020"
|
||||
|
||||
# 0x031: MOV R00, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03103020"
|
||||
|
||||
# 0x032: CALL 0x05F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0323B05F"
|
||||
|
||||
# 0x033: MOVC R00, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0330A000"
|
||||
|
||||
# 0x034: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03411010"
|
||||
|
||||
# 0x035: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0350D000"
|
||||
|
||||
# 0x036: JMP 0x020
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03630020"
|
||||
|
||||
# 0x037: CALL 0x058
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0373B058"
|
||||
|
||||
# 0x038: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03803000"
|
||||
|
||||
# 0x039: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0390D000"
|
||||
|
||||
# 0x03A: XIN R00, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A28080"
|
||||
|
||||
# 0x03B: CMP R00, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B0F080"
|
||||
|
||||
# 0x03C: JEQ 0x052
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C39052"
|
||||
|
||||
# 0x03D: MOV R00, 0x07
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D03070"
|
||||
|
||||
# 0x03E: XOUT (R00), 0x01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E25010"
|
||||
|
||||
# 0x03F: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F28070"
|
||||
|
||||
# 0x040: AND R00, 0x01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04019010"
|
||||
|
||||
# 0x041: JNZ 0x03F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0413203F"
|
||||
|
||||
# 0x042: MOVC R01, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0420A001"
|
||||
|
||||
# 0x043: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04303800"
|
||||
|
||||
# 0x044: MOV R15, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0440308F"
|
||||
|
||||
# 0x045: MOVX R02, (R00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04504002"
|
||||
|
||||
# 0x046: CMP R02, R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0460E012"
|
||||
|
||||
# 0x047: JNE 0x053
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0473A053"
|
||||
|
||||
# 0x048: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04811010"
|
||||
|
||||
# 0x049: INC R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04911011"
|
||||
|
||||
# 0x04A: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A1501F"
|
||||
|
||||
# 0x04B: JNZ 0x045
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B32045"
|
||||
|
||||
# 0x04C: MOV R00, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C03020"
|
||||
|
||||
# 0x04D: CALL 0x05F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D3B05F"
|
||||
|
||||
# 0x04E: MOVC R00, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E0A000"
|
||||
|
||||
# 0x04F: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F11010"
|
||||
|
||||
# 0x050: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0500D000"
|
||||
|
||||
# 0x051: JMP 0x03A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0513003A"
|
||||
|
||||
# 0x052: JMP 0x057
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05230057"
|
||||
|
||||
# 0x053: XIN R00, (0x04)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05328040"
|
||||
|
||||
# 0x054: OR R00, 0x10
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0541B100"
|
||||
|
||||
# 0x055: XOUT (0x04), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05524040"
|
||||
|
||||
# 0x056: JMP 0x057
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05630057"
|
||||
|
||||
# 0x057: JMP 0x057
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05730057"
|
||||
|
||||
# 0x058: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0583C000"
|
||||
|
||||
# 0x059: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05903000"
|
||||
|
||||
# 0x05A: XOUT (0x08), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A24080"
|
||||
|
||||
# 0x05B: XOUT (0x09), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B24090"
|
||||
|
||||
# 0x05C: XOUT (0x0A), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C240A0"
|
||||
|
||||
# 0x05D: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D3D000"
|
||||
|
||||
# 0x05E: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E3E000"
|
||||
|
||||
# 0x05F: PUSH R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F3C001"
|
||||
|
||||
# 0x060: PUSH R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0603C002"
|
||||
|
||||
# 0x061: PUSH R03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0613C003"
|
||||
|
||||
# 0x062: XIN R01, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06228081"
|
||||
|
||||
# 0x063: XIN R02, (0x09)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06328092"
|
||||
|
||||
# 0x064: XIN R03, (0x0A)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "064280A3"
|
||||
|
||||
# 0x065: ADD R01, R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06510001"
|
||||
|
||||
# 0x066: ADDC R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06613002"
|
||||
|
||||
# 0x067: ADDC R03, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06713003"
|
||||
|
||||
# 0x068: XOUT (0x08), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06824081"
|
||||
|
||||
# 0x069: XOUT (0x09), R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06924092"
|
||||
|
||||
# 0x06A: XOUT (0x0A), R03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A240A3"
|
||||
|
||||
# 0x06B: POP R03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B3D003"
|
||||
|
||||
# 0x06C: POP R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C3D002"
|
||||
|
||||
# 0x06D: POP R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D3D001"
|
||||
|
||||
# 0x06E: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E3E000"
|
||||
|
||||
# Assembled from sdr_test_short.jsm
|
||||
# ---------------------------------------------------------------
|
||||
# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA
|
||||
# User 2
|
||||
set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"]
|
||||
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700"
|
||||
|
||||
::chipscope::csejtag_target unlock $handle
|
||||
::chipscope::csejtag_target close $handle
|
||||
::chipscope::csejtag_session destroy $handle
|
||||
exit
|
||||
@@ -0,0 +1,62 @@
|
||||
# ----------------------------------------------------------------------
|
||||
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
|
||||
# This file: The ROM file for upload to target over JTAG
|
||||
|
||||
# Copyright (C) 2007 J. Ahrensfeld
|
||||
|
||||
# This library is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU Lesser General Public
|
||||
# License as published by the Free Software Foundation; either
|
||||
# version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
# This library is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
# Lesser General Public License for more details.
|
||||
|
||||
# You should have received a copy of the GNU Lesser General Public
|
||||
# License along with this library; if not, write to the Free Software
|
||||
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|
||||
# For questions and ideas, please contact the author at jens@jayfield.org
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
# For Chipscope 9.1
|
||||
# ---------------------------------------------------------------------
|
||||
# Source JTAG/TCL frame work
|
||||
cd $env(CHIPSCOPE)\\bin\\nt
|
||||
source csejtag.tcl
|
||||
|
||||
namespace import ::chipscope::*
|
||||
|
||||
# Platform USB Cable
|
||||
set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"]
|
||||
# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
|
||||
|
||||
# Create session
|
||||
set handle [::chipscope::csejtag_session create 0]
|
||||
|
||||
# Open JTAG and lock
|
||||
set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS]
|
||||
set lock_result [::chipscope::csejtag_target lock $handle 1000]
|
||||
|
||||
set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]
|
||||
|
||||
# Get Device ID
|
||||
set devtype "Virtex-4SX"
|
||||
set devid 2
|
||||
set irlength [::chipscope::csejtag_tap get_irlength $handle $devid]
|
||||
set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid]
|
||||
|
||||
set CSE_OP $CSEJTAG_SHIFT_READWRITE
|
||||
set CSE_ES $CSEJTAG_RUN_TEST_IDLE
|
||||
|
||||
# Write Program
|
||||
# JASM_ROM_INSERT_HERE
|
||||
|
||||
::chipscope::csejtag_target unlock $handle
|
||||
::chipscope::csejtag_target close $handle
|
||||
::chipscope::csejtag_session destroy $handle
|
||||
exit
|
||||
@@ -0,0 +1,472 @@
|
||||
; -------------------------------------------------
|
||||
; Register definitions
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/cregs.inc.jsm"
|
||||
include "xregs.inc.jsm"
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
BURST_LEN: equ 8
|
||||
SD_CMD_WRITE: equ 0x06
|
||||
SD_CMD_READ: equ 0x05
|
||||
addr_msb_max: equ 0xFF
|
||||
|
||||
; External RAM/ROM
|
||||
xmem
|
||||
crlf: dc 13, 10, 0
|
||||
greet_txt: dc "SDRAM Test", 0
|
||||
msg_txt0: dc "Clearing SDRAM", 0
|
||||
msg_txt1: dc "Writing SDRAM", 0
|
||||
msg_txt2: dc "Reading SDRAM", 0
|
||||
verify_ok: dc "Verify OK", 0
|
||||
verify_nok: dc "Failed at ", 0
|
||||
dot: dc ".", 0
|
||||
|
||||
org 0x80
|
||||
sdram_data: db 8 ; SDRAM data window at X:0x80
|
||||
|
||||
; Internal RAM
|
||||
cmem 0
|
||||
round: db 1
|
||||
bmp_offset: db 4
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
code
|
||||
reset: org 0x000
|
||||
jmp main
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
org 0x001
|
||||
push R0
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, 0x10
|
||||
xout (ctrl_reg), R0
|
||||
pop R0
|
||||
reti
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
main:
|
||||
call LCD_init
|
||||
mov R0, 0x00
|
||||
xout (led_port), R0
|
||||
|
||||
mov R0, CTRL_VGA_ENABLE
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
|
||||
cin R0, (cpu_int_ctrl)
|
||||
or R0, 0x05
|
||||
cout (cpu_int_ctrl), R0
|
||||
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
mov R0, 0
|
||||
mov R1, 0xC0
|
||||
xout (reg_color_red), R1
|
||||
xout (reg_color_grn), R1
|
||||
xout (reg_color_blu), R1
|
||||
|
||||
call cg_wait_rdy
|
||||
call cg_clr_screen
|
||||
|
||||
; Print greeting message
|
||||
mov R1, greet_txt
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, greet_txt
|
||||
call cg_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, 0x10
|
||||
xout (ctrl_reg), R0
|
||||
call delay100ms
|
||||
or R0, 0x20
|
||||
xout (ctrl_reg), R0
|
||||
call delay100ms
|
||||
and R0, 0xEF
|
||||
xout (ctrl_reg), R0
|
||||
call delay100ms
|
||||
and R0, 0xCF
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM clear
|
||||
; ----------------------------------------------------------
|
||||
do_clear:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Clear message
|
||||
mov R1, msg_txt0
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt0
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
|
||||
; Fill SDR Buffer with zeros
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
buf_clr_loop: movx (R0), 0
|
||||
inc R0
|
||||
dec R15
|
||||
jnz buf_clr_loop
|
||||
|
||||
sdr_clear: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq clear_finished
|
||||
|
||||
mov R2, BURST_LEN
|
||||
|
||||
poll_clear_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_clear_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz poll_clear_full
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
; Advance address counter
|
||||
mov R0, BURST_LEN
|
||||
call AddrCnt_Adv
|
||||
|
||||
jmp sdr_clear
|
||||
|
||||
clear_finished:
|
||||
call AddrCnt_Disp
|
||||
call delay1s
|
||||
jmp do_write
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
do_write:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Write message
|
||||
mov R1, msg_txt1
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt1
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_write: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq write_finished
|
||||
|
||||
mov R2, BURST_LEN
|
||||
|
||||
; Fill SDR Buffer
|
||||
sdr_burst_wr: movc R1, (round)
|
||||
; xin R0, (sdram_addr+2)
|
||||
; cmp R0, 0x7F
|
||||
; jne force_no_err
|
||||
; inc R1
|
||||
force_no_err: mov R0, sdram_data
|
||||
mov R15, 8
|
||||
write_loop: movx (R0), R1
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz write_loop
|
||||
|
||||
poll_write_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_write_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz sdr_burst_wr
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
; Advance address counter
|
||||
mov R0, BURST_LEN
|
||||
call AddrCnt_Adv
|
||||
|
||||
jmp sdr_write
|
||||
|
||||
write_finished: call AddrCnt_Disp
|
||||
call delay1s
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Verify
|
||||
; ----------------------------------------------------------
|
||||
do_read:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Read message
|
||||
mov R1, msg_txt2
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt2
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_read: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq read_finished
|
||||
|
||||
; Start SDR read
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
; mov R0, LCD_CMD_Z1
|
||||
; call LCD_writecmd
|
||||
; call print_addr
|
||||
; mov R0, LCD_CMD_Z2
|
||||
; call LCD_writecmd
|
||||
; call print_data
|
||||
|
||||
mov R3, BURST_LEN
|
||||
|
||||
; Wait last read
|
||||
poll_read_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_READ_DATA_EMPTY
|
||||
jnz poll_read_fin
|
||||
|
||||
; Verify SDR Buffer
|
||||
movc R1, (round)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
read_loop: movx R2, (R0)
|
||||
cmp R2, R1
|
||||
jne verify_error
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz read_loop
|
||||
|
||||
; Advance Read-FIFO
|
||||
mov R0, FIFO_CTRL_IS_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
|
||||
sub R3, 2
|
||||
jnz poll_read_fin
|
||||
|
||||
; Advance address counter
|
||||
mov R0, BURST_LEN
|
||||
call AddrCnt_Adv
|
||||
jmp sdr_read
|
||||
|
||||
; ----------------------------------------------------------
|
||||
sd_request: push R0
|
||||
mov R0, SDRAM_CTRL_REQUEST
|
||||
xout (sdram_reg), R0
|
||||
wait4grant: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, SDRAM_STAT_ACCESS
|
||||
jz wait4grant
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
wait_cmd_rdy: call sd_request
|
||||
push R0
|
||||
wait4cmd: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_CMD_FULL
|
||||
jnz wait4cmd
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
read_finished:
|
||||
no_error: mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
mov R1, verify_ok
|
||||
call LCD_putsx
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
call print_addr
|
||||
|
||||
mov R1, verify_ok
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
jmp ende
|
||||
|
||||
verify_error: mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
mov R1, verify_nok
|
||||
call LCD_putsx
|
||||
call print_addr
|
||||
call print_data
|
||||
mov R1, verify_nok
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
jmp ende
|
||||
|
||||
ende: call delay1s
|
||||
jmp do_clear
|
||||
|
||||
; -------------------------------------------------
|
||||
AddrCnt_Init: push R0
|
||||
mov R0, 0x00
|
||||
xout (sdram_addr+0), R0
|
||||
xout (sdram_addr+1), R0
|
||||
xout (sdram_addr+2), R0
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: increment value
|
||||
AddrCnt_Adv: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
add R1, R0
|
||||
addc R2, 0
|
||||
addc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Display Address counter
|
||||
AddrCnt_Disp: mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
call print_addr
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; PutHexByte
|
||||
; R0 : Byte value
|
||||
PutHexByte: push R1
|
||||
call bin2hex
|
||||
call LCD_writechar
|
||||
mov R0, R1
|
||||
call LCD_writechar
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_addr: push R0
|
||||
xin R0, (sdram_addr+2)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+1)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+0)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; R1 : ptr to byte array
|
||||
print_dword: push R0
|
||||
add R1, 3
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_data: push R0
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
movx R0, (sdram_data+7)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+6)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+5)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+4)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+3)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+2)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+1)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+0)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/utils.inc.jsm"
|
||||
include "../../../lib/jasm/lcd.inc.jsm"
|
||||
include "../../../lib/jasm/cg.inc.jsm"
|
||||
include "../../../lib/jasm/delays.inc.jsm"
|
||||
include "../../../lib/jasm/uart.inc.jsm"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,308 @@
|
||||
; -------------------------------------------------
|
||||
; Register definitions
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/cregs.inc.jsm"
|
||||
include "xregs.inc.jsm"
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
BURST_LEN: equ 8
|
||||
SD_CMD_WRITE: equ 0x06
|
||||
SD_CMD_READ: equ 0x05
|
||||
addr_msb_max: equ 0x40
|
||||
|
||||
; External RAM/ROM
|
||||
xmem
|
||||
crlf: dc 13, 10, 0
|
||||
greet_txt: dc "SDRAM Test", 0
|
||||
msg_txt0: dc "Clearing SDRAM", 0
|
||||
msg_txt1: dc "Writing SDRAM", 0
|
||||
msg_txt2: dc "Reading SDRAM", 0
|
||||
verify_ok: dc "Verify OK", 0
|
||||
verify_nok: dc "Failed at ", 0
|
||||
dot: dc ".", 0
|
||||
|
||||
org 0x80
|
||||
sdram_data: db 8 ; SDRAM data window at X:0x80
|
||||
|
||||
; Internal RAM
|
||||
cmem 0
|
||||
round: db 1
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
code
|
||||
reset: org 0x000
|
||||
jmp main
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
org 0x001
|
||||
reti
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
main:
|
||||
mov R0, 0x00
|
||||
xout (led_port), R0
|
||||
|
||||
; xin R0, (btn_port)
|
||||
; tst R0
|
||||
; jz no_vga
|
||||
mov R0, CTRL_VGA_ENABLE
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
|
||||
no_vga: mov R0, 0
|
||||
mov R1, 0x80
|
||||
xout (reg_color_red), R0
|
||||
xout (reg_color_grn), R1
|
||||
xout (reg_color_blu), R0
|
||||
|
||||
jmp do_write
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM clear
|
||||
; ----------------------------------------------------------
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
do_clear: call AddrCnt_Init
|
||||
|
||||
; Fill SDR Buffer with zeros
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
buf_clr_loop: movx (R0), 0
|
||||
inc R0
|
||||
dec R15
|
||||
jnz buf_clr_loop
|
||||
|
||||
sdr_clear: xin R0, (sdram_addr+0)
|
||||
cmp R0, addr_msb_max
|
||||
jeq clear_finished
|
||||
|
||||
mov R2, BURST_LEN
|
||||
|
||||
poll_clear_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_clear_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz poll_clear_full
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
; Advance address counter
|
||||
mov R0, BURST_LEN
|
||||
call AddrCnt_Adv
|
||||
|
||||
jmp sdr_clear
|
||||
|
||||
clear_finished:
|
||||
call AddrCnt_Disp
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
do_write: ; Clear LCD
|
||||
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_write: xin R0, (sdram_addr+0)
|
||||
cmp R0, addr_msb_max
|
||||
jeq write_finished
|
||||
|
||||
mov R2, BURST_LEN
|
||||
|
||||
; Fill SDR Buffer
|
||||
sdr_burst_wr: movc R1, (round)
|
||||
; xin R0, (sdram_addr+2)
|
||||
; cmp R0, 0x7F
|
||||
; jne force_no_err
|
||||
; inc R1
|
||||
force_no_err: mov R0, sdram_data
|
||||
mov R15, 8
|
||||
write_loop: movx (R0), R1
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz write_loop
|
||||
|
||||
poll_write_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_write_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz sdr_burst_wr
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
; Advance address counter
|
||||
mov R0, BURST_LEN
|
||||
call AddrCnt_Adv
|
||||
|
||||
jmp sdr_write
|
||||
|
||||
write_finished: call AddrCnt_Disp
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Verify
|
||||
; ----------------------------------------------------------
|
||||
do_read: ; Clear LCD
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
call AddrCnt_Init
|
||||
mov R0, 0
|
||||
movc (round), R0
|
||||
|
||||
sdr_read: xin R0, (sdram_addr+2)
|
||||
cmp R0, addr_msb_max
|
||||
jeq read_finished
|
||||
|
||||
; Start SDR read
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
|
||||
mov R3, BURST_LEN
|
||||
|
||||
; Wait last read
|
||||
poll_read_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_READ_DATA_EMPTY
|
||||
jnz poll_read_fin
|
||||
|
||||
; Verify SDR Buffer
|
||||
movc R1, (round)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
read_loop: movx R2, (R0)
|
||||
cmp R2, R1
|
||||
jne verify_error
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz read_loop
|
||||
|
||||
; Advance Read-FIFO
|
||||
mov R0, FIFO_CTRL_IS_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (round)
|
||||
inc R0
|
||||
movc (round), R0
|
||||
|
||||
sub R3, 2
|
||||
jnz poll_read_fin
|
||||
|
||||
; Advance address counter
|
||||
mov R0, BURST_LEN
|
||||
call AddrCnt_Adv
|
||||
jmp sdr_read
|
||||
|
||||
; ----------------------------------------------------------
|
||||
sd_request: push R0
|
||||
mov R0, SDRAM_CTRL_REQUEST
|
||||
xout (sdram_reg), R0
|
||||
wait4grant: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, SDRAM_STAT_ACCESS
|
||||
jz wait4grant
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
wait_cmd_rdy: call sd_request
|
||||
push R0
|
||||
wait4cmd: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_CMD_FULL
|
||||
jnz wait4cmd
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
read_finished:
|
||||
no_error: jmp ende
|
||||
|
||||
verify_error: jmp ende
|
||||
|
||||
ende: jmp do_clear
|
||||
|
||||
; -------------------------------------------------
|
||||
AddrCnt_Init: push R0
|
||||
mov R0, 0x00
|
||||
xout (sdram_addr+0), R0
|
||||
xout (sdram_addr+1), R0
|
||||
xout (sdram_addr+2), R0
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: increment value
|
||||
AddrCnt_Adv: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
add R1, R0
|
||||
addc R2, 0
|
||||
addc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Display Address counter
|
||||
AddrCnt_Disp: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; PutHexByte
|
||||
; R0 : Byte value
|
||||
PutHexByte: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_addr: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_data: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/utils.inc.jsm"
|
||||
|
||||
@@ -0,0 +1,704 @@
|
||||
# ----------------------------------------------------------------------
|
||||
# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
|
||||
# This file: The ROM file for upload to target over JTAG
|
||||
#
|
||||
# Copyright (C) 2007 J. Ahrensfeld
|
||||
#
|
||||
# This program is free software: you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation, either version 3 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
#
|
||||
# For questions and ideas, please contact the author at jens@jayfield.org
|
||||
#
|
||||
# ---------------------------------------------------------------------
|
||||
|
||||
# ---------------------------------------------------------------------
|
||||
# For Chipscope 9.1
|
||||
# ---------------------------------------------------------------------
|
||||
# Source JTAG/TCL frame work
|
||||
cd $env(CHIPSCOPE)\\bin\\nt
|
||||
source csejtag.tcl
|
||||
|
||||
namespace import ::chipscope::*
|
||||
|
||||
# Platform USB Cable
|
||||
set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"]
|
||||
# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
|
||||
|
||||
# Create session
|
||||
set handle [::chipscope::csejtag_session create 0]
|
||||
|
||||
# Open JTAG and lock
|
||||
set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS]
|
||||
set lock_result [::chipscope::csejtag_target lock $handle 1000]
|
||||
|
||||
set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]
|
||||
|
||||
# Get Device ID
|
||||
set devtype "Virtex-4SX"
|
||||
set devid 2
|
||||
set irlength [::chipscope::csejtag_tap get_irlength $handle $devid]
|
||||
set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid]
|
||||
|
||||
set CSE_OP $CSEJTAG_SHIFT_READWRITE
|
||||
set CSE_ES $CSEJTAG_RUN_TEST_IDLE
|
||||
|
||||
# Write Program
|
||||
# JASM_ROM_INSERT_HERE
|
||||
# Assembled from sdram_test_short.jsm
|
||||
# ---------------------------------------------------------------
|
||||
# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA
|
||||
# User 1
|
||||
set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"]
|
||||
|
||||
# 0x000: JMP 0x002
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030002"
|
||||
|
||||
# 0x001: RETI
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013F000"
|
||||
|
||||
# 0x002: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00203000"
|
||||
|
||||
# 0x003: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00324010"
|
||||
|
||||
# 0x004: MOV R00, 0x04
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00403040"
|
||||
|
||||
# 0x005: XOUT (0x04), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00524040"
|
||||
|
||||
# 0x006: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00603000"
|
||||
|
||||
# 0x007: MOV R01, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00703801"
|
||||
|
||||
# 0x008: XOUT (0x10), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00824100"
|
||||
|
||||
# 0x009: XOUT (0x11), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00924111"
|
||||
|
||||
# 0x00A: XOUT (0x12), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A24120"
|
||||
|
||||
# 0x00B: JMP 0x026
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B30026"
|
||||
|
||||
# 0x00C: CALL 0x07D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C3B07D"
|
||||
|
||||
# 0x00D: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D03800"
|
||||
|
||||
# 0x00E: MOV R15, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E0308F"
|
||||
|
||||
# 0x00F: MOVX (R00), 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F07000"
|
||||
|
||||
# 0x010: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01011010"
|
||||
|
||||
# 0x011: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0111501F"
|
||||
|
||||
# 0x012: JNZ 0x00F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0123200F"
|
||||
|
||||
# 0x013: XIN R00, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01328080"
|
||||
|
||||
# 0x014: CMP R00, 0x40
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0140F400"
|
||||
|
||||
# 0x015: JEQ 0x025
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01539025"
|
||||
|
||||
# 0x016: MOV R02, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01603082"
|
||||
|
||||
# 0x017: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01728070"
|
||||
|
||||
# 0x018: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01824010"
|
||||
|
||||
# 0x019: AND R00, 0x04
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01919040"
|
||||
|
||||
# 0x01A: JNZ 0x017
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A32017"
|
||||
|
||||
# 0x01B: MOV R00, 0x10
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B03100"
|
||||
|
||||
# 0x01C: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C24070"
|
||||
|
||||
# 0x01D: SUB R02, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D15022"
|
||||
|
||||
# 0x01E: JNZ 0x017
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E32017"
|
||||
|
||||
# 0x01F: CALL 0x072
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F3B072"
|
||||
|
||||
# 0x020: MOV R00, 0x06
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02003060"
|
||||
|
||||
# 0x021: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02124070"
|
||||
|
||||
# 0x022: MOV R00, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02203080"
|
||||
|
||||
# 0x023: CALL 0x084
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0233B084"
|
||||
|
||||
# 0x024: JMP 0x013
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02430013"
|
||||
|
||||
# 0x025: CALL 0x094
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0253B094"
|
||||
|
||||
# 0x026: CALL 0x07D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0263B07D"
|
||||
|
||||
# 0x027: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02703000"
|
||||
|
||||
# 0x028: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0280D000"
|
||||
|
||||
# 0x029: XIN R00, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02928080"
|
||||
|
||||
# 0x02A: CMP R00, 0x40
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A0F400"
|
||||
|
||||
# 0x02B: JEQ 0x046
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B39046"
|
||||
|
||||
# 0x02C: MOV R02, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C03082"
|
||||
|
||||
# 0x02D: MOVC R01, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D0A001"
|
||||
|
||||
# 0x02E: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E03800"
|
||||
|
||||
# 0x02F: MOV R15, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F0308F"
|
||||
|
||||
# 0x030: MOVX (R01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03006001"
|
||||
|
||||
# 0x031: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03111010"
|
||||
|
||||
# 0x032: INC R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03211011"
|
||||
|
||||
# 0x033: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0331501F"
|
||||
|
||||
# 0x034: JNZ 0x030
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03432030"
|
||||
|
||||
# 0x035: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03528070"
|
||||
|
||||
# 0x036: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03624010"
|
||||
|
||||
# 0x037: AND R00, 0x04
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03719040"
|
||||
|
||||
# 0x038: JNZ 0x035
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03832035"
|
||||
|
||||
# 0x039: MOV R00, 0x10
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03903100"
|
||||
|
||||
# 0x03A: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A24070"
|
||||
|
||||
# 0x03B: MOVC R00, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B0A000"
|
||||
|
||||
# 0x03C: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C11010"
|
||||
|
||||
# 0x03D: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D0D000"
|
||||
|
||||
# 0x03E: SUB R02, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E15022"
|
||||
|
||||
# 0x03F: JNZ 0x02D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F3202D"
|
||||
|
||||
# 0x040: CALL 0x072
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0403B072"
|
||||
|
||||
# 0x041: MOV R00, 0x06
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04103060"
|
||||
|
||||
# 0x042: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04224070"
|
||||
|
||||
# 0x043: MOV R00, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04303080"
|
||||
|
||||
# 0x044: CALL 0x084
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0443B084"
|
||||
|
||||
# 0x045: JMP 0x029
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04530029"
|
||||
|
||||
# 0x046: CALL 0x094
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0463B094"
|
||||
|
||||
# 0x047: CALL 0x07D
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0473B07D"
|
||||
|
||||
# 0x048: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04803000"
|
||||
|
||||
# 0x049: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0490D000"
|
||||
|
||||
# 0x04A: XIN R00, (0x0A)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A280A0"
|
||||
|
||||
# 0x04B: CMP R00, 0x40
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B0F400"
|
||||
|
||||
# 0x04C: JEQ 0x07A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C3907A"
|
||||
|
||||
# 0x04D: CALL 0x072
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D3B072"
|
||||
|
||||
# 0x04E: MOV R00, 0x05
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E03050"
|
||||
|
||||
# 0x04F: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F24070"
|
||||
|
||||
# 0x050: MOV R03, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05003083"
|
||||
|
||||
# 0x051: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05128070"
|
||||
|
||||
# 0x052: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05224010"
|
||||
|
||||
# 0x053: AND R00, 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05319200"
|
||||
|
||||
# 0x054: JNZ 0x051
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05432051"
|
||||
|
||||
# 0x055: MOVC R01, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0550A001"
|
||||
|
||||
# 0x056: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05603800"
|
||||
|
||||
# 0x057: MOV R15, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0570308F"
|
||||
|
||||
# 0x058: MOVX R02, (R00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05804002"
|
||||
|
||||
# 0x059: CMP R02, R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0590E012"
|
||||
|
||||
# 0x05A: JNE 0x07B
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A3A07B"
|
||||
|
||||
# 0x05B: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B11010"
|
||||
|
||||
# 0x05C: INC R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C11011"
|
||||
|
||||
# 0x05D: DEC R15
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D1501F"
|
||||
|
||||
# 0x05E: JNZ 0x058
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E32058"
|
||||
|
||||
# 0x05F: MOV R00, 0x20
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F03200"
|
||||
|
||||
# 0x060: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06024070"
|
||||
|
||||
# 0x061: MOVC R00, (0x00)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0610A000"
|
||||
|
||||
# 0x062: INC R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06211010"
|
||||
|
||||
# 0x063: MOVC (0x00), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0630D000"
|
||||
|
||||
# 0x064: SUB R03, 0x02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06415023"
|
||||
|
||||
# 0x065: JNZ 0x051
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06532051"
|
||||
|
||||
# 0x066: MOV R00, 0x08
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06603080"
|
||||
|
||||
# 0x067: CALL 0x084
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0673B084"
|
||||
|
||||
# 0x068: JMP 0x04A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0683004A"
|
||||
|
||||
# 0x069: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0693C000"
|
||||
|
||||
# 0x06A: MOV R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A03800"
|
||||
|
||||
# 0x06B: XOUT (0x07), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B24070"
|
||||
|
||||
# 0x06C: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C28070"
|
||||
|
||||
# 0x06D: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D24010"
|
||||
|
||||
# 0x06E: AND R00, 0x80
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E19800"
|
||||
|
||||
# 0x06F: JZ 0x06C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F3106C"
|
||||
|
||||
# 0x070: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0703D000"
|
||||
|
||||
# 0x071: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0713E000"
|
||||
|
||||
# 0x072: CALL 0x069
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0723B069"
|
||||
|
||||
# 0x073: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0733C000"
|
||||
|
||||
# 0x074: XIN R00, (0x07)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07428070"
|
||||
|
||||
# 0x075: XOUT (0x01), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07524010"
|
||||
|
||||
# 0x076: AND R00, 0x01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07619010"
|
||||
|
||||
# 0x077: JNZ 0x074
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07732074"
|
||||
|
||||
# 0x078: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0783D000"
|
||||
|
||||
# 0x079: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0793E000"
|
||||
|
||||
# 0x07A: JMP 0x07C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A3007C"
|
||||
|
||||
# 0x07B: JMP 0x07C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B3007C"
|
||||
|
||||
# 0x07C: JMP 0x00C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C3000C"
|
||||
|
||||
# 0x07D: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D3C000"
|
||||
|
||||
# 0x07E: MOV R00, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E03000"
|
||||
|
||||
# 0x07F: XOUT (0x08), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F24080"
|
||||
|
||||
# 0x080: XOUT (0x09), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08024090"
|
||||
|
||||
# 0x081: XOUT (0x0A), R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "081240A0"
|
||||
|
||||
# 0x082: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0823D000"
|
||||
|
||||
# 0x083: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0833E000"
|
||||
|
||||
# 0x084: PUSH R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0843C001"
|
||||
|
||||
# 0x085: PUSH R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0853C002"
|
||||
|
||||
# 0x086: PUSH R03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0863C003"
|
||||
|
||||
# 0x087: XIN R01, (0x08)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08728081"
|
||||
|
||||
# 0x088: XIN R02, (0x09)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08828092"
|
||||
|
||||
# 0x089: XIN R03, (0x0A)
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "089280A3"
|
||||
|
||||
# 0x08A: ADD R01, R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A10001"
|
||||
|
||||
# 0x08B: ADDC R02, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B13002"
|
||||
|
||||
# 0x08C: ADDC R03, 0x00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C13003"
|
||||
|
||||
# 0x08D: XOUT (0x08), R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D24081"
|
||||
|
||||
# 0x08E: XOUT (0x09), R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E24092"
|
||||
|
||||
# 0x08F: XOUT (0x0A), R03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F240A3"
|
||||
|
||||
# 0x090: POP R03
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0903D003"
|
||||
|
||||
# 0x091: POP R02
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0913D002"
|
||||
|
||||
# 0x092: POP R01
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0923D001"
|
||||
|
||||
# 0x093: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0933E000"
|
||||
|
||||
# 0x094: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0943E000"
|
||||
|
||||
# 0x095: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0953E000"
|
||||
|
||||
# 0x096: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0963E000"
|
||||
|
||||
# 0x097: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0973E000"
|
||||
|
||||
# 0x098: AND R00, 0x0F
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "098190F0"
|
||||
|
||||
# 0x099: CMP R00, 0x0A
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0990F0A0"
|
||||
|
||||
# 0x09A: JLT 0x09C
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A3509C"
|
||||
|
||||
# 0x09B: ADD R00, 0x07
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B11070"
|
||||
|
||||
# 0x09C: ADD R00, 0x30
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C11300"
|
||||
|
||||
# 0x09D: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D3E000"
|
||||
|
||||
# 0x09E: PUSH R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E3C000"
|
||||
|
||||
# 0x09F: CALL 0x098
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F3B098"
|
||||
|
||||
# 0x0A0: MOV R01, R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A002001"
|
||||
|
||||
# 0x0A1: POP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A13D000"
|
||||
|
||||
# 0x0A2: SWAP R00
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A22A000"
|
||||
|
||||
# 0x0A3: CALL 0x098
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A33B098"
|
||||
|
||||
# 0x0A4: RET
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A43E000"
|
||||
|
||||
# Assembled from sdram_test_short.jsm
|
||||
# ---------------------------------------------------------------
|
||||
# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA
|
||||
# User 2
|
||||
set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"]
|
||||
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "000D"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "010A"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0353"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0444"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0552"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0641"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "074D"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0820"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0954"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A65"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B73"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C74"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E43"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F6C"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1065"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1161"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1272"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1369"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "146E"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1567"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1620"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1753"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1844"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1952"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A41"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B4D"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D57"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E72"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F69"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2074"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2169"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "226E"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2367"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2420"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2553"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2644"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2752"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2841"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "294D"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B52"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C65"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D61"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E64"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F69"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "306E"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3167"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3220"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3353"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3444"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3552"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3641"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "374D"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3956"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A65"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B72"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C69"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D66"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E79"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F20"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "404F"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "414B"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4346"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4461"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4569"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "466C"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4765"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4864"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4920"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A61"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B74"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C20"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E2E"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600"
|
||||
::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700"
|
||||
|
||||
::chipscope::csejtag_target unlock $handle
|
||||
::chipscope::csejtag_target close $handle
|
||||
::chipscope::csejtag_session destroy $handle
|
||||
exit
|
||||
@@ -0,0 +1,188 @@
|
||||
; PROJECT "test"
|
||||
|
||||
data 10
|
||||
constant: DROM 55, 33,3a,5b,01,4f
|
||||
rxbuf: DRAM 16
|
||||
txbuf: DRAM 16
|
||||
message: DROM 12, 99, 45, 2a, 5c, 0, 0d, 0a
|
||||
|
||||
reset: jmp start
|
||||
inc R14
|
||||
mov R8, R15
|
||||
mov R15, #00
|
||||
add R15, R14
|
||||
mov R15, R8
|
||||
reti
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
const1: equ 01
|
||||
const2: equ 02
|
||||
const3: equ 03
|
||||
const4: equ EF
|
||||
const5: equ BE
|
||||
|
||||
org 10
|
||||
|
||||
f1:
|
||||
f2: inc R13
|
||||
ret
|
||||
|
||||
start: mov R11, message
|
||||
nop
|
||||
; This is a comment:
|
||||
mov R0, #00
|
||||
mov R1, const1
|
||||
mov R2, const2
|
||||
mov R3, const3
|
||||
mov R4, const4
|
||||
mov R5, const5
|
||||
mov R6, #06
|
||||
mov R7, #07
|
||||
mov R8, #08
|
||||
mov R9, #09
|
||||
mov R10, #10
|
||||
mov R11, #65
|
||||
mov R12, #12
|
||||
mov R13, #40
|
||||
mov R14, #00
|
||||
mov R15, #15
|
||||
movx (#21), R5
|
||||
movx (R14), #65
|
||||
tst R0
|
||||
tst R5
|
||||
shr R13
|
||||
shr R13
|
||||
shl R13
|
||||
shl R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
ror R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
rol R13
|
||||
ror R15
|
||||
ror R15
|
||||
ror R15
|
||||
ror R15
|
||||
halt
|
||||
nop
|
||||
mov R8, #80
|
||||
mov R15, #00
|
||||
shl R8
|
||||
rolc R15
|
||||
rol R15
|
||||
rol R15
|
||||
rol R15
|
||||
rol R15
|
||||
rol R15
|
||||
rol R15
|
||||
rol R15
|
||||
|
||||
xor R9, #08
|
||||
or R6, #50
|
||||
and R15, #51
|
||||
|
||||
cmp R0, #00
|
||||
jne error
|
||||
jlt error
|
||||
jgt error
|
||||
jne error
|
||||
jeq ok10
|
||||
jmp error
|
||||
ok10:
|
||||
jle ok11
|
||||
jmp error
|
||||
ok11:
|
||||
jge ok12
|
||||
jmp error
|
||||
ok12:
|
||||
|
||||
cmp R1, #00
|
||||
jeq error
|
||||
jlt error
|
||||
jgt ok20
|
||||
ok20:
|
||||
jne ok21
|
||||
ok21:
|
||||
jge ok22
|
||||
jmp error
|
||||
ok22:
|
||||
|
||||
cmp R11 #64
|
||||
jeq error
|
||||
cmp R11 #65
|
||||
jle ok30
|
||||
jmp error
|
||||
ok30:
|
||||
jge ok31
|
||||
jmp error
|
||||
ok31:
|
||||
jgt error
|
||||
jlt error
|
||||
|
||||
cmp R11 #66
|
||||
jle ok40
|
||||
jmp error
|
||||
ok40:
|
||||
jgt error
|
||||
jge error
|
||||
jlt label2
|
||||
jmp error
|
||||
|
||||
label2: movx (const4), R10
|
||||
linit: mov R2, #10
|
||||
mov R1, #01
|
||||
loop: sub R2, R1
|
||||
jnz loop
|
||||
jmp sub
|
||||
|
||||
sub: mov R15, #20
|
||||
push R15
|
||||
mov R8, #01
|
||||
call f1
|
||||
call f2
|
||||
call stub
|
||||
mov R7, const4
|
||||
pop R15
|
||||
mov R15, R7
|
||||
jmp linit
|
||||
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
stub: mov R0, #00
|
||||
L2: movx (R0), R7;
|
||||
add R0, #02
|
||||
sub R15, #01; Subtract
|
||||
jnz L2 ; exit, if zero
|
||||
|
||||
movx R5, (#09)
|
||||
movx R7, (R0)
|
||||
ret
|
||||
|
||||
error:
|
||||
nop
|
||||
jmp error
|
||||
|
||||
@@ -0,0 +1,510 @@
|
||||
; -------------------------------------------------
|
||||
; Uart test
|
||||
; -------------------------------------------------
|
||||
reset: jmp init
|
||||
|
||||
org 0x001
|
||||
jmp isr
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
ram_start: equ 0x00 ; R/W
|
||||
txt_start: equ 0x80 ; RO
|
||||
txt_end: equ 0x8B ; RO
|
||||
btn_port: equ 0xC0 ; RO
|
||||
led_port: equ 0xC1 ; Write
|
||||
uart_data: equ 0xC2 ; Write
|
||||
lcd_port: equ 0xC3 ; R/W
|
||||
ctrl_reg: equ 0xC4 ; R/W
|
||||
dip_port: equ 0xC5 ; RO
|
||||
uart_status: equ 0xC6 ; Read
|
||||
|
||||
lcd_read: equ 0x20
|
||||
lcd_data: equ 0x40
|
||||
lcd_enable: equ 0x80
|
||||
|
||||
DIV10: equ 0x0A
|
||||
|
||||
CR: equ 0x0D
|
||||
LF: equ 0x0A
|
||||
|
||||
count0: equ 0x00
|
||||
count1: equ 0x01
|
||||
count2: equ 0x02
|
||||
count3: equ 0x03
|
||||
|
||||
cntDigit0: equ 0x04
|
||||
cntDigit1: equ 0x05
|
||||
cntDigit2: equ 0x06
|
||||
cntDigit3: equ 0x07
|
||||
cntDigit4: equ 0x08
|
||||
cntDigit5: equ 0x09
|
||||
cntDigit6: equ 0x0A
|
||||
cntDigit7: equ 0x0B
|
||||
|
||||
LCD_CMD_Z1: equ 0x80
|
||||
LCD_CMD_Z2: equ 0xC0
|
||||
|
||||
count_stat: equ 0x0C
|
||||
|
||||
; Chip register
|
||||
cpu_revision: equ 0x00 ; RO
|
||||
cpu_control: equ 0x01 ; R/W
|
||||
cpu_status: equ 0x02 ; RO
|
||||
cpu_int_ctrl: equ 0x03 ; R/W
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
org 010
|
||||
|
||||
init: mov R1, 0x55
|
||||
movx (led_port), R1
|
||||
; jmp init
|
||||
call CounterInit
|
||||
call LCD_init
|
||||
mov R0, 0x00
|
||||
movc (count_stat), R0
|
||||
mov R1, 0x04
|
||||
movx R0, (btn_port)
|
||||
and R0, 0x01
|
||||
jz not_pressed
|
||||
mov R1, 0x00
|
||||
not_pressed: movx (led_port), R1
|
||||
|
||||
mov R0, ctrl_reg
|
||||
; Enable timer
|
||||
movx (R0), 0x02
|
||||
; Enable interrupt
|
||||
movx (R0), 0x03
|
||||
|
||||
; Enable CPU interrupt
|
||||
cin R0, (cpu_int_ctrl)
|
||||
or R0, 0x01
|
||||
cout (cpu_int_ctrl), R0
|
||||
|
||||
start: halt
|
||||
call Cnt32
|
||||
call UpdateDigits
|
||||
mov R15, cntDigit7
|
||||
|
||||
movc R0, (count_stat)
|
||||
tst R0
|
||||
jz start
|
||||
mov R0, 0x00
|
||||
movc (count_stat), R0
|
||||
|
||||
loop: call subprog
|
||||
movc R0, (R15)
|
||||
call sout
|
||||
cmp R15, cntDigit0
|
||||
jeq sendCRLF
|
||||
dec R15
|
||||
jmp loop
|
||||
|
||||
sendCRLF: mov R0, CR
|
||||
call sout
|
||||
mov R0, LF
|
||||
call sout
|
||||
|
||||
jmp start
|
||||
|
||||
; -------------------------------------------------
|
||||
CounterInit: mov R0, 0x00
|
||||
movc (count0), R0
|
||||
movc (count1), R0
|
||||
movc (count2), R0
|
||||
movc (count3), R0
|
||||
ret
|
||||
|
||||
Cnt32: mov R0, count0
|
||||
cloop: movc R1, (R0)
|
||||
inc R1
|
||||
movc (R0), R1
|
||||
; ----------------
|
||||
mov R7, R1
|
||||
mov R14, R7
|
||||
mov R7, 0x55
|
||||
mov R7, 0xAA
|
||||
xor R7, R7
|
||||
xor R14, 0x99
|
||||
; ----------------
|
||||
jnc CountRdy
|
||||
cmp R0, count3
|
||||
jeq CountRdy
|
||||
inc R0
|
||||
jmp cloop
|
||||
CountRdy: ret
|
||||
|
||||
UpdateDigits: mov R2, cntDigit0
|
||||
mov R0, count0
|
||||
dualLoop: movc R1, (R0)
|
||||
and R1, 0x0F
|
||||
cmp R1, 0x0A
|
||||
jlt isNum1
|
||||
add R1, 0x07
|
||||
isNum1: add R1, 0x30
|
||||
movc (R2), R1
|
||||
inc R2
|
||||
movc R1, (R0)
|
||||
shr R1
|
||||
shr R1
|
||||
shr R1
|
||||
shr R1
|
||||
and R1, 0x0F
|
||||
cmp R1, 0x0A
|
||||
jlt isNum2
|
||||
add R1, 0x07
|
||||
isNum2: add R1, 0x30
|
||||
movc (R2), R1
|
||||
cmp R0, count3
|
||||
jeq UpdRdy
|
||||
inc R0
|
||||
inc R2
|
||||
jmp dualLoop
|
||||
UpdRdy: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; subprog
|
||||
; -------------------------------------------------
|
||||
subprog: push R0
|
||||
push R1
|
||||
push R2
|
||||
push R3
|
||||
push R4
|
||||
push R5
|
||||
push R6
|
||||
push R7
|
||||
push R8
|
||||
push R9
|
||||
push R10
|
||||
push R11
|
||||
push R12
|
||||
push R13
|
||||
push R14
|
||||
push R15
|
||||
pop R15
|
||||
pop R14
|
||||
pop R13
|
||||
pop R12
|
||||
pop R11
|
||||
pop R10
|
||||
pop R9
|
||||
pop R8
|
||||
pop R7
|
||||
pop R6
|
||||
pop R5
|
||||
pop R4
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; sout
|
||||
; -------------------------------------------------
|
||||
; R0 = input
|
||||
sout: push R1
|
||||
sout1: movx R1, (uart_status)
|
||||
and R1, 0x02
|
||||
jnz sout1
|
||||
movx (uart_data), R0
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; sin
|
||||
; -------------------------------------------------
|
||||
; R0 = output
|
||||
sin: push R1
|
||||
sin1: movx R1, (uart_status)
|
||||
and R1, 0x10
|
||||
jnz sin1
|
||||
movx R0, (uart_data)
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Init LCD
|
||||
; -------------------------------------------------
|
||||
LCD_init: mov R1, lcd_port
|
||||
movx (R1), lcd_read
|
||||
|
||||
call delay10ms
|
||||
|
||||
; 0.
|
||||
mov R2, 0x00
|
||||
mov R0, 0x03
|
||||
call LCD_write_
|
||||
call delay10ms
|
||||
mov R2, 0x00
|
||||
mov R0, 0x03
|
||||
call LCD_write_
|
||||
call delay10ms
|
||||
|
||||
mov R2, 0x00
|
||||
mov R0, 0x02
|
||||
call LCD_write_
|
||||
call delay1ms
|
||||
|
||||
; 1.
|
||||
mov R0, 0x28
|
||||
call LCD_writecmd
|
||||
|
||||
; 2.
|
||||
mov R0, 0x0E
|
||||
call LCD_writecmd
|
||||
|
||||
; 3.
|
||||
mov R0, 0x06
|
||||
call LCD_writecmd
|
||||
|
||||
; 3.
|
||||
mov R0, 0x01
|
||||
call LCD_writecmd
|
||||
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_Clear
|
||||
; -------------------------------------------------
|
||||
LCD_clear: push R0
|
||||
mov R0, 0x01
|
||||
call LCD_writecmd
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_writecmd
|
||||
; -------------------------------------------------
|
||||
; R0 = cmd
|
||||
LCD_writecmd: call LCD_waitbsy
|
||||
push R2
|
||||
push R0
|
||||
push R0
|
||||
mov R2, 0x00
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
call LCD_write_
|
||||
pop R0
|
||||
and R0, 0x0F
|
||||
call LCD_write_
|
||||
pop R0
|
||||
pop R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_writechar
|
||||
; -------------------------------------------------
|
||||
; R0 = char
|
||||
LCD_writechar: call LCD_waitbsy
|
||||
push R2
|
||||
push R0
|
||||
push R0
|
||||
mov R2, lcd_data
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
shr R0
|
||||
call LCD_write_
|
||||
pop R0
|
||||
and R0, 0x0F
|
||||
call LCD_write_
|
||||
pop R0
|
||||
pop R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_write_
|
||||
; -------------------------------------------------
|
||||
; R0 = input
|
||||
LCD_write_: push R1
|
||||
|
||||
mov R1, R0
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
mov R1, R0
|
||||
or R1, R2
|
||||
or R1, lcd_enable
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
mov R1, R0
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_read_
|
||||
; -------------------------------------------------
|
||||
; R0 = output
|
||||
LCD_read_: push R1
|
||||
|
||||
mov R1, lcd_read
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
mov R1, lcd_read
|
||||
or R1, R2
|
||||
or R1, lcd_enable
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
movx R0, (lcd_port)
|
||||
|
||||
mov R1, lcd_read
|
||||
or R1, R2
|
||||
movx (lcd_port), R1
|
||||
call delay1us
|
||||
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_readstat
|
||||
; -------------------------------------------------
|
||||
; R0 = status
|
||||
LCD_readstat: push R2
|
||||
mov R2, 0x00
|
||||
call LCD_read_
|
||||
shl R0
|
||||
shl R0
|
||||
shl R0
|
||||
shl R0
|
||||
push R0
|
||||
call LCD_read_
|
||||
and R0, 0x0F
|
||||
pop R2
|
||||
or R0, R2
|
||||
pop R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; LCD_waitbsy
|
||||
; -------------------------------------------------
|
||||
LCD_waitbsy: push R0
|
||||
bsy_loop: call LCD_readstat
|
||||
and R0, 0x80
|
||||
jz ex_bsy
|
||||
call delay1us
|
||||
jmp bsy_loop
|
||||
ex_bsy: pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
isr: push R0
|
||||
push R1
|
||||
movx R0, (led_port)
|
||||
xor R0, 0x02
|
||||
movx (led_port), R0
|
||||
|
||||
call LCD_clear
|
||||
|
||||
mov R0, LCD_CMD_Z1
|
||||
call LCD_writecmd
|
||||
|
||||
mov R1, txt_start
|
||||
read_rom: movx R0, (R1)
|
||||
call LCD_writechar
|
||||
inc R1
|
||||
cmp R1, txt_end
|
||||
jlt read_rom
|
||||
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
mov R1, cntDigit1
|
||||
movc R0, (R1)
|
||||
mov R1, cntDigit7
|
||||
cmp R0, 0x30
|
||||
jne print_num
|
||||
mov R0, 0x01
|
||||
movc (count_stat), R0
|
||||
|
||||
print_num: movc R0, (R1)
|
||||
call LCD_writechar
|
||||
cmp R1, cntDigit0
|
||||
jeq ex_isr
|
||||
dec R1
|
||||
jmp print_num
|
||||
|
||||
ex_isr: call delay1ms
|
||||
pop R1
|
||||
pop R0
|
||||
|
||||
reti
|
||||
|
||||
; -------------------------------------------------
|
||||
; Delays
|
||||
; -------------------------------------------------
|
||||
delay1s: push R15
|
||||
mov R15, DIV10
|
||||
loop1s: call delay100ms
|
||||
dec R15
|
||||
jnz loop1s
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay100ms: push R15
|
||||
mov R15, DIV10
|
||||
loop100ms: call delay10ms
|
||||
dec R15
|
||||
jnz loop100ms
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay10ms: push R15
|
||||
mov R15, DIV10
|
||||
loop10ms: call delay1ms
|
||||
dec R15
|
||||
jnz loop10ms
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay1ms: push R15
|
||||
mov R15, DIV10
|
||||
loop1ms: call delay100us
|
||||
dec R15
|
||||
jnz loop1ms
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay100us: push R15
|
||||
mov R15, DIV10
|
||||
loop100us: call delay10us
|
||||
dec R15
|
||||
jnz loop100us
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay10us: push R15
|
||||
mov R15, DIV10
|
||||
loop10us: call delay1us
|
||||
dec R15
|
||||
jnz loop10us
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay1us: push R15
|
||||
mov R15, DIV10
|
||||
loop1us: call delay100ns
|
||||
dec R15
|
||||
jnz loop1us
|
||||
pop R15
|
||||
ret
|
||||
|
||||
delay100ns: nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
ret
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,736 @@
|
||||
; -------------------------------------------------
|
||||
; Register definitions
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/cregs.inc.jsm"
|
||||
include "xregs.inc.jsm"
|
||||
|
||||
; -------------------------------------------------
|
||||
; Constants
|
||||
; -------------------------------------------------
|
||||
BURST_LEN: equ 8
|
||||
SD_CMD_WRITE: equ 0x06
|
||||
SD_CMD_READ: equ 0x05
|
||||
START_ADDR0: equ 0x00
|
||||
START_ADDR1: equ 0x00
|
||||
START_ADDR2: equ 0x20
|
||||
END_ADDR0: equ 0xF8
|
||||
END_ADDR1: equ 0xFF
|
||||
END_ADDR2: equ 0xFF
|
||||
SIO_TIMEOUT0: equ 0xE8
|
||||
SIO_TIMEOUT1: equ 0x03
|
||||
SIO_BUFSIZE: equ 64
|
||||
|
||||
; External RAM/ROM
|
||||
xmem
|
||||
crlf: dc 13, 10, 0
|
||||
greet_txt: dc "SDRAM Test", 0
|
||||
msg_txt0: dc "Clearing SDRAM", 0
|
||||
msg_txt1: dc "Writing SDRAM", 0
|
||||
msg_txt2: dc "Reading SDRAM", 0
|
||||
msg_txt3: dc "Reading Bitmap", 0
|
||||
verify_ok: dc "Verify OK", 0
|
||||
verify_nok: dc "Failed at ", 0
|
||||
dot: dc ".", 0
|
||||
|
||||
org 0x80
|
||||
sdram_data: db 8 ; SDRAM data window at X:0x80
|
||||
|
||||
; Internal RAM
|
||||
cmem 0
|
||||
block_cnt: db 1
|
||||
round_cnt: db 1
|
||||
bmp_offset: db 4
|
||||
pixel_buf: db 24
|
||||
|
||||
sio_rx_buf: db 64
|
||||
sio_rx_ptr_r: db 1
|
||||
sio_rx_ptr_w: db 1
|
||||
sio_timeout: db 2
|
||||
|
||||
; -------------------------------------------------
|
||||
; Program
|
||||
; -------------------------------------------------
|
||||
code
|
||||
reset: org 0x000
|
||||
jmp main
|
||||
|
||||
; -------------------------------------------------
|
||||
; ISR
|
||||
; -------------------------------------------------
|
||||
org 0x001
|
||||
sio_isr: push R0
|
||||
push R1
|
||||
u_get_nxt: xin R1, (uart_status)
|
||||
and R1, 0x10
|
||||
jz ex_uart_isr
|
||||
xin R0, (uart_data)
|
||||
movc R1, (sio_rx_ptr_w)
|
||||
movc (R1), R0
|
||||
inc R1
|
||||
cmp R1, sio_rx_buf+64
|
||||
jne u_upd_nxt
|
||||
mov R1, sio_rx_buf
|
||||
u_upd_nxt: movc (sio_rx_ptr_w), R1
|
||||
movc R0, (sio_rx_ptr_r)
|
||||
cmp R0, R1
|
||||
jne u_get_nxt
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, 0x20
|
||||
xout (ctrl_reg), R0
|
||||
jmp u_get_nxt
|
||||
ex_uart_isr: call Timer_isr
|
||||
pop R1
|
||||
pop R0
|
||||
reti
|
||||
|
||||
Timer_isr: xin R0, (btn_port)
|
||||
and R0, 0x01
|
||||
jz btn_chk2
|
||||
mov R0, vga_read_addr
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x00
|
||||
jmp ex_t_isr
|
||||
btn_chk2: xin R0, (btn_port)
|
||||
and R0, 0x02
|
||||
jz ex_t_isr
|
||||
mov R0, vga_read_addr
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x00
|
||||
inc R0
|
||||
xout (R0), 0x20
|
||||
ex_t_isr: ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Main
|
||||
; -------------------------------------------------
|
||||
main: call sio_init
|
||||
call LCD_init
|
||||
mov R0, 0x00
|
||||
xout (led_port), R0
|
||||
|
||||
mov R0, CTRL_VGA_ENABLE
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, CTRL_TIMER_ENABLE
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
mov R0, 0x03
|
||||
cout (cpu_int_ctrl), R0
|
||||
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
mov R0, 0
|
||||
mov R1, 0xC0
|
||||
xout (reg_color_red), R1
|
||||
xout (reg_color_grn), R1
|
||||
xout (reg_color_blu), R1
|
||||
|
||||
call cg_wait_rdy
|
||||
call cg_clr_screen
|
||||
|
||||
; Print greeting message
|
||||
mov R1, greet_txt
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, greet_txt
|
||||
call cg_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
xin R0, (ctrl_reg)
|
||||
and R0, 0xCF
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
mov R0, 0
|
||||
movc (round_cnt), R0
|
||||
|
||||
|
||||
main_loop: call write_uart_data
|
||||
; call do_clear
|
||||
ML1: call do_write
|
||||
call do_read
|
||||
movc R0, (round_cnt)
|
||||
inc R0
|
||||
movc (round_cnt), R0
|
||||
jmp ML1
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM clear
|
||||
; ----------------------------------------------------------
|
||||
do_clear:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Clear message
|
||||
mov R1, msg_txt0
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt0
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
mov R0, 0
|
||||
mov R1, 0
|
||||
mov R2, 0
|
||||
call AddrCnt_Init
|
||||
|
||||
; Fill SDR Buffer with zeros
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
buf_clr_loop: movx (R0), 0
|
||||
inc R0
|
||||
dec R15
|
||||
jnz buf_clr_loop
|
||||
|
||||
sdr_clear: mov R2, BURST_LEN
|
||||
|
||||
poll_clear_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_clear_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz poll_clear_full
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, END_ADDR0
|
||||
jne next_addr_c
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, END_ADDR1
|
||||
jne next_addr_c
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, END_ADDR2
|
||||
jeq clear_finished
|
||||
|
||||
; Advance address counter
|
||||
next_addr_c: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
|
||||
jmp sdr_clear
|
||||
|
||||
clear_finished:
|
||||
call AddrCnt_Disp
|
||||
call delay1s
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
write_uart_data:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Clear message
|
||||
mov R1, msg_txt3
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt3
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
; mov R0, 0xF8 ; 800x600
|
||||
; mov R1, 0x52 ; 800x600
|
||||
; mov R2, 0x07 ; 800x600
|
||||
mov R0, 0xF8 ; 1280x1024
|
||||
mov R1, 0xFF ; 1280x1024
|
||||
mov R2, 0x13 ; 1280x1024
|
||||
call AddrCnt_Init
|
||||
|
||||
read_bmp: mov R15, 0
|
||||
skip_hdr1: call sio_getchar
|
||||
jc write_uart_data
|
||||
inc R15
|
||||
cmp R15, 10
|
||||
jne skip_hdr1
|
||||
|
||||
call sio_getchar
|
||||
jc write_uart_data
|
||||
inc R15
|
||||
movc (bmp_offset+0), R0
|
||||
|
||||
call sio_getchar
|
||||
jc write_uart_data
|
||||
inc R15
|
||||
movc (bmp_offset+1), R0
|
||||
|
||||
call sio_getchar
|
||||
jc write_uart_data
|
||||
inc R15
|
||||
movc (bmp_offset+2), R0
|
||||
|
||||
call sio_getchar
|
||||
jc write_uart_data
|
||||
inc R15
|
||||
movc (bmp_offset+3), R0
|
||||
|
||||
movc R1, (bmp_offset+0)
|
||||
skip_hdr2: call sio_getchar
|
||||
jc write_uart_data
|
||||
inc R15
|
||||
cmp R15, R1
|
||||
jne skip_hdr2
|
||||
|
||||
get_pixel: mov R15, 8
|
||||
mov R1, pixel_buf+23
|
||||
next_pixel: mov R2, 3
|
||||
next_color: dec R2
|
||||
mov R3, R1
|
||||
call sio_getchar
|
||||
jc sdw_fin
|
||||
sub R3, R2
|
||||
movc (R3), R0
|
||||
tst R2
|
||||
jnz next_color
|
||||
sub R1, 3
|
||||
dec R15
|
||||
jnz next_pixel
|
||||
|
||||
mov R2, BURST_LEN
|
||||
|
||||
; Fill SDR Buffer
|
||||
mov R1, pixel_buf
|
||||
wls: mov R3, sdram_data
|
||||
wls0: movc R0, (R1)
|
||||
movx (R3), R0
|
||||
inc R1
|
||||
inc R3
|
||||
cmp R3, sdram_data+6
|
||||
jne wls0
|
||||
|
||||
pwf: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz pwf
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz wls
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
call AddrCnt_Disp
|
||||
xin R0, (sdram_addr+0)
|
||||
tst R0
|
||||
jnz next_addr
|
||||
xin R0, (sdram_addr+1)
|
||||
tst R0
|
||||
jnz next_addr
|
||||
xin R0, (sdram_addr+2)
|
||||
tst R0
|
||||
jz sdw_fin
|
||||
|
||||
; Advance address counter
|
||||
next_addr: mov R0, BURST_LEN
|
||||
call AddrCnt_Dec
|
||||
jmp get_pixel
|
||||
sdw_fin: call delay1s
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Write
|
||||
; ----------------------------------------------------------
|
||||
do_write:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Write message
|
||||
mov R1, msg_txt1
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt1
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
mov R0, START_ADDR0
|
||||
mov R1, START_ADDR1
|
||||
mov R2, START_ADDR2
|
||||
call AddrCnt_Init
|
||||
movc R0, (round_cnt)
|
||||
movc (block_cnt), R0
|
||||
|
||||
sdr_write: mov R2, BURST_LEN
|
||||
|
||||
; Fill SDR Buffer
|
||||
sdr_burst_wr: movc R1, (block_cnt)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
write_loop: movx (R0), R1
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz write_loop
|
||||
|
||||
poll_write_full:
|
||||
xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_WRITE_DATA_FULL
|
||||
jnz poll_write_full
|
||||
|
||||
; Fill FIFO
|
||||
mov R0, FIFO_CTRL_IS_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (block_cnt)
|
||||
inc R0
|
||||
movc (block_cnt), R0
|
||||
|
||||
sub R2, 2
|
||||
jnz sdr_burst_wr
|
||||
|
||||
; Start SDR write
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_WRITE
|
||||
xout (sdram_reg), R0
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, END_ADDR0
|
||||
jne next_addr_w
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, END_ADDR1
|
||||
jne next_addr_w
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, END_ADDR2
|
||||
jeq write_finished
|
||||
|
||||
; Advance address counter
|
||||
next_addr_w: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
|
||||
jmp sdr_write
|
||||
|
||||
write_finished: call AddrCnt_Disp
|
||||
call delay1s
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
; SDRAM Verify
|
||||
; ----------------------------------------------------------
|
||||
do_read:
|
||||
; Clear LCD
|
||||
mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
|
||||
; Print Read message
|
||||
mov R1, msg_txt2
|
||||
call LCD_putsx
|
||||
|
||||
mov R1, msg_txt2
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
; Set SDRAM address register to 0
|
||||
mov R0, START_ADDR0
|
||||
mov R1, START_ADDR1
|
||||
mov R2, START_ADDR2
|
||||
call AddrCnt_Init
|
||||
movc R0, (round_cnt)
|
||||
movc (block_cnt), R0
|
||||
|
||||
; flush_data
|
||||
flush_data: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_READ_DATA_EMPTY
|
||||
jnz sdr_read
|
||||
mov R0, FIFO_CTRL_IS_READ
|
||||
xout (sdram_reg), R0
|
||||
jmp flush_data
|
||||
|
||||
sdr_read: ; Start SDR read
|
||||
call wait_cmd_rdy
|
||||
mov R0, SD_CMD_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
mov R3, BURST_LEN
|
||||
|
||||
; Wait last read
|
||||
poll_read_fin: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_READ_DATA_EMPTY
|
||||
jnz poll_read_fin
|
||||
|
||||
; Verify SDR Buffer
|
||||
movc R1, (block_cnt)
|
||||
mov R0, sdram_data
|
||||
mov R15, 8
|
||||
read_loop: movx R2, (R0)
|
||||
cmp R2, R1
|
||||
jne verify_error
|
||||
inc R0
|
||||
inc R1
|
||||
dec R15
|
||||
jnz read_loop
|
||||
|
||||
; Advance Read-FIFO
|
||||
mov R0, FIFO_CTRL_IS_READ
|
||||
xout (sdram_reg), R0
|
||||
|
||||
movc R0, (block_cnt)
|
||||
inc R0
|
||||
movc (block_cnt), R0
|
||||
|
||||
sub R3, 2
|
||||
jnz poll_read_fin
|
||||
|
||||
xin R0, (sdram_addr+0)
|
||||
cmp R0, END_ADDR0
|
||||
jne next_addr_r
|
||||
xin R0, (sdram_addr+1)
|
||||
cmp R0, END_ADDR1
|
||||
jne next_addr_r
|
||||
xin R0, (sdram_addr+2)
|
||||
cmp R0, END_ADDR2
|
||||
jeq read_finished
|
||||
|
||||
; Advance address counter
|
||||
next_addr_r: mov R0, BURST_LEN
|
||||
call AddrCnt_Inc
|
||||
jmp sdr_read
|
||||
|
||||
; ----------------------------------------------------------
|
||||
wait_cmd_rdy: push R0
|
||||
wait4cmd: xin R0, (sdram_reg)
|
||||
xout (led_port), R0
|
||||
and R0, FIFO_STAT_CMD_FULL
|
||||
jnz wait4cmd
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; ----------------------------------------------------------
|
||||
read_finished:
|
||||
no_error: mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
mov R1, verify_ok
|
||||
call LCD_putsx
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
call print_addr
|
||||
|
||||
mov R1, verify_ok
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
|
||||
jmp ende
|
||||
|
||||
verify_error: mov R0, LCD_CMD_CLEAR
|
||||
call LCD_writecmd
|
||||
mov R1, verify_nok
|
||||
call LCD_putsx
|
||||
call print_addr
|
||||
call print_data
|
||||
mov R1, verify_nok
|
||||
call cg_clr_puts
|
||||
mov R1, crlf
|
||||
call cg_puts_clr
|
||||
xin R0, (ctrl_reg)
|
||||
or R0, 0x10
|
||||
xout (ctrl_reg), R0
|
||||
|
||||
jmp ende
|
||||
|
||||
ende: call delay1s
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
AddrCnt_Init: xout (sdram_addr+0), R0
|
||||
xout (sdram_addr+1), R1
|
||||
xout (sdram_addr+2), R2
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: increment value
|
||||
AddrCnt_Inc: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
add R1, R0
|
||||
addc R2, 0
|
||||
addc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Parameter
|
||||
; R0: decrement value
|
||||
AddrCnt_Dec: push R1
|
||||
push R2
|
||||
push R3
|
||||
xin R1, (sdram_addr+0)
|
||||
xin R2, (sdram_addr+1)
|
||||
xin R3, (sdram_addr+2)
|
||||
sub R1, R0
|
||||
subc R2, 0
|
||||
subc R3, 0
|
||||
xout (sdram_addr+0), R1
|
||||
xout (sdram_addr+1), R2
|
||||
xout (sdram_addr+2), R3
|
||||
pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Display Address counter
|
||||
AddrCnt_Disp: mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
call print_addr
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; PutHexByte
|
||||
; R0 : Byte value
|
||||
PutHexByte: push R1
|
||||
call bin2hex
|
||||
call LCD_writechar
|
||||
mov R0, R1
|
||||
call LCD_writechar
|
||||
pop R1
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_addr: push R0
|
||||
xin R0, (sdram_addr+2)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+1)
|
||||
call PutHexByte
|
||||
xin R0, (sdram_addr+0)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; R1 : ptr to byte array
|
||||
print_dword: push R0
|
||||
add R1, 3
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
dec R1
|
||||
movc R0, (R1)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
print_data: push R0
|
||||
mov R0, LCD_CMD_Z2
|
||||
call LCD_writecmd
|
||||
movx R0, (sdram_data+7)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+6)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+5)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+4)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+3)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+2)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+1)
|
||||
call PutHexByte
|
||||
movx R0, (sdram_data+0)
|
||||
call PutHexByte
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
sio_init: push R0
|
||||
mov R0, 13
|
||||
xout (uart_baudrate), R0
|
||||
mov R0, sio_rx_buf
|
||||
movc (sio_rx_ptr_r), R0
|
||||
movc (sio_rx_ptr_w), R0
|
||||
mov R0, SIO_TIMEOUT0
|
||||
movc (sio_timeout+0), R0
|
||||
mov R0, SIO_TIMEOUT1
|
||||
movc (sio_timeout+1), R0
|
||||
pop R0
|
||||
ret
|
||||
|
||||
; -------------------------------------------------
|
||||
; Params: none
|
||||
; Return:
|
||||
; R0 : received character
|
||||
sio_getchar: push R1
|
||||
push R2
|
||||
push R3
|
||||
movc R2, (sio_timeout+0)
|
||||
movc R3, (sio_timeout+1)
|
||||
movc R1, (sio_rx_ptr_r)
|
||||
sio_wait_rx: movc R0, (sio_rx_ptr_w)
|
||||
cmp R0, R1
|
||||
jeq wait_rx_stub
|
||||
movc R0, (R1)
|
||||
inc R1
|
||||
cmp R1, sio_rx_buf+64
|
||||
jne u_upd_r_ptr
|
||||
mov R1, sio_rx_buf
|
||||
u_upd_r_ptr: movc (sio_rx_ptr_r), R1
|
||||
clrc
|
||||
ex_sio_gc: pop R3
|
||||
pop R2
|
||||
pop R1
|
||||
ret
|
||||
wait_rx_stub: call delay1ms
|
||||
dec R2
|
||||
subc R3, 0
|
||||
jnz sio_wait_rx
|
||||
tst R2
|
||||
jnz sio_wait_rx
|
||||
sio_to: setc
|
||||
jmp ex_sio_gc
|
||||
|
||||
; -------------------------------------------------
|
||||
include "../../../lib/jasm/utils.inc.jsm"
|
||||
include "../../../lib/jasm/lcd.inc.jsm"
|
||||
include "../../../lib/jasm/cg.inc.jsm"
|
||||
include "../../../lib/jasm/delays.inc.jsm"
|
||||
include "../../../lib/jasm/uart.inc.jsm"
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,41 @@
|
||||
; External registers
|
||||
btn_port: equ 0x00 ; RO
|
||||
led_port: equ 0x01 ; R/W
|
||||
uart_data: equ 0x02 ; R/W
|
||||
lcd_port: equ 0x03 ; R/W
|
||||
ctrl_reg: equ 0x04 ; R/W
|
||||
CTRL_VGA_ENABLE: equ 0x04
|
||||
CTRL_TIMER_ENABLE: equ 0x02
|
||||
dip_port: equ 0x05 ; RO
|
||||
uart_status: equ 0x06 ; RO
|
||||
sdram_reg: equ 0x07 ; R/W
|
||||
FIFO_CTRL_IS_CMD: equ 0x04
|
||||
FIFO_CTRL_IS_WRITE: equ 0x10
|
||||
FIFO_CTRL_IS_READ: equ 0x20
|
||||
FIFO_STAT_CMD_FULL: equ 0x01
|
||||
FIFO_STAT_CMD_EMPTY: equ 0x02
|
||||
FIFO_STAT_WRITE_DATA_FULL: equ 0x04
|
||||
FIFO_STAT_WRITE_DATA_EMPTY: equ 0x08
|
||||
FIFO_STAT_READ_DATA_FULL: equ 0x10
|
||||
FIFO_STAT_READ_DATA_EMPTY: equ 0x20
|
||||
sdram_addr: equ 0x08 ; R/W
|
||||
sdram_addr0: equ 0x08 ; R/W
|
||||
sdram_addr1: equ 0x09 ; R/W
|
||||
sdram_addr2: equ 0x0A ; R/W
|
||||
reg_cg_char_addr: equ 0x0B ; RW
|
||||
reg_cg_line_addr: equ 0x0C ; RW
|
||||
reg_cg_data: equ 0x0D ; RW
|
||||
reg_cg_ctrl: equ 0x0E ; WO
|
||||
reg_hwstat: equ 0x0E ; RO
|
||||
reg_color_red: equ 0x10 ; RW
|
||||
reg_color_grn: equ 0x11 ; RW
|
||||
reg_color_blu: equ 0x12 ; RW
|
||||
uart_baudrate: equ 0x13 ; R/W
|
||||
vga_read_addr: equ 0x14 ; R/W
|
||||
vga_read_addr0: equ 0x14 ; R/W
|
||||
vga_read_addr1: equ 0x15 ; R/W
|
||||
vga_read_addr2: equ 0x16 ; R/W
|
||||
timer_reload: equ 0x17 ; R/W
|
||||
timer_reload0: equ 0x17 ; R/W
|
||||
timer_reload1: equ 0x18 ; R/W
|
||||
timer_reload2: equ 0x19 ; R/W
|
||||
Reference in New Issue
Block a user