jens
ea60299d26
git-svn-id: http://moon:8086/svn/vhdl/trunk@1414 cc03376c-175c-47c8-b038-4cd826a8556b
65 lines
2.4 KiB
Tcl
65 lines
2.4 KiB
Tcl
# ----------------------------------------------------------------------
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# Project: JCPU, a portable 8-bit RISC CPU written in VHDL
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# This file: The ROM file for upload to target over JTAG
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# Copyright (C) 2007 J. Ahrensfeld
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# This library is free software; you can redistribute it and/or
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# modify it under the terms of the GNU Lesser General Public
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# License as published by the Free Software Foundation; either
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# version 2.1 of the License, or (at your option) any later version.
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# This library is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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# Lesser General Public License for more details.
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# You should have received a copy of the GNU Lesser General Public
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# License along with this library; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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# For questions and ideas, please contact the author at jens@jayfield.org
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# ---------------------------------------------------------------------
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# Source JTAG/TCL frame work
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#cd $env(CHIPSCOPE)\bin\nt
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cd F:\\Xilinx9\\ChipScope_Pro_9_1i\\bin\\nt
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source csejtag.tcl
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namespace import ::chipscope::*
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# Platform USB Cable
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set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \
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"frequency=6000000"]
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# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000"
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set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB
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set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS
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# Create session
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set handle [::chipscope::csejtag_session create 0]
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# Open JTAG and lock
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set open_result [::chipscope::csejtag_target open $handle $CABLE_NAME 0 $CABLE_ARGS]
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set lock_result [::chipscope::csejtag_target lock $handle 1000]
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set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT]
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# Get Device ID
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set devtype "Virtex-4SX"
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set devid 2
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# ---------------------------------------------------------------
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# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA
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# User 1
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::chipscope::csejtag_tap shift_chain_ir $handle $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 10 3C2
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# Write Program
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# JASM_ROM_INSERT_HERE
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::chipscope::csejtag_target unlock $handle
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::chipscope::csejtag_target close $handle
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::chipscope::csejtag_session destroy $handle
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exit
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