diff --git a/projects/cpu/Makefile b/projects/cpu/Makefile new file mode 100644 index 0000000..8f22854 --- /dev/null +++ b/projects/cpu/Makefile @@ -0,0 +1,68 @@ +# ------------------------------------------------- +# Global options +# ------------------------------------------------- +LANG_STD := 93c +IEEE_STD := standard +WORK_PATH := work +SOURCE_PATH := src +LIB_PATH := ../lib + +# ------------------------------------------------- +# Target options +# ------------------------------------------------- +TARGET := tb_cpu + +SOURCES := $(SOURCE_PATH)/cpu_pkg.vhd \ + $(SOURCE_PATH)/stack.vhd \ + $(SOURCE_PATH)/pc.vhd \ + $(SOURCE_PATH)/reg_dual.vhd \ + $(SOURCE_PATH)/dpath_ctrl.vhd \ + $(SOURCE_PATH)/cpu.vhd \ + $(SOURCE_PATH)/alu.vhd \ + $(SOURCE_PATH)/$(TARGET).vhd + +# ------------------------------------------------- +GHDL_OPT := --workdir=$(WORK_PATH) --std=$(LANG_STD) --ieee=$(IEEE_STD) + +# ------------------------------------------------- +all: elaborate + +.PHONY: syntax +syntax: + ghdl -s $(GHDL_OPT) $(SOURCES) + +import: + ghdl -i $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES) + +analyze: + ghdl -a $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES) + +anaborate: + ghdl -c $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES) -e $(TARGET) + +makeunit: analyze + ghdl -m $(GHDL_OPT) $(TARGET) + +elaborate: analyze + ghdl -e $(GHDL_OPT) $(TARGET) + +run: elaborate + ghdl -r $(GHDL_OPT) $(TARGET) --vcd=$(TARGET).vcd --wave=$(TARGET).ghw --assert-level=error + +show: $(TARGET).vcd + gtkwave $(TARGET).ghw $(TARGET).sav + +xref: import + mkdir -p html + ghdl --xref-html $(SOURCES) + +tree: elaborate + ./$(TARGET) --no-run --disp-tree=inst + +# ------------------------------------------------- +.PHONY: clean +clean: + rm -rf $(TARGET) + cd $(WORK_PATH); rm -rf *.o *.cf + +# ------------------------------------------------- diff --git a/projects/cpu/asm/counter.jsm b/projects/cpu/asm/counter.jsm new file mode 100644 index 0000000..2b3175a --- /dev/null +++ b/projects/cpu/asm/counter.jsm @@ -0,0 +1,284 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +CR: equ 0x0D +LF: equ 0x0A +report_ival: equ 0x64 + +; External RAM/ROM + xmem +msg_txt: dc "J-CPU V1.", 0 + +; Internal RAM + cmem 0 +count: db 4 + +cntDigit: db 8 + +count_stat: db 1 +shifter: db 1 + +ram_txt_start: db 15 +ram_txt_end: db 1 +ram_txt_ptr: db 1 +upd_z1: db 1 +page_test_var: db 1 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp ende + + org 1023 +ende: jmp init + + org 0x001 +; ------------------------------------------------- +; ISR +; ------------------------------------------------- +isr: push R0 + push R1 + push R2 + push R3 + push R4 + push R5 + push R6 + push R7 + push R8 + push R9 + push R10 + push R11 + push R12 + push R13 + push R14 + push R15 + + xin R0, (uart_status) + and R0, 0x10 + jz rcv_empty + xin R0, (uart_data) + cmp R0, 0x0D + jeq reset_ptr + movc R1, (ram_txt_ptr) + movc (R1), R0 + cmp R1, ram_txt_end + jlt inc_ptr +reset_ptr: mov R1, ram_txt_start + dec R1 + movc (upd_z1), R1 +inc_ptr: inc R1 + movc (ram_txt_ptr), R1 +rcv_empty: call Cnt32 + + pop R15 + pop R14 + pop R13 + pop R12 + pop R11 + pop R10 + pop R9 + pop R8 + pop R7 + pop R6 + pop R5 + pop R4 + pop R3 + pop R2 + pop R1 + pop R0 + reti + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +init: ; org 0x40 + + call CounterInit + call LCD_init + mov R0, 0x00 + movc (count_stat), R0 + xout (led_port), R0 + movc (upd_z1), R0 + xin R1, (btn_port) + or R1, 0x80 + movc (shifter), R1 + mov R0, ram_txt_start + movc (ram_txt_ptr), R0 + + mov R0, ctrl_reg + ; Enable timer + xout (R0), 0x02 + ; Enable interrupt source + xout (R0), 0x03 + mov R0, report_ival + movc (count_stat), R0 + + ; Enable CPU interrupt + mov R0, 0x03 + cout (cpu_int_ctrl), R0 + + ; Print Hello world + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, msg_txt + call LCD_putsx + + ; Read revision reg to form version number v1. +end_txt: cin R0, (cpu_revision) + add R0, 0x30 + call LCD_writechar + + ; check page sel function + mov R0, 0x00 + cout (cpu_control), R0 + mov R1, 0x00 + movc (page_test_var), R1 + + mov R0, 0x01 + cout (cpu_control), R0 + mov R1, 0xAA + movc (page_test_var), R1 + + mov R0, 0x00 + cout (cpu_control), R0 + movc R0, (page_test_var) + cmp R0, 0xAA + jeq error + + mov R0, 0x01 + cout (cpu_control), R0 + movc R0, (page_test_var) + cmp R0, 0xAA + jeq page_reset + +error: jmp error + +page_reset: mov R0, 0x00 + cout (cpu_control), R0 + +; ------------------------------------------------- +; Main loop +; ------------------------------------------------- +start: halt + + movc R0, (count_stat) + dec R0 + movc (count_stat), R0 + jnz start + mov R7, report_ival + movc R1, (cntDigit+0) + movc R2, (cntDigit+1) + swap R1 + xor R1, R2 + and R1, 0x02 + jnz do_add + dec R7 + mov R0, 0x2D + jmp upd_cs + +do_add: inc R7 + mov R0, 0x2B +upd_cs: movc (count_stat), R7 + call sout + + ; Toggle LED + movc R0, (shifter) + rol R0 + movc (shifter), R0 + +; xin R0, (led_port) +; xor R0, 0x02 + xout (led_port), R0 + + movc R0, (upd_z1) + mov R1, 0x00 + movc (upd_z1), R1 + tst R0 + jz upd_num + + mov R1, ram_txt_start +read_ram: movc R0, (R1) + call LCD_writechar + inc R1 + cmp R1, ram_txt_end + jle read_ram + + ; Write digits to LCD and serial +upd_num: call UpdateDigits + mov R0, LCD_CMD_Z2 + call LCD_writecmd + mov R1, cntDigit+7 +print_num: movc R0, (R1) + call sout + call LCD_writechar + cmp R1, cntDigit+0 + jeq sendCRLF + dec R1 + jmp print_num + +sendCRLF: mov R0, CR + call sout + mov R0, LF + call sout + +ex_print: jmp start + +; ------------------------------------------------- +CounterInit: mov R0, 0x00 + movc (count+0), R0 + movc (count+1), R0 + movc (count+2), R0 + movc (count+3), R0 + ret + +; ------------------------------------------------- +Cnt32: mov R0, count+0 +cloop: movc R1, (R0) + inc R1 + movc (R0), R1 + jnc CountRdy + cmp R0, count+3 + jeq CountRdy + inc R0 + jmp cloop +CountRdy: ret + +; ------------------------------------------------- +UpdateDigits: mov R2, cntDigit+0 + mov R0, count+0 +dualLoop: movc R1, (R0) + and R1, 0x0F + cmp R1, 0x0A + jlt isNum1 + add R1, 0x07 +isNum1: add R1, 0x30 + movc (R2), R1 + inc R2 + movc R1, (R0) + swap R1 + and R1, 0x0F + cmp R1, 0x0A + jlt isNum2 + add R1, 0x07 +isNum2: add R1, 0x30 + movc (R2), R1 + cmp R0, count+3 + jeq UpdRdy + inc R0 + inc R2 + jmp dualLoop +UpdRdy: ret + +; ------------------------------------------------- +include "../../../lib/jasm/uart.inc.jsm" +include "../../../lib/jasm/lcd.inc.jsm" +include "../../../lib/jasm/delays.inc.jsm" + \ No newline at end of file diff --git a/projects/cpu/asm/counter.tcl b/projects/cpu/asm/counter.tcl new file mode 100644 index 0000000..e9415d1 --- /dev/null +++ b/projects/cpu/asm/counter.tcl @@ -0,0 +1,3156 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from counter.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x3FF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "000303FF" + +# 0x001: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013C000" + +# 0x002: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0023C001" + +# 0x003: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0033C002" + +# 0x004: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0043C003" + +# 0x005: PUSH R04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0053C004" + +# 0x006: PUSH R05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0063C005" + +# 0x007: PUSH R06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0073C006" + +# 0x008: PUSH R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0083C007" + +# 0x009: PUSH R08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0093C008" + +# 0x00A: PUSH R09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A3C009" + +# 0x00B: PUSH R10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B3C00A" + +# 0x00C: PUSH R11 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C3C00B" + +# 0x00D: PUSH R12 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D3C00C" + +# 0x00E: PUSH R13 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E3C00D" + +# 0x00F: PUSH R14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F3C00E" + +# 0x010: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103C00F" + +# 0x011: XIN R00, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01128060" + +# 0x012: AND R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01219100" + +# 0x013: JZ 0x020 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01331020" + +# 0x014: XIN R00, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01428020" + +# 0x015: CMP R00, 0x0D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0150F0D0" + +# 0x016: JEQ 0x01B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0163901B" + +# 0x017: MOVC R01, (0x1E) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0170A1E1" + +# 0x018: MOVC (R00), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0180B010" + +# 0x019: CMP R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0190F1D1" + +# 0x01A: JLT 0x01E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A3501E" + +# 0x01B: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B030E1" + +# 0x01C: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C15011" + +# 0x01D: MOVC (0x1F), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D0D1F1" + +# 0x01E: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E11011" + +# 0x01F: MOVC (0x1E), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F0D1E1" + +# 0x020: CALL 0x098 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0203B098" + +# 0x021: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0213D00F" + +# 0x022: POP R14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0223D00E" + +# 0x023: POP R13 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0233D00D" + +# 0x024: POP R12 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0243D00C" + +# 0x025: POP R11 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0253D00B" + +# 0x026: POP R10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0263D00A" + +# 0x027: POP R09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0273D009" + +# 0x028: POP R08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0283D008" + +# 0x029: POP R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0293D007" + +# 0x02A: POP R06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A3D006" + +# 0x02B: POP R05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B3D005" + +# 0x02C: POP R04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C3D004" + +# 0x02D: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D3D003" + +# 0x02E: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E3D002" + +# 0x02F: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F3D001" + +# 0x030: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0303D000" + +# 0x031: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0313F000" + +# 0x032: CALL 0x092 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0323B092" + +# 0x033: CALL 0x0C8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0333B0C8" + +# 0x034: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03403000" + +# 0x035: MOVC (0x0C), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0350D0C0" + +# 0x036: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03624010" + +# 0x037: MOVC (0x1F), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0370D1F0" + +# 0x038: XIN R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03828001" + +# 0x039: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0391B801" + +# 0x03A: MOVC (0x0D), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A0D0D1" + +# 0x03B: MOV R00, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B030E0" + +# 0x03C: MOVC (0x1E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C0D1E0" + +# 0x03D: MOV R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D03040" + +# 0x03E: XOUT (R00), 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E25020" + +# 0x03F: XOUT (R00), 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F25030" + +# 0x040: MOV R00, 0x64 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04003640" + +# 0x041: MOVC (0x0C), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0410D0C0" + +# 0x042: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04203030" + +# 0x043: COUT (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04326030" + +# 0x044: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04403010" + +# 0x045: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0453B0E5" + +# 0x046: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04603001" + +# 0x047: CALL 0x0EA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0473B0EA" + +# 0x048: CIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04829000" + +# 0x049: ADD R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04911300" + +# 0x04A: CALL 0x0FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A3B0FC" + +# 0x04B: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B03000" + +# 0x04C: COUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C26010" + +# 0x04D: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D03001" + +# 0x04E: MOVC (0x20), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E0D201" + +# 0x04F: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F03010" + +# 0x050: COUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05026010" + +# 0x051: MOV R01, 0xAA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05103AA1" + +# 0x052: MOVC (0x20), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0520D201" + +# 0x053: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05303000" + +# 0x054: COUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05426010" + +# 0x055: MOVC R00, (0x20) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0550A200" + +# 0x056: CMP R00, 0xAA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0560FAA0" + +# 0x057: JEQ 0x05D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0573905D" + +# 0x058: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05803010" + +# 0x059: COUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05926010" + +# 0x05A: MOVC R00, (0x20) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A0A200" + +# 0x05B: CMP R00, 0xAA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B0FAA0" + +# 0x05C: JEQ 0x05E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C3905E" + +# 0x05D: JMP 0x05D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D3005D" + +# 0x05E: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E03000" + +# 0x05F: COUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F26010" + +# 0x060: HALT +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06001000" + +# 0x061: MOVC R00, (0x0C) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0610A0C0" + +# 0x062: DEC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06215010" + +# 0x063: MOVC (0x0C), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0630D0C0" + +# 0x064: JNZ 0x060 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06432060" + +# 0x065: MOV R07, 0x64 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06503647" + +# 0x066: MOVC R01, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0660A041" + +# 0x067: MOVC R02, (0x05) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0670A052" + +# 0x068: SWAP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0682A001" + +# 0x069: XOR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0691C021" + +# 0x06A: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A19021" + +# 0x06B: JNZ 0x06F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B3206F" + +# 0x06C: DEC R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C15017" + +# 0x06D: MOV R00, 0x2D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D032D0" + +# 0x06E: JMP 0x071 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E30071" + +# 0x06F: INC R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F11017" + +# 0x070: MOV R00, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "070032B0" + +# 0x071: MOVC (0x0C), R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0710D0C7" + +# 0x072: CALL 0x0BA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0723B0BA" + +# 0x073: MOVC R00, (0x0D) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0730A0D0" + +# 0x074: ROL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07420000" + +# 0x075: MOVC (0x0D), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0750D0D0" + +# 0x076: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07624010" + +# 0x077: MOVC R00, (0x1F) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0770A1F0" + +# 0x078: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07803001" + +# 0x079: MOVC (0x1F), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0790D1F1" + +# 0x07A: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A0F000" + +# 0x07B: JZ 0x082 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B31082" + +# 0x07C: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C030E1" + +# 0x07D: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D09010" + +# 0x07E: CALL 0x0FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E3B0FC" + +# 0x07F: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F11011" + +# 0x080: CMP R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0800F1D1" + +# 0x081: JLE 0x07D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0813707D" + +# 0x082: CALL 0x0A2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0823B0A2" + +# 0x083: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08303C00" + +# 0x084: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0843B0E5" + +# 0x085: MOV R01, 0x0B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "085030B1" + +# 0x086: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08609010" + +# 0x087: CALL 0x0BA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0873B0BA" + +# 0x088: CALL 0x0FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0883B0FC" + +# 0x089: CMP R01, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0890F041" + +# 0x08A: JEQ 0x08D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A3908D" + +# 0x08B: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B15011" + +# 0x08C: JMP 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C30086" + +# 0x08D: MOV R00, 0x0D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D030D0" + +# 0x08E: CALL 0x0BA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E3B0BA" + +# 0x08F: MOV R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F030A0" + +# 0x090: CALL 0x0BA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0903B0BA" + +# 0x091: JMP 0x060 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09130060" + +# 0x092: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09203000" + +# 0x093: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0930D000" + +# 0x094: MOVC (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0940D010" + +# 0x095: MOVC (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0950D020" + +# 0x096: MOVC (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0960D030" + +# 0x097: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0973E000" + +# 0x098: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09803000" + +# 0x099: MOVC R01, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09909001" + +# 0x09A: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A11011" + +# 0x09B: MOVC (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B0B001" + +# 0x09C: JNC 0x0A1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C340A1" + +# 0x09D: CMP R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D0F030" + +# 0x09E: JEQ 0x0A1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E390A1" + +# 0x09F: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F11010" + +# 0x0A0: JMP 0x099 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A030099" + +# 0x0A1: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A13E000" + +# 0x0A2: MOV R02, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A203042" + +# 0x0A3: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A303000" + +# 0x0A4: MOVC R01, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A409001" + +# 0x0A5: AND R01, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A5190F1" + +# 0x0A6: CMP R01, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A60F0A1" + +# 0x0A7: JLT 0x0A9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A7350A9" + +# 0x0A8: ADD R01, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A811071" + +# 0x0A9: ADD R01, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A911301" + +# 0x0AA: MOVC (R01), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AA0B021" + +# 0x0AB: INC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AB11012" + +# 0x0AC: MOVC R01, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AC09001" + +# 0x0AD: SWAP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AD2A001" + +# 0x0AE: AND R01, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AE190F1" + +# 0x0AF: CMP R01, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AF0F0A1" + +# 0x0B0: JLT 0x0B2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B0350B2" + +# 0x0B1: ADD R01, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B111071" + +# 0x0B2: ADD R01, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B211301" + +# 0x0B3: MOVC (R01), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B30B021" + +# 0x0B4: CMP R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B40F030" + +# 0x0B5: JEQ 0x0B9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B5390B9" + +# 0x0B6: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B611010" + +# 0x0B7: INC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B711012" + +# 0x0B8: JMP 0x0A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B8300A4" + +# 0x0B9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B93E000" + +# 0x0BA: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BA3C001" + +# 0x0BB: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BB28061" + +# 0x0BC: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BC19021" + +# 0x0BD: JNZ 0x0BB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BD320BB" + +# 0x0BE: XOUT (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BE24020" + +# 0x0BF: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BF3D001" + +# 0x0C0: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C03E000" + +# 0x0C1: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C13C001" + +# 0x0C2: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C228061" + +# 0x0C3: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C319101" + +# 0x0C4: JNZ 0x0C2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C4320C2" + +# 0x0C5: XIN R00, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C528020" + +# 0x0C6: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C63D001" + +# 0x0C7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C73E000" + +# 0x0C8: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C803002" + +# 0x0C9: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C903030" + +# 0x0CA: CALL 0x114 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CA3B114" + +# 0x0CB: CALL 0x147 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CB3B147" + +# 0x0CC: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CC03002" + +# 0x0CD: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CD03030" + +# 0x0CE: CALL 0x114 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CE3B114" + +# 0x0CF: CALL 0x147 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CF3B147" + +# 0x0D0: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D003002" + +# 0x0D1: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D103020" + +# 0x0D2: CALL 0x114 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D23B114" + +# 0x0D3: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D33B14E" + +# 0x0D4: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D403280" + +# 0x0D5: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D53B0E5" + +# 0x0D6: MOV R00, 0x0C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D6030C0" + +# 0x0D7: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D73B0E5" + +# 0x0D8: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D803060" + +# 0x0D9: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D93B0E5" + +# 0x0DA: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DA03010" + +# 0x0DB: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DB3B0E5" + +# 0x0DC: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DC3E000" + +# 0x0DD: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DD3C000" + +# 0x0DE: CALL 0x108 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DE3B108" + +# 0x0DF: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DF19800" + +# 0x0E0: JZ 0x0E3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E0310E3" + +# 0x0E1: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E13B165" + +# 0x0E2: JMP 0x0DE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E2300DE" + +# 0x0E3: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E33D000" + +# 0x0E4: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E43E000" + +# 0x0E5: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E53C002" + +# 0x0E6: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E603002" + +# 0x0E7: CALL 0x101 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E73B101" + +# 0x0E8: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E83D002" + +# 0x0E9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E93E000" + +# 0x0EA: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EA3C000" + +# 0x0EB: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EB04010" + +# 0x0EC: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EC11011" + +# 0x0ED: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0ED0F000" + +# 0x0EE: JZ 0x0F1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EE310F1" + +# 0x0EF: CALL 0x0FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EF3B0FC" + +# 0x0F0: JMP 0x0EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F0300EB" + +# 0x0F1: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F13D000" + +# 0x0F2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F23E000" + +# 0x0F3: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F33C000" + +# 0x0F4: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F409010" + +# 0x0F5: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F511011" + +# 0x0F6: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F60F000" + +# 0x0F7: JZ 0x0FA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F7310FA" + +# 0x0F8: CALL 0x0FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F83B0FC" + +# 0x0F9: JMP 0x0F4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F9300F4" + +# 0x0FA: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FA3D000" + +# 0x0FB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FB3E000" + +# 0x0FC: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FC3C002" + +# 0x0FD: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FD03402" + +# 0x0FE: CALL 0x101 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FE3B101" + +# 0x0FF: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FF3D002" + +# 0x100: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1003E000" + +# 0x101: CALL 0x0DD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1013B0DD" + +# 0x102: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1023C000" + +# 0x103: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1032A000" + +# 0x104: CALL 0x114 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1043B114" + +# 0x105: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1053D000" + +# 0x106: CALL 0x114 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1063B114" + +# 0x107: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1073E000" + +# 0x108: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1083C002" + +# 0x109: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10903002" + +# 0x10A: CALL 0x10D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10A3B10D" + +# 0x10B: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10B3D002" + +# 0x10C: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10C3E000" + +# 0x10D: CALL 0x127 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10D3B127" + +# 0x10E: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10E2A000" + +# 0x10F: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10F3C000" + +# 0x110: CALL 0x127 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1103B127" + +# 0x111: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1113D002" + +# 0x112: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1121A020" + +# 0x113: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1133E000" + +# 0x114: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1143C001" + +# 0x115: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "115190F0" + +# 0x116: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11602001" + +# 0x117: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1171A021" + +# 0x118: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11824031" + +# 0x119: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1193B165" + +# 0x11A: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11A02001" + +# 0x11B: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11B1A021" + +# 0x11C: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11C1B801" + +# 0x11D: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11D24031" + +# 0x11E: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11E3B165" + +# 0x11F: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11F02001" + +# 0x120: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1201A021" + +# 0x121: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12124031" + +# 0x122: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1223B165" + +# 0x123: OR R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1231B201" + +# 0x124: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12424031" + +# 0x125: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1253D001" + +# 0x126: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1263E000" + +# 0x127: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1273C001" + +# 0x128: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12803201" + +# 0x129: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1291A021" + +# 0x12A: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12A24031" + +# 0x12B: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12B3B165" + +# 0x12C: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12C03201" + +# 0x12D: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12D1A021" + +# 0x12E: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12E1B801" + +# 0x12F: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12F24031" + +# 0x130: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1303B165" + +# 0x131: XIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13128030" + +# 0x132: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "132190F0" + +# 0x133: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13303201" + +# 0x134: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1341A021" + +# 0x135: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13524031" + +# 0x136: CALL 0x165 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1363B165" + +# 0x137: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1373D001" + +# 0x138: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1383E000" + +# 0x139: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1393C00F" + +# 0x13A: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13A030AF" + +# 0x13B: CALL 0x140 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13B3B140" + +# 0x13C: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13C1501F" + +# 0x13D: JNZ 0x13B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13D3213B" + +# 0x13E: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13E3D00F" + +# 0x13F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13F3E000" + +# 0x140: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1403C00F" + +# 0x141: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "141030AF" + +# 0x142: CALL 0x147 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1423B147" + +# 0x143: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1431501F" + +# 0x144: JNZ 0x142 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14432142" + +# 0x145: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1453D00F" + +# 0x146: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1463E000" + +# 0x147: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1473C00F" + +# 0x148: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "148030AF" + +# 0x149: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1493B14E" + +# 0x14A: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14A1501F" + +# 0x14B: JNZ 0x149 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14B32149" + +# 0x14C: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14C3D00F" + +# 0x14D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14D3E000" + +# 0x14E: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14E3C00F" + +# 0x14F: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14F030AF" + +# 0x150: CALL 0x155 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1503B155" + +# 0x151: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1511501F" + +# 0x152: JNZ 0x150 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15232150" + +# 0x153: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1533D00F" + +# 0x154: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1543E000" + +# 0x155: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1553C00F" + +# 0x156: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "156030AF" + +# 0x157: CALL 0x15C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1573B15C" + +# 0x158: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1581501F" + +# 0x159: JNZ 0x157 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15932157" + +# 0x15A: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15A3D00F" + +# 0x15B: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15B3E000" + +# 0x15C: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15C3C00F" + +# 0x15D: MOV R15, 0x63 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15D0363F" + +# 0x15E: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15E00000" + +# 0x15F: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15F00000" + +# 0x160: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16000000" + +# 0x161: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1611501F" + +# 0x162: JNZ 0x15E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1623215E" + +# 0x163: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1633D00F" + +# 0x164: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1643E000" + +# 0x165: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1653C00F" + +# 0x166: MOV R15, 0x09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1660309F" + +# 0x167: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16700000" + +# 0x168: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16800000" + +# 0x169: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16900000" + +# 0x16A: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16A1501F" + +# 0x16B: JNZ 0x167 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16B32167" + +# 0x16C: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16C3D00F" + +# 0x16D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16D3E000" + +# 0x16E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16E00000" + +# 0x16F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16F00000" + +# 0x170: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17000000" + +# 0x171: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17100000" + +# 0x172: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17200000" + +# 0x173: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17300000" + +# 0x174: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17400000" + +# 0x175: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17500000" + +# 0x176: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17600000" + +# 0x177: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17700000" + +# 0x178: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17800000" + +# 0x179: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17900000" + +# 0x17A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17A00000" + +# 0x17B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17B00000" + +# 0x17C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17C00000" + +# 0x17D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17D00000" + +# 0x17E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17E00000" + +# 0x17F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17F00000" + +# 0x180: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18000000" + +# 0x181: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18100000" + +# 0x182: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18200000" + +# 0x183: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18300000" + +# 0x184: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18400000" + +# 0x185: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18500000" + +# 0x186: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18600000" + +# 0x187: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18700000" + +# 0x188: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18800000" + +# 0x189: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18900000" + +# 0x18A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18A00000" + +# 0x18B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18B00000" + +# 0x18C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18C00000" + +# 0x18D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18D00000" + +# 0x18E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18E00000" + +# 0x18F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18F00000" + +# 0x190: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19000000" + +# 0x191: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19100000" + +# 0x192: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19200000" + +# 0x193: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19300000" + +# 0x194: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19400000" + +# 0x195: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19500000" + +# 0x196: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19600000" + +# 0x197: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19700000" + +# 0x198: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19800000" + +# 0x199: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19900000" + +# 0x19A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19A00000" + +# 0x19B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19B00000" + +# 0x19C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19C00000" + +# 0x19D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19D00000" + +# 0x19E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19E00000" + +# 0x19F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19F00000" + +# 0x1A0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A000000" + +# 0x1A1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A100000" + +# 0x1A2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A200000" + +# 0x1A3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A300000" + +# 0x1A4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A400000" + +# 0x1A5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A500000" + +# 0x1A6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A600000" + +# 0x1A7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A700000" + +# 0x1A8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A800000" + +# 0x1A9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A900000" + +# 0x1AA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AA00000" + +# 0x1AB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AB00000" + +# 0x1AC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AC00000" + +# 0x1AD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AD00000" + +# 0x1AE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AE00000" + +# 0x1AF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AF00000" + +# 0x1B0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B000000" + +# 0x1B1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B100000" + +# 0x1B2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B200000" + +# 0x1B3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B300000" + +# 0x1B4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B400000" + +# 0x1B5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B500000" + +# 0x1B6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B600000" + +# 0x1B7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B700000" + +# 0x1B8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B800000" + +# 0x1B9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B900000" + +# 0x1BA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BA00000" + +# 0x1BB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BB00000" + +# 0x1BC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BC00000" + +# 0x1BD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BD00000" + +# 0x1BE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BE00000" + +# 0x1BF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BF00000" + +# 0x1C0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C000000" + +# 0x1C1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C100000" + +# 0x1C2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C200000" + +# 0x1C3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C300000" + +# 0x1C4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C400000" + +# 0x1C5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C500000" + +# 0x1C6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C600000" + +# 0x1C7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C700000" + +# 0x1C8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C800000" + +# 0x1C9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C900000" + +# 0x1CA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CA00000" + +# 0x1CB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CB00000" + +# 0x1CC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CC00000" + +# 0x1CD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CD00000" + +# 0x1CE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CE00000" + +# 0x1CF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CF00000" + +# 0x1D0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D000000" + +# 0x1D1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D100000" + +# 0x1D2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D200000" + +# 0x1D3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D300000" + +# 0x1D4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D400000" + +# 0x1D5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D500000" + +# 0x1D6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D600000" + +# 0x1D7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D700000" + +# 0x1D8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D800000" + +# 0x1D9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D900000" + +# 0x1DA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DA00000" + +# 0x1DB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DB00000" + +# 0x1DC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DC00000" + +# 0x1DD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DD00000" + +# 0x1DE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DE00000" + +# 0x1DF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DF00000" + +# 0x1E0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E000000" + +# 0x1E1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E100000" + +# 0x1E2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E200000" + +# 0x1E3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E300000" + +# 0x1E4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E400000" + +# 0x1E5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E500000" + +# 0x1E6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E600000" + +# 0x1E7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E700000" + +# 0x1E8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E800000" + +# 0x1E9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E900000" + +# 0x1EA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EA00000" + +# 0x1EB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EB00000" + +# 0x1EC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EC00000" + +# 0x1ED: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1ED00000" + +# 0x1EE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EE00000" + +# 0x1EF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EF00000" + +# 0x1F0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F000000" + +# 0x1F1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F100000" + +# 0x1F2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F200000" + +# 0x1F3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F300000" + +# 0x1F4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F400000" + +# 0x1F5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F500000" + +# 0x1F6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F600000" + +# 0x1F7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F700000" + +# 0x1F8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F800000" + +# 0x1F9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F900000" + +# 0x1FA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FA00000" + +# 0x1FB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FB00000" + +# 0x1FC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FC00000" + +# 0x1FD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FD00000" + +# 0x1FE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FE00000" + +# 0x1FF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FF00000" + +# 0x200: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20000000" + +# 0x201: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20100000" + +# 0x202: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20200000" + +# 0x203: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20300000" + +# 0x204: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20400000" + +# 0x205: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20500000" + +# 0x206: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20600000" + +# 0x207: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20700000" + +# 0x208: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20800000" + +# 0x209: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20900000" + +# 0x20A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20A00000" + +# 0x20B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20B00000" + +# 0x20C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20C00000" + +# 0x20D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20D00000" + +# 0x20E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20E00000" + +# 0x20F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20F00000" + +# 0x210: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21000000" + +# 0x211: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21100000" + +# 0x212: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21200000" + +# 0x213: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21300000" + +# 0x214: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21400000" + +# 0x215: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21500000" + +# 0x216: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21600000" + +# 0x217: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21700000" + +# 0x218: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21800000" + +# 0x219: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21900000" + +# 0x21A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21A00000" + +# 0x21B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21B00000" + +# 0x21C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21C00000" + +# 0x21D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21D00000" + +# 0x21E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21E00000" + +# 0x21F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21F00000" + +# 0x220: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22000000" + +# 0x221: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22100000" + +# 0x222: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22200000" + +# 0x223: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22300000" + +# 0x224: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22400000" + +# 0x225: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22500000" + +# 0x226: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22600000" + +# 0x227: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22700000" + +# 0x228: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22800000" + +# 0x229: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22900000" + +# 0x22A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22A00000" + +# 0x22B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22B00000" + +# 0x22C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22C00000" + +# 0x22D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22D00000" + +# 0x22E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22E00000" + +# 0x22F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22F00000" + +# 0x230: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23000000" + +# 0x231: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23100000" + +# 0x232: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23200000" + +# 0x233: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23300000" + +# 0x234: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23400000" + +# 0x235: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23500000" + +# 0x236: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23600000" + +# 0x237: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23700000" + +# 0x238: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23800000" + +# 0x239: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23900000" + +# 0x23A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23A00000" + +# 0x23B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23B00000" + +# 0x23C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23C00000" + +# 0x23D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23D00000" + +# 0x23E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23E00000" + +# 0x23F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23F00000" + +# 0x240: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24000000" + +# 0x241: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24100000" + +# 0x242: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24200000" + +# 0x243: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24300000" + +# 0x244: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24400000" + +# 0x245: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24500000" + +# 0x246: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24600000" + +# 0x247: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24700000" + +# 0x248: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24800000" + +# 0x249: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24900000" + +# 0x24A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24A00000" + +# 0x24B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24B00000" + +# 0x24C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24C00000" + +# 0x24D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24D00000" + +# 0x24E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24E00000" + +# 0x24F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24F00000" + +# 0x250: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25000000" + +# 0x251: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25100000" + +# 0x252: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25200000" + +# 0x253: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25300000" + +# 0x254: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25400000" + +# 0x255: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25500000" + +# 0x256: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25600000" + +# 0x257: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25700000" + +# 0x258: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25800000" + +# 0x259: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25900000" + +# 0x25A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25A00000" + +# 0x25B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25B00000" + +# 0x25C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25C00000" + +# 0x25D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25D00000" + +# 0x25E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25E00000" + +# 0x25F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25F00000" + +# 0x260: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26000000" + +# 0x261: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26100000" + +# 0x262: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26200000" + +# 0x263: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26300000" + +# 0x264: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26400000" + +# 0x265: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26500000" + +# 0x266: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26600000" + +# 0x267: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26700000" + +# 0x268: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26800000" + +# 0x269: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26900000" + +# 0x26A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26A00000" + +# 0x26B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26B00000" + +# 0x26C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26C00000" + +# 0x26D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26D00000" + +# 0x26E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26E00000" + +# 0x26F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26F00000" + +# 0x270: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27000000" + +# 0x271: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27100000" + +# 0x272: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27200000" + +# 0x273: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27300000" + +# 0x274: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27400000" + +# 0x275: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27500000" + +# 0x276: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27600000" + +# 0x277: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27700000" + +# 0x278: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27800000" + +# 0x279: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27900000" + +# 0x27A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27A00000" + +# 0x27B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27B00000" + +# 0x27C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27C00000" + +# 0x27D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27D00000" + +# 0x27E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27E00000" + +# 0x27F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27F00000" + +# 0x280: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28000000" + +# 0x281: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28100000" + +# 0x282: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28200000" + +# 0x283: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28300000" + +# 0x284: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28400000" + +# 0x285: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28500000" + +# 0x286: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28600000" + +# 0x287: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28700000" + +# 0x288: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28800000" + +# 0x289: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28900000" + +# 0x28A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28A00000" + +# 0x28B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28B00000" + +# 0x28C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28C00000" + +# 0x28D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28D00000" + +# 0x28E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28E00000" + +# 0x28F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28F00000" + +# 0x290: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29000000" + +# 0x291: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29100000" + +# 0x292: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29200000" + +# 0x293: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29300000" + +# 0x294: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29400000" + +# 0x295: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29500000" + +# 0x296: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29600000" + +# 0x297: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29700000" + +# 0x298: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29800000" + +# 0x299: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29900000" + +# 0x29A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29A00000" + +# 0x29B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29B00000" + +# 0x29C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29C00000" + +# 0x29D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29D00000" + +# 0x29E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29E00000" + +# 0x29F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29F00000" + +# 0x2A0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A000000" + +# 0x2A1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A100000" + +# 0x2A2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A200000" + +# 0x2A3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A300000" + +# 0x2A4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A400000" + +# 0x2A5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A500000" + +# 0x2A6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A600000" + +# 0x2A7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A700000" + +# 0x2A8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A800000" + +# 0x2A9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A900000" + +# 0x2AA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AA00000" + +# 0x2AB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AB00000" + +# 0x2AC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AC00000" + +# 0x2AD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AD00000" + +# 0x2AE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AE00000" + +# 0x2AF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AF00000" + +# 0x2B0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B000000" + +# 0x2B1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B100000" + +# 0x2B2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B200000" + +# 0x2B3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B300000" + +# 0x2B4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B400000" + +# 0x2B5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B500000" + +# 0x2B6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B600000" + +# 0x2B7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B700000" + +# 0x2B8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B800000" + +# 0x2B9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B900000" + +# 0x2BA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BA00000" + +# 0x2BB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BB00000" + +# 0x2BC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BC00000" + +# 0x2BD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BD00000" + +# 0x2BE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BE00000" + +# 0x2BF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BF00000" + +# 0x2C0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C000000" + +# 0x2C1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C100000" + +# 0x2C2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C200000" + +# 0x2C3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C300000" + +# 0x2C4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C400000" + +# 0x2C5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C500000" + +# 0x2C6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C600000" + +# 0x2C7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C700000" + +# 0x2C8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C800000" + +# 0x2C9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C900000" + +# 0x2CA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CA00000" + +# 0x2CB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CB00000" + +# 0x2CC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CC00000" + +# 0x2CD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CD00000" + +# 0x2CE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CE00000" + +# 0x2CF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CF00000" + +# 0x2D0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D000000" + +# 0x2D1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D100000" + +# 0x2D2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D200000" + +# 0x2D3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D300000" + +# 0x2D4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D400000" + +# 0x2D5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D500000" + +# 0x2D6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D600000" + +# 0x2D7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D700000" + +# 0x2D8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D800000" + +# 0x2D9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D900000" + +# 0x2DA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DA00000" + +# 0x2DB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DB00000" + +# 0x2DC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DC00000" + +# 0x2DD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DD00000" + +# 0x2DE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DE00000" + +# 0x2DF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DF00000" + +# 0x2E0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E000000" + +# 0x2E1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E100000" + +# 0x2E2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E200000" + +# 0x2E3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E300000" + +# 0x2E4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E400000" + +# 0x2E5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E500000" + +# 0x2E6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E600000" + +# 0x2E7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E700000" + +# 0x2E8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E800000" + +# 0x2E9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E900000" + +# 0x2EA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EA00000" + +# 0x2EB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EB00000" + +# 0x2EC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EC00000" + +# 0x2ED: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2ED00000" + +# 0x2EE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EE00000" + +# 0x2EF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EF00000" + +# 0x2F0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F000000" + +# 0x2F1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F100000" + +# 0x2F2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F200000" + +# 0x2F3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F300000" + +# 0x2F4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F400000" + +# 0x2F5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F500000" + +# 0x2F6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F600000" + +# 0x2F7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F700000" + +# 0x2F8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F800000" + +# 0x2F9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F900000" + +# 0x2FA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FA00000" + +# 0x2FB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FB00000" + +# 0x2FC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FC00000" + +# 0x2FD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FD00000" + +# 0x2FE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FE00000" + +# 0x2FF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2FF00000" + +# 0x300: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30000000" + +# 0x301: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30100000" + +# 0x302: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30200000" + +# 0x303: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30300000" + +# 0x304: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30400000" + +# 0x305: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30500000" + +# 0x306: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30600000" + +# 0x307: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30700000" + +# 0x308: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30800000" + +# 0x309: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30900000" + +# 0x30A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30A00000" + +# 0x30B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30B00000" + +# 0x30C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30C00000" + +# 0x30D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30D00000" + +# 0x30E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30E00000" + +# 0x30F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "30F00000" + +# 0x310: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31000000" + +# 0x311: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31100000" + +# 0x312: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31200000" + +# 0x313: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31300000" + +# 0x314: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31400000" + +# 0x315: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31500000" + +# 0x316: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31600000" + +# 0x317: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31700000" + +# 0x318: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31800000" + +# 0x319: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31900000" + +# 0x31A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31A00000" + +# 0x31B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31B00000" + +# 0x31C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31C00000" + +# 0x31D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31D00000" + +# 0x31E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31E00000" + +# 0x31F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "31F00000" + +# 0x320: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32000000" + +# 0x321: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32100000" + +# 0x322: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32200000" + +# 0x323: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32300000" + +# 0x324: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32400000" + +# 0x325: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32500000" + +# 0x326: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32600000" + +# 0x327: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32700000" + +# 0x328: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32800000" + +# 0x329: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32900000" + +# 0x32A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32A00000" + +# 0x32B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32B00000" + +# 0x32C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32C00000" + +# 0x32D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32D00000" + +# 0x32E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32E00000" + +# 0x32F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "32F00000" + +# 0x330: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33000000" + +# 0x331: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33100000" + +# 0x332: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33200000" + +# 0x333: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33300000" + +# 0x334: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33400000" + +# 0x335: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33500000" + +# 0x336: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33600000" + +# 0x337: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33700000" + +# 0x338: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33800000" + +# 0x339: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33900000" + +# 0x33A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33A00000" + +# 0x33B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33B00000" + +# 0x33C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33C00000" + +# 0x33D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33D00000" + +# 0x33E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33E00000" + +# 0x33F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "33F00000" + +# 0x340: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34000000" + +# 0x341: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34100000" + +# 0x342: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34200000" + +# 0x343: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34300000" + +# 0x344: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34400000" + +# 0x345: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34500000" + +# 0x346: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34600000" + +# 0x347: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34700000" + +# 0x348: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34800000" + +# 0x349: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34900000" + +# 0x34A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34A00000" + +# 0x34B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34B00000" + +# 0x34C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34C00000" + +# 0x34D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34D00000" + +# 0x34E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34E00000" + +# 0x34F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "34F00000" + +# 0x350: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35000000" + +# 0x351: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35100000" + +# 0x352: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35200000" + +# 0x353: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35300000" + +# 0x354: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35400000" + +# 0x355: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35500000" + +# 0x356: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35600000" + +# 0x357: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35700000" + +# 0x358: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35800000" + +# 0x359: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35900000" + +# 0x35A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35A00000" + +# 0x35B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35B00000" + +# 0x35C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35C00000" + +# 0x35D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35D00000" + +# 0x35E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35E00000" + +# 0x35F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "35F00000" + +# 0x360: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36000000" + +# 0x361: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36100000" + +# 0x362: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36200000" + +# 0x363: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36300000" + +# 0x364: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36400000" + +# 0x365: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36500000" + +# 0x366: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36600000" + +# 0x367: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36700000" + +# 0x368: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36800000" + +# 0x369: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36900000" + +# 0x36A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36A00000" + +# 0x36B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36B00000" + +# 0x36C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36C00000" + +# 0x36D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36D00000" + +# 0x36E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36E00000" + +# 0x36F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "36F00000" + +# 0x370: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37000000" + +# 0x371: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37100000" + +# 0x372: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37200000" + +# 0x373: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37300000" + +# 0x374: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37400000" + +# 0x375: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37500000" + +# 0x376: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37600000" + +# 0x377: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37700000" + +# 0x378: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37800000" + +# 0x379: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37900000" + +# 0x37A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37A00000" + +# 0x37B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37B00000" + +# 0x37C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37C00000" + +# 0x37D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37D00000" + +# 0x37E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37E00000" + +# 0x37F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "37F00000" + +# 0x380: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38000000" + +# 0x381: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38100000" + +# 0x382: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38200000" + +# 0x383: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38300000" + +# 0x384: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38400000" + +# 0x385: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38500000" + +# 0x386: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38600000" + +# 0x387: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38700000" + +# 0x388: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38800000" + +# 0x389: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38900000" + +# 0x38A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38A00000" + +# 0x38B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38B00000" + +# 0x38C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38C00000" + +# 0x38D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38D00000" + +# 0x38E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38E00000" + +# 0x38F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "38F00000" + +# 0x390: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39000000" + +# 0x391: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39100000" + +# 0x392: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39200000" + +# 0x393: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39300000" + +# 0x394: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39400000" + +# 0x395: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39500000" + +# 0x396: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39600000" + +# 0x397: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39700000" + +# 0x398: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39800000" + +# 0x399: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39900000" + +# 0x39A: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39A00000" + +# 0x39B: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39B00000" + +# 0x39C: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39C00000" + +# 0x39D: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39D00000" + +# 0x39E: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39E00000" + +# 0x39F: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "39F00000" + +# 0x3A0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A000000" + +# 0x3A1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A100000" + +# 0x3A2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A200000" + +# 0x3A3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A300000" + +# 0x3A4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A400000" + +# 0x3A5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A500000" + +# 0x3A6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A600000" + +# 0x3A7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A700000" + +# 0x3A8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A800000" + +# 0x3A9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3A900000" + +# 0x3AA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AA00000" + +# 0x3AB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AB00000" + +# 0x3AC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AC00000" + +# 0x3AD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AD00000" + +# 0x3AE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AE00000" + +# 0x3AF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3AF00000" + +# 0x3B0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B000000" + +# 0x3B1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B100000" + +# 0x3B2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B200000" + +# 0x3B3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B300000" + +# 0x3B4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B400000" + +# 0x3B5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B500000" + +# 0x3B6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B600000" + +# 0x3B7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B700000" + +# 0x3B8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B800000" + +# 0x3B9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3B900000" + +# 0x3BA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BA00000" + +# 0x3BB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BB00000" + +# 0x3BC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BC00000" + +# 0x3BD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BD00000" + +# 0x3BE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BE00000" + +# 0x3BF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3BF00000" + +# 0x3C0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C000000" + +# 0x3C1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C100000" + +# 0x3C2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C200000" + +# 0x3C3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C300000" + +# 0x3C4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C400000" + +# 0x3C5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C500000" + +# 0x3C6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C600000" + +# 0x3C7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C700000" + +# 0x3C8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C800000" + +# 0x3C9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3C900000" + +# 0x3CA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CA00000" + +# 0x3CB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CB00000" + +# 0x3CC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CC00000" + +# 0x3CD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CD00000" + +# 0x3CE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CE00000" + +# 0x3CF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3CF00000" + +# 0x3D0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D000000" + +# 0x3D1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D100000" + +# 0x3D2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D200000" + +# 0x3D3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D300000" + +# 0x3D4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D400000" + +# 0x3D5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D500000" + +# 0x3D6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D600000" + +# 0x3D7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D700000" + +# 0x3D8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D800000" + +# 0x3D9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3D900000" + +# 0x3DA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DA00000" + +# 0x3DB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DB00000" + +# 0x3DC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DC00000" + +# 0x3DD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DD00000" + +# 0x3DE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DE00000" + +# 0x3DF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3DF00000" + +# 0x3E0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E000000" + +# 0x3E1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E100000" + +# 0x3E2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E200000" + +# 0x3E3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E300000" + +# 0x3E4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E400000" + +# 0x3E5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E500000" + +# 0x3E6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E600000" + +# 0x3E7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E700000" + +# 0x3E8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E800000" + +# 0x3E9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3E900000" + +# 0x3EA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EA00000" + +# 0x3EB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EB00000" + +# 0x3EC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EC00000" + +# 0x3ED: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3ED00000" + +# 0x3EE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EE00000" + +# 0x3EF: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3EF00000" + +# 0x3F0: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F000000" + +# 0x3F1: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F100000" + +# 0x3F2: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F200000" + +# 0x3F3: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F300000" + +# 0x3F4: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F400000" + +# 0x3F5: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F500000" + +# 0x3F6: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F600000" + +# 0x3F7: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F700000" + +# 0x3F8: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F800000" + +# 0x3F9: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3F900000" + +# 0x3FA: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FA00000" + +# 0x3FB: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FB00000" + +# 0x3FC: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FC00000" + +# 0x3FD: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FD00000" + +# 0x3FE: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FE00000" + +# 0x3FF: JMP 0x032 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "3FF30032" + +# Assembled from counter.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "004A" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "012D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0243" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0350" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0455" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0520" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0656" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0731" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "082E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0900" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/cse.tcl b/projects/cpu/asm/cse.tcl new file mode 100644 index 0000000..14e34f6 --- /dev/null +++ b/projects/cpu/asm/cse.tcl @@ -0,0 +1,247 @@ +###################################################################### +# Copyright (c) 2006 Xilinx, Inc. All rights reserved. +# +# XILINX CONFIDENTIAL PROPERTY +# This document contains proprietary information which is +# protected by copyright. All rights are reserved. No part of +# this document may be photocopied, reproduced or translated to +# another program language without prior written consent of +# XILINX Inc., San Jose, CA. 95124 +# +# Xilinx, Inc. +# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A +# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS +# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR +# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION +# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE +# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. +# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO +# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO +# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE +# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY +# AND FITNESS FOR A PARTICULAR PURPOSE. +# +###################################################################### + +# +# For Tcl Manual for builtin commands, see +# http://www.tcl.tk/man/tcl8.3 +# +# +# + +# Example scanning devices and ChipScope cores, in a JTAG Chain, +# using the Cse api. + +# Get the Cse DLL's and globals +cd F:\\Xilinx9\\ChipScope_Pro_9_1i\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Create global variables + +# Parallel IV Cable +set PARALLEL_CABLE_ARGS [list "port=LPT1" \ + "frequency=200000"] + # "frequency=5000000 | 2500000 | 200000" + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \ + "frequency=3000000"] + # frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB +set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS +set debug 0 + +proc main {argc argv} { + global debug + global PLATFORM_USB_CABLE_ARGS + global CSEJTAG_TARGET_PLATFORMUSB + global CABLE_NAME + global CABLE_ARGS + global CSE_MSG_INFO + + if {[expr ($argc > 0) && [string equal "-h" [lindex $argv 0]]]} { + writeMessage 0 $CSE_MSG_INFO "Usage: xtclsh csejtag_examplel1.tcl \[-usb\] \[-d\]\n" + exit + } + + # for CseServer/CseClient use + set serverflag_idx 0 + set serveraddress_idx 0 + + # Checks to see if usb or debug flag is set + for {set i 0} {$i < $argc} {incr i} { + if {[string equal "-usb" [lindex $argv $i]]} { + set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB + set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS + } elseif {[string equal "-d" [lindex $argv $i]]} { + set debug 1 + } elseif {[string equal "-server" [lindex $argv $i]]} { + set serverflag_idx $i + set serveraddress_idx [expr $i + 1] + } + } + + # Create Session. Pass location of idcode.lst to override default. + set handle [csejtag_session create "writeMessage" [lindex $argv $serverflag_idx] [lindex $argv $serveraddress_idx] ] + + # Scan the JTAG chain + scanChain $handle + + csejtag_session destroy $handle +} + +proc scanChain {handle} { + global CABLE_NAME + global CABLE_ARGS + global CSE_MSG_ERROR + global CSE_MSG_INFO + global CSEJTAG_SCAN_DEFAULT + global CSEJTAG_LOCKED_ME + global CSEJTAG_TEST_LOGIC_RESET + global CSEJTAG_SHIFT_READ + global CSEJTAG_RUN_TEST_IDLE + + # Open cable + csejtag_target open $handle \ + $CABLE_NAME \ + 0 \ + [lindex $CABLE_ARGS 0] \ + [lindex $CABLE_ARGS 1] + + # CseJtag_session sendMessage will call the messageRouter + # function specified in csejtag_session create + csejtag_session send_message $handle $CSE_MSG_INFO "Open Cable successfully\n" + + # Need to lock cable before actually accessing JTAG chain + set cablelock [csejtag_target lock $handle 5000] + if {$cablelock != $CSEJTAG_LOCKED_ME} { + csejtag_session send_message $handle $CSE_MSG_ERROR "cse_lock_target failed" + csejtag_target close $handle + return + } + + csejtag_session send_message $handle $CSE_MSG_INFO "Obtained cable lock\n" + + # Scan the JTAG chain, reading idcodes, + # setting IR lengths for known devices in the CseJtag + # data structures. + # CseJtag needs to know in order to do JTAG shifts. + csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT + + # Get number of devices + set deviceCount [csejtag_tap get_device_count $handle] + + set str [format "Found %u devices\n" $deviceCount] + csejtag_session send_message $handle $CSE_MSG_INFO $str + + # Get a byte array of all idcodes by scanning the JTAG chain. + csejtag_tap navigate $handle $CSEJTAG_TEST_LOGIC_RESET 0 0 + + set idcodeBuffer [csejtag_tap shift_chain_dr $handle\ + $CSEJTAG_SHIFT_READ \ + $CSEJTAG_RUN_TEST_IDLE \ + 0 \ + [expr $deviceCount * 32] \ + 0 \ + -hextdimask 0 \ + -hextdomask 0] + + for {set deviceIndex 0} {$deviceIndex < $deviceCount} {incr deviceIndex} { + scanDevice $handle $deviceIndex $deviceCount $idcodeBuffer + } + + csejtag_target unlock $handle + csejtag_target close $handle + csejtag_session send_message $handle $CSE_MSG_INFO "Closed cable successfully\n" +} + +# Note that this function (with the exception of the call to +# scanUserReg() ) does not get any information +# which requires a new scan of the device chain. +# It is just lookup in the 'idcode.lst' file or +# information which CseJtag data structures already has such as: +# deviceCount and device idcodes. +proc scanDevice {handle deviceIndex deviceCount idcodeBuffer} { + global CSE_MSG_INFO + + # position of buffer + set startofidcodeBuf [expr $deviceIndex * 8 ] + set idcodeBuf [string range $idcodeBuffer $startofidcodeBuf [expr $startofidcodeBuf + 7] ] + + # Get idcode without scanning the JTAG chain + set idcodeBuffer2 [csejtag_tap get_device_idcode $handle $deviceIndex] + + # Convert idcodeFromBuffer and idcodeFromBuffer2 to unsigned integers + set idcodeFromBuffer [expr "0x0$idcodeBuf"] + + set idcode [expr [format "%u" [binaryStringToInt $idcodeBuffer2] ] ] + + # Get IR length without scanning JTAG chain + set irLength 0 + set irLength [csejtag_db get_irlength_for_idcode $handle $idcodeBuffer2] + + # NOTE If (irLength == 0) an application program needs to set it, + # ( using function csejtag_tap_set_irlength $handle $deviceIndex $irLength) + # perhaps after asking the user or looking it up someway. + # Without irLength known for all devices in the chain, + # JTAG communication will fail. + + # Get device name + set deviceName [csejtag_db get_device_name_for_idcode $handle $idcodeBuffer2] + + # print out device info + set str [format "\nDEVICE %u, idcode:%x, Scanned idcode:%x, IRLength:%u, %s\n" \ + $deviceIndex $idcode $idcodeFromBuffer $irLength $deviceName] + csejtag_session send_message $handle $CSE_MSG_INFO $str + + # Compares the two methods of obtaining the idcode, + # prints a message if they are different. + + if {$idcode != $idcodeFromBuffer} { + csejtag_session send_message $handle $CSE_MSG_INFO "IDCODES ARE NOT EQUAL!!!\n" + } +} + +proc writeMessage {handle msgFlags msg} { + global debug + global CSE_MSG_ERROR + global CSE_MSG_WARNING + global CSE_MSG_STATUS + global CSE_MSG_INFO + global CSE_MSG_NOISE + global CSE_MSG_DEBUG + if {[expr $debug || ($msgFlags != $CSE_MSG_DEBUG)]} { + if {$msgFlags == $CSE_MSG_ERROR} { + puts -nonewline "Error:" + } elseif {$msgFlags == $CSE_MSG_WARNING} { + puts -nonewline "Warning:" + } elseif {$msgFlags == $CSE_MSG_INFO} { + puts -nonewline "Info:" + } elseif {$msgFlags == $CSE_MSG_STATUS} { + puts -nonewline "Status:" + } elseif {$msgFlags == $CSE_MSG_DEBUG} { + puts -nonewline "Debug:" + } + puts -nonewline $msg + flush stdout + } +} + +proc binaryStringToInt {binarystring} { + set len [string length $binarystring] + set retval 0 + for {set i 0} {$i < $len} {incr i} { + set retval [expr $retval << 1] + if {[string index $binarystring $i] == "1"} { + set retval [expr $retval | 1] + } + } + return $retval +} + +# Start the program +main $argc $argv diff --git a/projects/cpu/asm/greet.jsm b/projects/cpu/asm/greet.jsm new file mode 100644 index 0000000..f24a5db --- /dev/null +++ b/projects/cpu/asm/greet.jsm @@ -0,0 +1,379 @@ +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +lcd_read: equ 0x20 +lcd_data: equ 0x40 +lcd_enable: equ 0x80 + +DIV10: equ 0x0A + +CR: equ 0x0D +LF: equ 0x0A + +LCD_CMD_Z1: equ 0x80 +LCD_CMD_Z2: equ 0xC0 + +; I/O +btn_port: equ 0xC0 ; RO +led_port: equ 0xC1 ; Write +uart_data: equ 0xC2 ; Write +lcd_port: equ 0xC3 ; R/W +ctrl_reg: equ 0xC4 ; R/W +dip_port: equ 0xC5 ; RO +uart_status: equ 0xC6 ; Read + +; ------------------------------------------------- +; Program +; ------------------------------------------------- +reset: jmp init + + org 0x001 + reti + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +init: call LCD_init + + ; Print Hello world + call LCD_clear + ; J + mov R0, 0x4A + call LCD_writechar + call sout + ; - + mov R0, 0x2D + call LCD_writechar + call sout + ; C + mov R0, 0x43 + call LCD_writechar + call sout + ; P + mov R0, 0x50 + call LCD_writechar + call sout + ; U + mov R0, 0x55 + call LCD_writechar + call sout + ; + mov R0, 0x20 + call LCD_writechar + call sout + ; V + mov R0, 0x56 + call LCD_writechar + call sout + ; 1 + mov R0, 0x31 + call LCD_writechar + call sout + ; . + mov R0, 0x2E + call LCD_writechar + call sout + ; 0 + mov R0, 0x30 + call LCD_writechar + call sout + + ; CRLF + mov R0, LCD_CMD_Z2 + call LCD_writecmd + mov R0, CR + call sout + mov R0, LF + call sout + + ; R + mov R0, 0x52 + call LCD_writechar + call sout + ; E + mov R0, 0x65 + call LCD_writechar + call sout + ; A + mov R0, 0x61 + call LCD_writechar + call sout + ; D + mov R0, 0x64 + call LCD_writechar + call sout + ; Y + mov R0, 0x79 + call LCD_writechar + call sout + + ; CRLF + mov R0, CR + call sout + mov R0, LF + call sout + +jjj: jmp jjj + +; ------------------------------------------------- +; sout +; ------------------------------------------------- +; R0 = input +sout: push R1 +sout1: movx R1, (uart_status) + and R1, 0x02 + jnz sout1 + movx (uart_data), R0 + pop R1 + ret + +; ------------------------------------------------- +; sin +; ------------------------------------------------- +; R0 = output +sin: push R1 +sin1: movx R1, (uart_status) + and R1, 0x10 + jnz sin1 + movx R0, (uart_data) + pop R1 + ret + +; ------------------------------------------------- +; Init LCD +; ------------------------------------------------- +LCD_init: mov R1, lcd_port + movx (R1), lcd_read + + call delay10ms + + ; 0. + mov R2, 0x00 + mov R0, 0x03 + call LCD_write_ + call delay10ms + mov R2, 0x00 + mov R0, 0x03 + call LCD_write_ + call delay10ms + + mov R2, 0x00 + mov R0, 0x02 + call LCD_write_ + call delay1ms + + ; 1. + mov R0, 0x28 + call LCD_writecmd + + ; 2. + mov R0, 0x0E + call LCD_writecmd + + ; 3. + mov R0, 0x06 + call LCD_writecmd + + ; 3. + mov R0, 0x01 + call LCD_writecmd + + ret + +; ------------------------------------------------- +; LCD_Clear +; ------------------------------------------------- +LCD_clear: push R0 + mov R0, 0x01 + call LCD_writecmd + pop R0 + ret + +; ------------------------------------------------- +; LCD_writecmd +; ------------------------------------------------- +; R0 = cmd +LCD_writecmd: call LCD_waitbsy + push R2 + push R0 + push R0 + mov R2, 0x00 + shr R0 + shr R0 + shr R0 + shr R0 + call LCD_write_ + pop R0 + and R0, 0x0F + call LCD_write_ + pop R0 + pop R2 + ret + +; ------------------------------------------------- +; LCD_writechar +; ------------------------------------------------- +; R0 = char +LCD_writechar: call LCD_waitbsy + push R2 + push R0 + push R0 + mov R2, lcd_data + shr R0 + shr R0 + shr R0 + shr R0 + call LCD_write_ + pop R0 + and R0, 0x0F + call LCD_write_ + pop R0 + pop R2 + ret + +; ------------------------------------------------- +; LCD_write_ +; ------------------------------------------------- +; R0 = input +LCD_write_: push R1 + + mov R1, R0 + or R1, R2 + movx (lcd_port), R1 + call delay1us + + mov R1, R0 + or R1, R2 + or R1, lcd_enable + movx (lcd_port), R1 + call delay1us + + mov R1, R0 + or R1, R2 + movx (lcd_port), R1 + call delay1us + + pop R1 + ret + +; ------------------------------------------------- +; LCD_read_ +; ------------------------------------------------- +; R0 = output +LCD_read_: push R1 + + mov R1, lcd_read + or R1, R2 + movx (lcd_port), R1 + call delay1us + + mov R1, lcd_read + or R1, R2 + or R1, lcd_enable + movx (lcd_port), R1 + call delay1us + movx R0, (lcd_port) + + mov R1, lcd_read + or R1, R2 + movx (lcd_port), R1 + call delay1us + + pop R1 + ret + +; ------------------------------------------------- +; LCD_readstat +; ------------------------------------------------- +; R0 = status +LCD_readstat: push R2 + mov R2, 0x00 + call LCD_read_ + shl R0 + shl R0 + shl R0 + shl R0 + push R0 + call LCD_read_ + and R0, 0x0F + pop R2 + or R0, R2 + pop R2 + ret + +; ------------------------------------------------- +; LCD_waitbsy +; ------------------------------------------------- +LCD_waitbsy: push R0 +bsy_loop: call LCD_readstat + and R0, 0x80 + jz ex_bsy + call delay1us + jmp bsy_loop +ex_bsy: pop R0 + ret + +; ------------------------------------------------- +; Delays +; ------------------------------------------------- +delay1s: push R15 + mov R15, DIV10 +loop1s: call delay100ms + dec R15 + jnz loop1s + pop R15 + ret + +delay100ms: push R15 + mov R15, DIV10 +loop100ms: call delay10ms + dec R15 + jnz loop100ms + pop R15 + ret + +delay10ms: push R15 + mov R15, DIV10 +loop10ms: call delay1ms + dec R15 + jnz loop10ms + pop R15 + ret + +delay1ms: push R15 + mov R15, DIV10 +loop1ms: call delay100us + dec R15 + jnz loop1ms + pop R15 + ret + +delay100us: push R15 + mov R15, DIV10 +loop100us: call delay10us + dec R15 + jnz loop100us + pop R15 + ret + +delay10us: push R15 + mov R15, DIV10 +loop10us: call delay1us + dec R15 + jnz loop10us + pop R15 + ret + +delay1us: push R15 + mov R15, DIV10 +loop1us: call delay100ns + dec R15 + jnz loop1us + pop R15 + ret + +delay100ns: nop + nop + nop + nop + ret \ No newline at end of file diff --git a/projects/cpu/asm/greet.tcl b/projects/cpu/asm/greet.tcl new file mode 100644 index 0000000..79160c3 --- /dev/null +++ b/projects/cpu/asm/greet.tcl @@ -0,0 +1,797 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \ + "frequency=1500000"] + # frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +# --------------------------------------------------------------- +# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 $irlength "3C2"] + +# Write Program +# JASM_ROM_INSERT_HERE +# 0x000: JMP 0x002 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00030002" + +# 0x001: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0007F000" + +# 0x002: CALL 0x04A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "000BB04A" + +# 0x003: CALL 0x062 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "000FB062" + +# 0x004: MOV R00, 0x4A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001034A0" + +# 0x005: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0017B077" + +# 0x006: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001BB03C" + +# 0x007: MOV R00, 0x2D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001C32D0" + +# 0x008: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0023B077" + +# 0x009: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0027B03C" + +# 0x00A: MOV R00, 0x43 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00283430" + +# 0x00B: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "002FB077" + +# 0x00C: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0033B03C" + +# 0x00D: MOV R00, 0x50 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00343500" + +# 0x00E: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "003BB077" + +# 0x00F: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "003FB03C" + +# 0x010: MOV R00, 0x55 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00403550" + +# 0x011: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0047B077" + +# 0x012: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "004BB03C" + +# 0x013: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "004C3200" + +# 0x014: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0053B077" + +# 0x015: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0057B03C" + +# 0x016: MOV R00, 0x56 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00583560" + +# 0x017: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "005FB077" + +# 0x018: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0063B03C" + +# 0x019: MOV R00, 0x31 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00643310" + +# 0x01A: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "006BB077" + +# 0x01B: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "006FB03C" + +# 0x01C: MOV R00, 0x2E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007032E0" + +# 0x01D: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0077B077" + +# 0x01E: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007BB03C" + +# 0x01F: MOV R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007C3300" + +# 0x020: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0083B077" + +# 0x021: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0087B03C" + +# 0x022: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00883C00" + +# 0x023: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "008FB067" + +# 0x024: MOV R00, 0x0D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009030D0" + +# 0x025: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0097B03C" + +# 0x026: MOV R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009830A0" + +# 0x027: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009FB03C" + +# 0x028: MOV R00, 0x52 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A03520" + +# 0x029: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A7B077" + +# 0x02A: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00ABB03C" + +# 0x02B: MOV R00, 0x65 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00AC3650" + +# 0x02C: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B3B077" + +# 0x02D: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B7B03C" + +# 0x02E: MOV R00, 0x61 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B83610" + +# 0x02F: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00BFB077" + +# 0x030: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C3B03C" + +# 0x031: MOV R00, 0x64 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C43640" + +# 0x032: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00CBB077" + +# 0x033: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00CFB03C" + +# 0x034: MOV R00, 0x79 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D03790" + +# 0x035: CALL 0x077 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D7B077" + +# 0x036: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00DBB03C" + +# 0x037: MOV R00, 0x0D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00DC30D0" + +# 0x038: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E3B03C" + +# 0x039: MOV R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E430A0" + +# 0x03A: CALL 0x03C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00EBB03C" + +# 0x03B: JMP 0x03B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00EF003B" + +# 0x03C: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F3C001" + +# 0x03D: MOVX R01, (0xC6) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F45C61" + +# 0x03E: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F99021" + +# 0x03F: JNZ 0x03D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00FF203D" + +# 0x040: MOVX (0xC2), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01008C20" + +# 0x041: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0107D001" + +# 0x042: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "010BE000" + +# 0x043: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "010FC001" + +# 0x044: MOVX R01, (0xC6) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01105C61" + +# 0x045: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01159101" + +# 0x046: JNZ 0x044 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "011B2044" + +# 0x047: MOVX R00, (0xC2) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "011C5C20" + +# 0x048: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0123D001" + +# 0x049: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0127E000" + +# 0x04A: MOV R01, 0xC3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01283C31" + +# 0x04B: MOVX (R01), 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "012C7201" + +# 0x04C: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0133B0CC" + +# 0x04D: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01343002" + +# 0x04E: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01383030" + +# 0x04F: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "013FB087" + +# 0x050: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0143B0CC" + +# 0x051: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01443002" + +# 0x052: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01483030" + +# 0x053: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "014FB087" + +# 0x054: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0153B0CC" + +# 0x055: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01543002" + +# 0x056: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01583020" + +# 0x057: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "015FB087" + +# 0x058: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0163B0D3" + +# 0x059: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01643280" + +# 0x05A: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "016BB067" + +# 0x05B: MOV R00, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "016C30E0" + +# 0x05C: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0173B067" + +# 0x05D: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01743060" + +# 0x05E: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "017BB067" + +# 0x05F: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "017C3010" + +# 0x060: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0183B067" + +# 0x061: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0187E000" + +# 0x062: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "018BC000" + +# 0x063: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "018C3010" + +# 0x064: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0193B067" + +# 0x065: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0197D000" + +# 0x066: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "019BE000" + +# 0x067: CALL 0x0B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "019FB0B6" + +# 0x068: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01A3C002" + +# 0x069: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01A7C000" + +# 0x06A: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01ABC000" + +# 0x06B: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01AC3002" + +# 0x06C: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B1F000" + +# 0x06D: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B5F000" + +# 0x06E: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B9F000" + +# 0x06F: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01BDF000" + +# 0x070: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C3B087" + +# 0x071: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C7D000" + +# 0x072: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C990F0" + +# 0x073: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01CFB087" + +# 0x074: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01D3D000" + +# 0x075: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01D7D002" + +# 0x076: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01DBE000" + +# 0x077: CALL 0x0B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01DFB0B6" + +# 0x078: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01E3C002" + +# 0x079: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01E7C000" + +# 0x07A: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01EBC000" + +# 0x07B: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01EC3402" + +# 0x07C: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F1F000" + +# 0x07D: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F5F000" + +# 0x07E: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F9F000" + +# 0x07F: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01FDF000" + +# 0x080: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0203B087" + +# 0x081: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0207D000" + +# 0x082: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "020990F0" + +# 0x083: CALL 0x087 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "020FB087" + +# 0x084: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0213D000" + +# 0x085: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0217D002" + +# 0x086: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "021BE000" + +# 0x087: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "021FC001" + +# 0x088: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02202001" + +# 0x089: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0225A021" + +# 0x08A: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02288C31" + +# 0x08B: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "022FB0E8" + +# 0x08C: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02302001" + +# 0x08D: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0235A021" + +# 0x08E: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0239B801" + +# 0x08F: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "023C8C31" + +# 0x090: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0243B0E8" + +# 0x091: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02442001" + +# 0x092: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0249A021" + +# 0x093: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "024C8C31" + +# 0x094: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0253B0E8" + +# 0x095: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0257D001" + +# 0x096: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "025BE000" + +# 0x097: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "025FC001" + +# 0x098: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02603201" + +# 0x099: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0265A021" + +# 0x09A: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02688C31" + +# 0x09B: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "026FB0E8" + +# 0x09C: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02703201" + +# 0x09D: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0275A021" + +# 0x09E: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0279B801" + +# 0x09F: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "027C8C31" + +# 0x0A0: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0283B0E8" + +# 0x0A1: MOVX R00, (0xC3) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02845C30" + +# 0x0A2: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02883201" + +# 0x0A3: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "028DA021" + +# 0x0A4: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02908C31" + +# 0x0A5: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0297B0E8" + +# 0x0A6: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "029BD001" + +# 0x0A7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "029FE000" + +# 0x0A8: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02A3C002" + +# 0x0A9: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02A43002" + +# 0x0AA: CALL 0x097 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02ABB097" + +# 0x0AB: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02ADE000" + +# 0x0AC: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B1E000" + +# 0x0AD: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B5E000" + +# 0x0AE: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B9E000" + +# 0x0AF: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02BFC000" + +# 0x0B0: CALL 0x097 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C3B097" + +# 0x0B1: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C590F0" + +# 0x0B2: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02CBD002" + +# 0x0B3: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02CDA020" + +# 0x0B4: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02D3D002" + +# 0x0B5: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02D7E000" + +# 0x0B6: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02DBC000" + +# 0x0B7: CALL 0x0A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02DFB0A8" + +# 0x0B8: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02E19800" + +# 0x0B9: JZ 0x0BC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02E710BC" + +# 0x0BA: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02EBB0E8" + +# 0x0BB: JMP 0x0B7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02EF00B7" + +# 0x0BC: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02F3D000" + +# 0x0BD: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02F7E000" + +# 0x0BE: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02FBC00F" + +# 0x0BF: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02FC30AF" + +# 0x0C0: CALL 0x0C5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0303B0C5" + +# 0x0C1: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0305501F" + +# 0x0C2: JNZ 0x0C0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "030B20C0" + +# 0x0C3: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "030FD00F" + +# 0x0C4: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0313E000" + +# 0x0C5: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0317C00F" + +# 0x0C6: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "031830AF" + +# 0x0C7: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "031FB0CC" + +# 0x0C8: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0321501F" + +# 0x0C9: JNZ 0x0C7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032720C7" + +# 0x0CA: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032BD00F" + +# 0x0CB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032FE000" + +# 0x0CC: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0333C00F" + +# 0x0CD: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033430AF" + +# 0x0CE: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033BB0D3" + +# 0x0CF: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033D501F" + +# 0x0D0: JNZ 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034320CE" + +# 0x0D1: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0347D00F" + +# 0x0D2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034BE000" + +# 0x0D3: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034FC00F" + +# 0x0D4: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "035030AF" + +# 0x0D5: CALL 0x0DA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0357B0DA" + +# 0x0D6: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0359501F" + +# 0x0D7: JNZ 0x0D5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "035F20D5" + +# 0x0D8: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0363D00F" + +# 0x0D9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0367E000" + +# 0x0DA: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "036BC00F" + +# 0x0DB: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "036C30AF" + +# 0x0DC: CALL 0x0E1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0373B0E1" + +# 0x0DD: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0375501F" + +# 0x0DE: JNZ 0x0DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "037B20DC" + +# 0x0DF: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "037FD00F" + +# 0x0E0: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0383E000" + +# 0x0E1: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0387C00F" + +# 0x0E2: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "038830AF" + +# 0x0E3: CALL 0x0E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "038FB0E8" + +# 0x0E4: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0391501F" + +# 0x0E5: JNZ 0x0E3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039720E3" + +# 0x0E6: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039BD00F" + +# 0x0E7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039FE000" + +# 0x0E8: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03A3C00F" + +# 0x0E9: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03A430AF" + +# 0x0EA: CALL 0x0EF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03ABB0EF" + +# 0x0EB: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03AD501F" + +# 0x0EC: JNZ 0x0EA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B320EA" + +# 0x0ED: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B7D00F" + +# 0x0EE: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03BBE000" + +# 0x0EF: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03BC0000" + +# 0x0F0: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C00000" + +# 0x0F1: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C40000" + +# 0x0F2: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C80000" + +# 0x0F3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03CFE000" + + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/make b/projects/cpu/asm/make new file mode 100644 index 0000000..5e1cebc --- /dev/null +++ b/projects/cpu/asm/make @@ -0,0 +1,51 @@ +#!/bin/sh + +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: rom-file generation for cpu_core + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +TARGET=$2 +DSTDIR=$1 + +JASM_HOME=/cygdrive/w/vhdl/lib/CPUs/JCpu/tools + +$JASM_HOME/jasm.rb $TARGET.jsm + +irom_tcl_snippet="$TARGET.irom.tcl.snip" +irom_vhdl_snippet="$TARGET.irom.vhdl.snip" +irom_ld_vhdl_snippet="$TARGET.irom_ld.vhdl.snip" +xrom_tcl_snippet="$TARGET.xrom.tcl.snip" +xrom_vhdl_snippet="$TARGET.xrom.vhdl.snip" +xrom_ld_vhdl_snippet="$TARGET.xrom_ld.vhdl.snip" + +$JASM_HOME/insrom.rb $irom_vhdl_snippet $JASM_HOME/irom.vhd.tpl >$DSTDIR/$TARGET\_irom.vhdl +$JASM_HOME/insrom.rb $irom_ld_vhdl_snippet $JASM_HOME/irom_ld.vhd.tpl >$DSTDIR/$TARGET\_irom_ld.vhdl + +$JASM_HOME/insrom.rb $xrom_vhdl_snippet $JASM_HOME/xrom.vhd.tpl >$DSTDIR/$TARGET\_xrom.vhdl +$JASM_HOME/insrom.rb $xrom_ld_vhdl_snippet $JASM_HOME/xrom_ld.vhd.tpl >$DSTDIR/$TARGET\_xrom_ld.vhdl + +cat $irom_tcl_snippet > $TARGET.tcl.snip.snip +cat $xrom_tcl_snippet >> $TARGET.tcl.snip.snip +$JASM_HOME/insrom.rb $TARGET.tcl.snip.snip $JASM_HOME/rom.tcl.tpl >$TARGET.tcl + +rm -f *.snip diff --git a/projects/cpu/asm/pen_test.jsm b/projects/cpu/asm/pen_test.jsm new file mode 100644 index 0000000..c907444 --- /dev/null +++ b/projects/cpu/asm/pen_test.jsm @@ -0,0 +1,773 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +BURST_LEN: equ 8 +SD_CMD_WRITE: equ 0x06 +SD_CMD_READ: equ 0x05 +START_ADDR0: equ 0x00 +START_ADDR1: equ 0x00 +START_ADDR2: equ 0x20 +END_ADDR0: equ 0xF8 +END_ADDR1: equ 0xFF +END_ADDR2: equ 0xFF +PEN_TIMEOUT0: equ 0xE8 +PEN_TIMEOUT1: equ 0x03 +PEN_BUFSIZE: equ 64 + +; External RAM/ROM + xmem +crlf: dc 13, 10, 0 +greet_txt: dc "SDRAM Test", 0 +msg_txt0: dc "Clearing SDRAM", 0 +msg_txt1: dc "Writing SDRAM", 0 +msg_txt2: dc "Reading SDRAM", 0 +msg_txt3: dc "Reading Bitmap", 0 +verify_ok: dc "Verify OK", 0 +verify_nok: dc "Failed at ", 0 +dot: dc ".", 0 + + org 0x80 +sdram_data: db 8 ; SDRAM data window at X:0x80 + +; Internal RAM + cmem 0 +block_cnt: db 1 +round_cnt: db 1 +bmp_offset: db 4 +pixel_buf: db 32 + +pen_rx_buf: db 128 +pen_rx_ptr_r: db 1 +pen_rx_ptr_w: db 1 +pen_timeout: db 2 +pen_bit_cnt_w: db 1 +pen_octet_w: db 1 +pen_octet_r: db 1 +pen_last_state: db 1 +pen_enable: db 1 +pen_bit_cnt_r: db 1 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp main + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- + org 0x001 +pen_isr: push R0 + push R1 + push R2 + +u_get_nxt: xin R1, (btn_port) + movc R0, (pen_octet_w) + and R1, 0x20 + shl R1 + shl R1 + shl R1 + rolc R0 + movc (pen_octet_w), R0 + movc R1, (pen_bit_cnt_w) + inc R1 + movc (pen_bit_cnt_w), R1 + cmp R1, 8 + jne ex_uart_isr + mov R1, 0 + movc (pen_bit_cnt_w), R1 + movc R2, (pen_rx_ptr_w) + movc (R2), R0 + inc R2 + cmp R2, pen_rx_buf+128 + jne u_upd_nxt + mov R2, pen_rx_buf +u_upd_nxt: movc (pen_rx_ptr_w), R2 +ex_uart_isr: call Timer_isr + pop R2 + pop R1 + pop R0 + reti + +Timer_isr: xin R0, (btn_port) + and R0, 0x20 + shr R0 + xin R1, (ctrl_reg) + and R1, 0xEF + or R0, R1 + xout (ctrl_reg), R0 + xin R0, (btn_port) + and R0, 0x01 + jz btn_chk2 + mov R0, vga_read_addr + xout (R0), 0x00 + inc R0 + xout (R0), 0x00 + inc R0 + xout (R0), 0x00 + jmp ex_t_isr +btn_chk2: xin R0, (btn_port) + and R0, 0x02 + jz ex_t_isr + mov R0, vga_read_addr + xout (R0), 0x00 + inc R0 + xout (R0), 0x00 + inc R0 + xout (R0), 0x20 +ex_t_isr: ret + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +main: call pen_init + call LCD_init + mov R0, 0x00 + xout (led_port), R0 + + mov R0, CTRL_VGA_ENABLE + xout (ctrl_reg), R0 + + xin R0, (ctrl_reg) + or R0, CTRL_TIMER_ENABLE + xout (ctrl_reg), R0 + + mov R0, 0x03 + cout (cpu_int_ctrl), R0 + + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + mov R0, 0 + mov R1, 0xC0 + xout (reg_color_red), R1 + xout (reg_color_grn), R1 + xout (reg_color_blu), R1 + + call cg_wait_rdy + call cg_clr_screen + + ; Print greeting message + mov R1, greet_txt + call LCD_putsx + + mov R1, greet_txt + call cg_puts + mov R1, crlf + call cg_puts_clr + + xin R0, (ctrl_reg) + and R0, 0xCF + xout (ctrl_reg), R0 + + mov R0, 0 + movc (round_cnt), R0 + + mov R0, 0x0F + xout (timer_reload+0), R0 + mov R0, 0x27 + xout (timer_reload+1), R0 + mov R0, 0x00 + xout (timer_reload+2), R0 + +main_loop: call do_clear + call write_uart_data +ML1: call do_write + call do_read + movc R0, (round_cnt) + inc R0 + movc (round_cnt), R0 + jmp ML1 + +; ---------------------------------------------------------- +; SDRAM clear +; ---------------------------------------------------------- +do_clear: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Clear message + mov R1, msg_txt0 + call LCD_putsx + + mov R1, msg_txt0 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + mov R0, 0 + mov R1, 0 + mov R2, 0 + call AddrCnt_Init + + ; Fill SDR Buffer with zeros + mov R0, sdram_data + mov R15, 8 +buf_clr_loop: movx (R0), 0 + inc R0 + dec R15 + jnz buf_clr_loop + +sdr_clear: mov R2, BURST_LEN + +poll_clear_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_clear_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + sub R2, 2 + jnz poll_clear_full + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + xin R0, (sdram_addr+0) + cmp R0, END_ADDR0 + jne next_addr_c + xin R0, (sdram_addr+1) + cmp R0, END_ADDR1 + jne next_addr_c + xin R0, (sdram_addr+2) + cmp R0, END_ADDR2 + jeq clear_finished + + ; Advance address counter +next_addr_c: mov R0, BURST_LEN + call AddrCnt_Inc + + jmp sdr_clear + +clear_finished: + call AddrCnt_Disp + call delay1s + ret + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +write_uart_data: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Clear message + mov R1, msg_txt3 + call LCD_putsx + + mov R1, msg_txt3 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + + ; Set SDRAM address register to 0 +; mov R0, 0xF8 ; 800x600 +; mov R1, 0x52 ; 800x600 +; mov R2, 0x07 ; 800x600 +pen_restart: mov R0, 0x00 ; 1280x1024 + mov R1, 0x00 ; 1280x1024 + mov R2, 0x00 ; 1280x1024 + call AddrCnt_Init + call pen_init + +chk_pen_off: xin R0, (btn_port) + and R0, 0x20 + jnz chk_pen_off + mov R0, 1 +chk_pen_on: xin R0, (btn_port) + and R0, 0x20 + jz chk_pen_on + movc R0, (pen_rx_ptr_w) + sub R0, 5 + cmp R0, pen_rx_buf+128 + jlt set_rx_ptr + sub R0, 128 +set_rx_ptr: movc (pen_rx_ptr_r), R0 + + + ; Fill SDR Buffer +get_pen: mov R1, pixel_buf +wls0: call pen_getchar + movc (R1), R0 + inc R1 + cmp R1, pixel_buf+8 + jne wls0 + + ; Start SDR write + xin R0, (sdram_addr+0) + push R0 + xin R0, (sdram_addr+1) + push R0 + xin R0, (sdram_addr+2) + push R0 + + mov R15, 64 + +write_sd_block: mov R2, BURST_LEN + mov R1, pixel_buf +copy_sdram: mov R3, sdram_data +copy_pixel: movc R0, (R1) + movx (R3), R0 + inc R3 + movx (R3), R0 + inc R3 + movx (R3), R0 + inc R3 + inc R1 + cmp R3, sdram_data+6 + jne copy_pixel +pwf: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz pwf + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + sub R2, 2 + jnz copy_sdram + + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + +; call AddrCnt_Disp + xin R0, (sdram_addr+1) + add R0, 0x05 + xout (sdram_addr+1), R0 + xin R0, (sdram_addr+2) + addc R0, 0x00 + xout (sdram_addr+2), R0 + + dec R15 + jnz write_sd_block + + ; Advance address counter + pop R0, + xout (sdram_addr+2), R0 + pop R0 + xout (sdram_addr+1), R0 + pop R0 + xout (sdram_addr+0), R0 + + xin R0, (sdram_addr+0) + cmp R0, 0xF8 + jne next_addr + xin R0, (sdram_addr+1) + cmp R0, 0x04 + jne next_addr + xin R0, (sdram_addr+2) + cmp R0, 0x00 + jeq pen_restart + +next_addr: mov R0, BURST_LEN + call AddrCnt_Inc + jmp get_pen +sdw_fin: call delay1s + ret + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +do_write: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Write message + mov R1, msg_txt1 + call LCD_putsx + + mov R1, msg_txt1 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + mov R0, START_ADDR0 + mov R1, START_ADDR1 + mov R2, START_ADDR2 + call AddrCnt_Init + movc R0, (round_cnt) + movc (block_cnt), R0 + +sdr_write: mov R2, BURST_LEN + + ; Fill SDR Buffer +sdr_burst_wr: movc R1, (block_cnt) + mov R0, sdram_data + mov R15, 8 +write_loop: movx (R0), R1 + inc R0 + inc R1 + dec R15 + jnz write_loop + +poll_write_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_write_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + movc R0, (block_cnt) + inc R0 + movc (block_cnt), R0 + + sub R2, 2 + jnz sdr_burst_wr + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + xin R0, (sdram_addr+0) + cmp R0, END_ADDR0 + jne next_addr_w + xin R0, (sdram_addr+1) + cmp R0, END_ADDR1 + jne next_addr_w + xin R0, (sdram_addr+2) + cmp R0, END_ADDR2 + jeq write_finished + + ; Advance address counter +next_addr_w: mov R0, BURST_LEN + call AddrCnt_Inc + + jmp sdr_write + +write_finished: call AddrCnt_Disp + call delay1s + ret + +; ---------------------------------------------------------- +; SDRAM Verify +; ---------------------------------------------------------- +do_read: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Read message + mov R1, msg_txt2 + call LCD_putsx + + mov R1, msg_txt2 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + mov R0, START_ADDR0 + mov R1, START_ADDR1 + mov R2, START_ADDR2 + call AddrCnt_Init + movc R0, (round_cnt) + movc (block_cnt), R0 + + ; flush_data +flush_data: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_READ_DATA_EMPTY + jnz sdr_read + mov R0, FIFO_CTRL_IS_READ + xout (sdram_reg), R0 + jmp flush_data + +sdr_read: ; Start SDR read + call wait_cmd_rdy + mov R0, SD_CMD_READ + xout (sdram_reg), R0 + + mov R3, BURST_LEN + + ; Wait last read +poll_read_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_READ_DATA_EMPTY + jnz poll_read_fin + + ; Verify SDR Buffer + movc R1, (block_cnt) + mov R0, sdram_data + mov R15, 8 +read_loop: movx R2, (R0) + cmp R2, R1 + jne verify_error + inc R0 + inc R1 + dec R15 + jnz read_loop + + ; Advance Read-FIFO + mov R0, FIFO_CTRL_IS_READ + xout (sdram_reg), R0 + + movc R0, (block_cnt) + inc R0 + movc (block_cnt), R0 + + sub R3, 2 + jnz poll_read_fin + + xin R0, (sdram_addr+0) + cmp R0, END_ADDR0 + jne next_addr_r + xin R0, (sdram_addr+1) + cmp R0, END_ADDR1 + jne next_addr_r + xin R0, (sdram_addr+2) + cmp R0, END_ADDR2 + jeq read_finished + + ; Advance address counter +next_addr_r: mov R0, BURST_LEN + call AddrCnt_Inc + jmp sdr_read + +; ---------------------------------------------------------- +wait_cmd_rdy: push R0 +wait4cmd: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_CMD_FULL + jnz wait4cmd + pop R0 + ret + +; ---------------------------------------------------------- +read_finished: +no_error: mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, verify_ok + call LCD_putsx + mov R0, LCD_CMD_Z2 + call LCD_writecmd + call print_addr + + mov R1, verify_ok + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + jmp ende + +verify_error: mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, verify_nok + call LCD_putsx + call print_addr + call print_data + mov R1, verify_nok + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + xin R0, (ctrl_reg) + or R0, 0x10 + xout (ctrl_reg), R0 + + jmp ende + +ende: call delay1s + ret + +; ------------------------------------------------- +AddrCnt_Init: xout (sdram_addr+0), R0 + xout (sdram_addr+1), R1 + xout (sdram_addr+2), R2 + ret + +; ------------------------------------------------- +; Parameter +; R0: increment value +AddrCnt_Inc: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + add R1, R0 + addc R2, 0 + addc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Parameter +; R0: decrement value +AddrCnt_Dec: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + sub R1, R0 + subc R2, 0 + subc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Display Address counter +AddrCnt_Disp: mov R0, LCD_CMD_Z2 + call LCD_writecmd + call print_addr + ret + +; ------------------------------------------------- +; PutHexByte +; R0 : Byte value +PutHexByte: push R1 + call bin2hex + call LCD_writechar + mov R0, R1 + call LCD_writechar + pop R1 + ret + +; ------------------------------------------------- +print_addr: push R0 + xin R0, (sdram_addr+2) + call PutHexByte + xin R0, (sdram_addr+1) + call PutHexByte + xin R0, (sdram_addr+0) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +; R1 : ptr to byte array +print_dword: push R0 + add R1, 3 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +print_data: push R0 + mov R0, LCD_CMD_Z2 + call LCD_writecmd + movx R0, (sdram_data+7) + call PutHexByte + movx R0, (sdram_data+6) + call PutHexByte + movx R0, (sdram_data+5) + call PutHexByte + movx R0, (sdram_data+4) + call PutHexByte + movx R0, (sdram_data+3) + call PutHexByte + movx R0, (sdram_data+2) + call PutHexByte + movx R0, (sdram_data+1) + call PutHexByte + movx R0, (sdram_data+0) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +pen_init: push R0 + mov R0, 0 + movc (pen_enable), R0 + call delay10ms + mov R0, pen_rx_buf + movc (pen_rx_ptr_r), R0 + movc (pen_rx_ptr_w), R0 + mov R0, PEN_TIMEOUT0 + movc (pen_timeout+0), R0 + mov R0, PEN_TIMEOUT1 + movc (pen_timeout+1), R0 + mov R0, 0 + movc (pen_bit_cnt_w), R0 + movc (pen_octet_w), R0 + movc (pen_octet_r), R0 + mov R0, 7 + movc (pen_bit_cnt_r), R0 + pop R0 + ret + +; ------------------------------------------------- +; Params: none +; Return: +; R0 : received character +pen_getchar: push R1 + push R2 + push R3 + movc R3, (pen_octet_r) + movc R1, (pen_rx_ptr_r) + movc R2, (pen_bit_cnt_r) + inc R2 + cmp R2, 8 + jne u_upd_r_ptr + mov R2, 0 + +pen_wait_rx: movc R0, (pen_rx_ptr_w) + cmp R0, R1 + jeq pen_wait_rx + movc R3, (R1) + inc R1 + cmp R1, pen_rx_buf+128 + jne u_upd_r_ptr + mov R1, pen_rx_buf +u_upd_r_ptr: movc (pen_rx_ptr_r), R1 + movc (pen_bit_cnt_r), R2 +ex_pen_gc: mov R0, 0xFF + shl R3 + jnc pen_is_zero + mov R0, 0x00 +pen_is_zero: movc (pen_octet_r), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +include "../../../lib/jasm/utils.inc.jsm" +include "../../../lib/jasm/lcd.inc.jsm" +include "../../../lib/jasm/cg.inc.jsm" +include "../../../lib/jasm/delays.inc.jsm" +include "../../../lib/jasm/uart.inc.jsm" + \ No newline at end of file diff --git a/projects/cpu/asm/pen_test.tcl b/projects/cpu/asm/pen_test.tcl new file mode 100644 index 0000000..b12cd98 --- /dev/null +++ b/projects/cpu/asm/pen_test.tcl @@ -0,0 +1,2474 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG +# +# Copyright (C) 2007 J. Ahrensfeld +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# For questions and ideas, please contact the author at jens@jayfield.org +# +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from pen_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x03A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0003003A" + +# 0x001: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013C000" + +# 0x002: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0023C001" + +# 0x003: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0033C002" + +# 0x004: XIN R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00428001" + +# 0x005: MOVC R00, (0xAB) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0050AAB0" + +# 0x006: AND R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00619201" + +# 0x007: SHL R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0071E001" + +# 0x008: SHL R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0081E001" + +# 0x009: SHL R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0091E001" + +# 0x00A: ROLC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A22000" + +# 0x00B: MOVC (0xAB), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B0DAB0" + +# 0x00C: MOVC R01, (0xAA) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C0AAA1" + +# 0x00D: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D11011" + +# 0x00E: MOVC (0xAA), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E0DAA1" + +# 0x00F: CMP R01, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F0F081" + +# 0x010: JNE 0x01A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103A01A" + +# 0x011: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01103001" + +# 0x012: MOVC (0xAA), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0120DAA1" + +# 0x013: MOVC R02, (0xA7) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0130AA72" + +# 0x014: MOVC (R00), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0140B020" + +# 0x015: INC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01511012" + +# 0x016: CMP R02, 0xA6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0160FA62" + +# 0x017: JNE 0x019 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0173A019" + +# 0x018: MOV R02, 0x26 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01803262" + +# 0x019: MOVC (0xA7), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0190DA72" + +# 0x01A: CALL 0x01F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A3B01F" + +# 0x01B: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B3D002" + +# 0x01C: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C3D001" + +# 0x01D: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D3D000" + +# 0x01E: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E3F000" + +# 0x01F: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F28000" + +# 0x020: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02019200" + +# 0x021: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0211F000" + +# 0x022: XIN R01, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02228041" + +# 0x023: AND R01, 0xEF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02319EF1" + +# 0x024: OR R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0241A010" + +# 0x025: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02524040" + +# 0x026: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02628000" + +# 0x027: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02719010" + +# 0x028: JZ 0x030 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02831030" + +# 0x029: MOV R00, 0x14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02903140" + +# 0x02A: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A25000" + +# 0x02B: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B11010" + +# 0x02C: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C25000" + +# 0x02D: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D11010" + +# 0x02E: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E25000" + +# 0x02F: JMP 0x039 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F30039" + +# 0x030: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03028000" + +# 0x031: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03119020" + +# 0x032: JZ 0x039 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03231039" + +# 0x033: MOV R00, 0x14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03303140" + +# 0x034: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03425000" + +# 0x035: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03511010" + +# 0x036: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03625000" + +# 0x037: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03711010" + +# 0x038: XOUT (R00), 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03825200" + +# 0x039: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0393E000" + +# 0x03A: CALL 0x1DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A3B1DC" + +# 0x03B: CALL 0x219 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B3B219" + +# 0x03C: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C03000" + +# 0x03D: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D24010" + +# 0x03E: MOV R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E03040" + +# 0x03F: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F24040" + +# 0x040: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04028040" + +# 0x041: OR R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0411B020" + +# 0x042: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04224040" + +# 0x043: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04303030" + +# 0x044: COUT (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04426030" + +# 0x045: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04503010" + +# 0x046: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0463B236" + +# 0x047: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04703000" + +# 0x048: MOV R01, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04803C01" + +# 0x049: XOUT (0x10), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04924101" + +# 0x04A: XOUT (0x11), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A24111" + +# 0x04B: XOUT (0x12), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B24121" + +# 0x04C: CALL 0x2AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C3B2AA" + +# 0x04D: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D3B28F" + +# 0x04E: MOV R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E03031" + +# 0x04F: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F3B23B" + +# 0x050: MOV R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05003031" + +# 0x051: CALL 0x29B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0513B29B" + +# 0x052: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05203001" + +# 0x053: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0533B2A7" + +# 0x054: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05428040" + +# 0x055: AND R00, 0xCF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05519CF0" + +# 0x056: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05624040" + +# 0x057: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05703000" + +# 0x058: MOVC (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0580D010" + +# 0x059: MOV R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "059030F0" + +# 0x05A: XOUT (0x17), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A24170" + +# 0x05B: MOV R00, 0x27 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B03270" + +# 0x05C: XOUT (0x18), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C24180" + +# 0x05D: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D03000" + +# 0x05E: XOUT (0x19), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E24190" + +# 0x05F: CALL 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F3B067" + +# 0x060: CALL 0x094 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0603B094" + +# 0x061: CALL 0x0EF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0613B0EF" + +# 0x062: CALL 0x123 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0623B123" + +# 0x063: MOVC R00, (0x01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0630A010" + +# 0x064: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06411010" + +# 0x065: MOVC (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0650D010" + +# 0x066: JMP 0x061 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06630061" + +# 0x067: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06703010" + +# 0x068: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0683B236" + +# 0x069: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "069030E1" + +# 0x06A: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A3B23B" + +# 0x06B: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B030E1" + +# 0x06C: CALL 0x2A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C3B2A4" + +# 0x06D: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D03001" + +# 0x06E: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E3B2A7" + +# 0x06F: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F03000" + +# 0x070: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07003001" + +# 0x071: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07103002" + +# 0x072: CALL 0x180 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0723B180" + +# 0x073: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07303800" + +# 0x074: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0740308F" + +# 0x075: MOVX (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07507000" + +# 0x076: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07611010" + +# 0x077: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0771501F" + +# 0x078: JNZ 0x075 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07832075" + +# 0x079: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07903082" + +# 0x07A: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A28070" + +# 0x07B: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B24010" + +# 0x07C: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C19040" + +# 0x07D: JNZ 0x07A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D3207A" + +# 0x07E: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E03100" + +# 0x07F: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F24070" + +# 0x080: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08015022" + +# 0x081: JNZ 0x07A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0813207A" + +# 0x082: CALL 0x15D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0823B15D" + +# 0x083: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08303060" + +# 0x084: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08424070" + +# 0x085: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08528080" + +# 0x086: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0860FF80" + +# 0x087: JNE 0x08E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0873A08E" + +# 0x088: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08828090" + +# 0x089: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0890FFF0" + +# 0x08A: JNE 0x08E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A3A08E" + +# 0x08B: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B280A0" + +# 0x08C: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C0FFF0" + +# 0x08D: JEQ 0x091 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D39091" + +# 0x08E: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E03080" + +# 0x08F: CALL 0x184 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F3B184" + +# 0x090: JMP 0x079 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09030079" + +# 0x091: CALL 0x1A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0913B1A4" + +# 0x092: CALL 0x2B0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0923B2B0" + +# 0x093: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0933E000" + +# 0x094: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09403010" + +# 0x095: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0953B236" + +# 0x096: MOV R01, 0x39 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09603391" + +# 0x097: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0973B23B" + +# 0x098: MOV R01, 0x39 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09803391" + +# 0x099: CALL 0x2A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0993B2A4" + +# 0x09A: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A03001" + +# 0x09B: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B3B2A7" + +# 0x09C: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C03000" + +# 0x09D: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D03001" + +# 0x09E: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E03002" + +# 0x09F: CALL 0x180 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F3B180" + +# 0x0A0: CALL 0x1DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A03B1DC" + +# 0x0A1: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A128000" + +# 0x0A2: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A219200" + +# 0x0A3: JNZ 0x0A1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A3320A1" + +# 0x0A4: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A403010" + +# 0x0A5: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A528000" + +# 0x0A6: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A619200" + +# 0x0A7: JZ 0x0A5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A7310A5" + +# 0x0A8: MOVC R00, (0xA7) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A80AA70" + +# 0x0A9: SUB R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A915050" + +# 0x0AA: CMP R00, 0xA6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AA0FA60" + +# 0x0AB: JLT 0x0AD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AB350AD" + +# 0x0AC: SUB R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AC15800" + +# 0x0AD: MOVC (0xA6), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AD0DA60" + +# 0x0AE: MOV R01, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AE03061" + +# 0x0AF: CALL 0x1EF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AF3B1EF" + +# 0x0B0: MOVC (R00), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B00B010" + +# 0x0B1: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B111011" + +# 0x0B2: CMP R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B20F0E1" + +# 0x0B3: JNE 0x0AF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B33A0AF" + +# 0x0B4: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B428080" + +# 0x0B5: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B53C000" + +# 0x0B6: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B628090" + +# 0x0B7: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B73C000" + +# 0x0B8: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B8280A0" + +# 0x0B9: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B93C000" + +# 0x0BA: MOV R15, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BA0340F" + +# 0x0BB: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BB03082" + +# 0x0BC: MOV R01, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BC03061" + +# 0x0BD: MOV R03, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BD03803" + +# 0x0BE: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BE09010" + +# 0x0BF: MOVX (R00), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BF06030" + +# 0x0C0: INC R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C011013" + +# 0x0C1: MOVX (R00), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C106030" + +# 0x0C2: INC R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C211013" + +# 0x0C3: MOVX (R00), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C306030" + +# 0x0C4: INC R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C411013" + +# 0x0C5: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C511011" + +# 0x0C6: CMP R03, 0x86 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C60F863" + +# 0x0C7: JNE 0x0BE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C73A0BE" + +# 0x0C8: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C828070" + +# 0x0C9: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C924010" + +# 0x0CA: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CA19040" + +# 0x0CB: JNZ 0x0C8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CB320C8" + +# 0x0CC: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CC03100" + +# 0x0CD: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CD24070" + +# 0x0CE: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CE15022" + +# 0x0CF: JNZ 0x0BD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CF320BD" + +# 0x0D0: CALL 0x15D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D03B15D" + +# 0x0D1: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D103060" + +# 0x0D2: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D224070" + +# 0x0D3: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D328090" + +# 0x0D4: ADD R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D411050" + +# 0x0D5: XOUT (0x09), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D524090" + +# 0x0D6: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D6280A0" + +# 0x0D7: ADDC R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D713000" + +# 0x0D8: XOUT (0x0A), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D8240A0" + +# 0x0D9: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D91501F" + +# 0x0DA: JNZ 0x0BB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DA320BB" + +# 0x0DB: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DB3D000" + +# 0x0DC: XOUT (0x0A), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DC240A0" + +# 0x0DD: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DD3D000" + +# 0x0DE: XOUT (0x09), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DE24090" + +# 0x0DF: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DF3D000" + +# 0x0E0: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E024080" + +# 0x0E1: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E128080" + +# 0x0E2: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E20FF80" + +# 0x0E3: JNE 0x0EA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E33A0EA" + +# 0x0E4: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E428090" + +# 0x0E5: CMP R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E50F040" + +# 0x0E6: JNE 0x0EA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E63A0EA" + +# 0x0E7: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E7280A0" + +# 0x0E8: CMP R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E80F000" + +# 0x0E9: JEQ 0x09C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E93909C" + +# 0x0EA: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EA03080" + +# 0x0EB: CALL 0x184 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EB3B184" + +# 0x0EC: JMP 0x0AE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EC300AE" + +# 0x0ED: CALL 0x2B0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0ED3B2B0" + +# 0x0EE: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EE3E000" + +# 0x0EF: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EF03010" + +# 0x0F0: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F03B236" + +# 0x0F1: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F1031D1" + +# 0x0F2: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F23B23B" + +# 0x0F3: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F3031D1" + +# 0x0F4: CALL 0x2A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F43B2A4" + +# 0x0F5: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F503001" + +# 0x0F6: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F63B2A7" + +# 0x0F7: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F703000" + +# 0x0F8: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F803001" + +# 0x0F9: MOV R02, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F903202" + +# 0x0FA: CALL 0x180 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FA3B180" + +# 0x0FB: MOVC R00, (0x01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FB0A010" + +# 0x0FC: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FC0D000" + +# 0x0FD: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FD03082" + +# 0x0FE: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FE0A001" + +# 0x0FF: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FF03800" + +# 0x100: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1000308F" + +# 0x101: MOVX (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10106001" + +# 0x102: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10211010" + +# 0x103: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10311011" + +# 0x104: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1041501F" + +# 0x105: JNZ 0x101 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10532101" + +# 0x106: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10628070" + +# 0x107: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10724010" + +# 0x108: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10819040" + +# 0x109: JNZ 0x106 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10932106" + +# 0x10A: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10A03100" + +# 0x10B: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10B24070" + +# 0x10C: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10C0A000" + +# 0x10D: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10D11010" + +# 0x10E: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10E0D000" + +# 0x10F: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10F15022" + +# 0x110: JNZ 0x0FE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "110320FE" + +# 0x111: CALL 0x15D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1113B15D" + +# 0x112: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11203060" + +# 0x113: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11324070" + +# 0x114: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11428080" + +# 0x115: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1150FF80" + +# 0x116: JNE 0x11D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1163A11D" + +# 0x117: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11728090" + +# 0x118: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1180FFF0" + +# 0x119: JNE 0x11D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1193A11D" + +# 0x11A: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11A280A0" + +# 0x11B: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11B0FFF0" + +# 0x11C: JEQ 0x120 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11C39120" + +# 0x11D: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11D03080" + +# 0x11E: CALL 0x184 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11E3B184" + +# 0x11F: JMP 0x0FD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11F300FD" + +# 0x120: CALL 0x1A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1203B1A4" + +# 0x121: CALL 0x2B0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1213B2B0" + +# 0x122: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1223E000" + +# 0x123: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12303010" + +# 0x124: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1243B236" + +# 0x125: MOV R01, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "125032B1" + +# 0x126: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1263B23B" + +# 0x127: MOV R01, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "127032B1" + +# 0x128: CALL 0x2A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1283B2A4" + +# 0x129: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12903001" + +# 0x12A: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12A3B2A7" + +# 0x12B: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12B03000" + +# 0x12C: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12C03001" + +# 0x12D: MOV R02, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12D03202" + +# 0x12E: CALL 0x180 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12E3B180" + +# 0x12F: MOVC R00, (0x01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12F0A010" + +# 0x130: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1300D000" + +# 0x131: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13128070" + +# 0x132: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13224010" + +# 0x133: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13319200" + +# 0x134: JNZ 0x138 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13432138" + +# 0x135: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13503200" + +# 0x136: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13624070" + +# 0x137: JMP 0x131 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13730131" + +# 0x138: CALL 0x15D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1383B15D" + +# 0x139: MOV R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13903050" + +# 0x13A: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13A24070" + +# 0x13B: MOV R03, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13B03083" + +# 0x13C: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13C28070" + +# 0x13D: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13D24010" + +# 0x13E: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13E19200" + +# 0x13F: JNZ 0x13C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13F3213C" + +# 0x140: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1400A001" + +# 0x141: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14103800" + +# 0x142: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1420308F" + +# 0x143: MOVX R02, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14304002" + +# 0x144: CMP R02, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1440E012" + +# 0x145: JNE 0x170 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1453A170" + +# 0x146: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14611010" + +# 0x147: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14711011" + +# 0x148: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1481501F" + +# 0x149: JNZ 0x143 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14932143" + +# 0x14A: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14A03200" + +# 0x14B: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14B24070" + +# 0x14C: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14C0A000" + +# 0x14D: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14D11010" + +# 0x14E: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14E0D000" + +# 0x14F: SUB R03, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14F15023" + +# 0x150: JNZ 0x13C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1503213C" + +# 0x151: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15128080" + +# 0x152: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1520FF80" + +# 0x153: JNE 0x15A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1533A15A" + +# 0x154: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15428090" + +# 0x155: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1550FFF0" + +# 0x156: JNE 0x15A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1563A15A" + +# 0x157: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "157280A0" + +# 0x158: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1580FFF0" + +# 0x159: JEQ 0x164 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15939164" + +# 0x15A: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15A03080" + +# 0x15B: CALL 0x184 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15B3B184" + +# 0x15C: JMP 0x138 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15C30138" + +# 0x15D: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15D3C000" + +# 0x15E: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15E28070" + +# 0x15F: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15F24010" + +# 0x160: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16019010" + +# 0x161: JNZ 0x15E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1613215E" + +# 0x162: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1623D000" + +# 0x163: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1633E000" + +# 0x164: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16403010" + +# 0x165: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1653B236" + +# 0x166: MOV R01, 0x48 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16603481" + +# 0x167: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1673B23B" + +# 0x168: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16803C00" + +# 0x169: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1693B236" + +# 0x16A: CALL 0x1AF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16A3B1AF" + +# 0x16B: MOV R01, 0x48 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16B03481" + +# 0x16C: CALL 0x2A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16C3B2A4" + +# 0x16D: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16D03001" + +# 0x16E: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16E3B2A7" + +# 0x16F: JMP 0x17E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16F3017E" + +# 0x170: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17003010" + +# 0x171: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1713B236" + +# 0x172: MOV R01, 0x52 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17203521" + +# 0x173: CALL 0x23B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1733B23B" + +# 0x174: CALL 0x1AF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1743B1AF" + +# 0x175: CALL 0x1C7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1753B1C7" + +# 0x176: MOV R01, 0x52 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17603521" + +# 0x177: CALL 0x2A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1773B2A4" + +# 0x178: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17803001" + +# 0x179: CALL 0x2A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1793B2A7" + +# 0x17A: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17A28040" + +# 0x17B: OR R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17B1B100" + +# 0x17C: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17C24040" + +# 0x17D: JMP 0x17E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17D3017E" + +# 0x17E: CALL 0x2B0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17E3B2B0" + +# 0x17F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17F3E000" + +# 0x180: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18024080" + +# 0x181: XOUT (0x09), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18124091" + +# 0x182: XOUT (0x0A), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "182240A2" + +# 0x183: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1833E000" + +# 0x184: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1843C001" + +# 0x185: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1853C002" + +# 0x186: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1863C003" + +# 0x187: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18728081" + +# 0x188: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18828092" + +# 0x189: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "189280A3" + +# 0x18A: ADD R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18A10001" + +# 0x18B: ADDC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18B13002" + +# 0x18C: ADDC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18C13003" + +# 0x18D: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18D24081" + +# 0x18E: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18E24092" + +# 0x18F: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18F240A3" + +# 0x190: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1903D003" + +# 0x191: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1913D002" + +# 0x192: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1923D001" + +# 0x193: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1933E000" + +# 0x194: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1943C001" + +# 0x195: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1953C002" + +# 0x196: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1963C003" + +# 0x197: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19728081" + +# 0x198: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19828092" + +# 0x199: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "199280A3" + +# 0x19A: SUB R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19A14001" + +# 0x19B: SUBC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19B17002" + +# 0x19C: SUBC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19C17003" + +# 0x19D: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19D24081" + +# 0x19E: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19E24092" + +# 0x19F: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19F240A3" + +# 0x1A0: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A03D003" + +# 0x1A1: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A13D002" + +# 0x1A2: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A23D001" + +# 0x1A3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A33E000" + +# 0x1A4: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A403C00" + +# 0x1A5: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A53B236" + +# 0x1A6: CALL 0x1AF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A63B1AF" + +# 0x1A7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A73E000" + +# 0x1A8: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A83C001" + +# 0x1A9: CALL 0x212 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A93B212" + +# 0x1AA: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AA3B24D" + +# 0x1AB: MOV R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AB02010" + +# 0x1AC: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AC3B24D" + +# 0x1AD: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AD3D001" + +# 0x1AE: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AE3E000" + +# 0x1AF: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AF3C000" + +# 0x1B0: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B0280A0" + +# 0x1B1: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B13B1A8" + +# 0x1B2: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B228090" + +# 0x1B3: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B33B1A8" + +# 0x1B4: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B428080" + +# 0x1B5: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B53B1A8" + +# 0x1B6: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B63D000" + +# 0x1B7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B73E000" + +# 0x1B8: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B83C000" + +# 0x1B9: ADD R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B911031" + +# 0x1BA: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BA09010" + +# 0x1BB: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BB3B1A8" + +# 0x1BC: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BC15011" + +# 0x1BD: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BD09010" + +# 0x1BE: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BE3B1A8" + +# 0x1BF: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BF15011" + +# 0x1C0: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C009010" + +# 0x1C1: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C13B1A8" + +# 0x1C2: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C215011" + +# 0x1C3: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C309010" + +# 0x1C4: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C43B1A8" + +# 0x1C5: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C53D000" + +# 0x1C6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C63E000" + +# 0x1C7: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C73C000" + +# 0x1C8: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C803C00" + +# 0x1C9: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C93B236" + +# 0x1CA: MOVX R00, (0x87) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CA05870" + +# 0x1CB: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CB3B1A8" + +# 0x1CC: MOVX R00, (0x86) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CC05860" + +# 0x1CD: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CD3B1A8" + +# 0x1CE: MOVX R00, (0x85) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CE05850" + +# 0x1CF: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CF3B1A8" + +# 0x1D0: MOVX R00, (0x84) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D005840" + +# 0x1D1: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D13B1A8" + +# 0x1D2: MOVX R00, (0x83) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D205830" + +# 0x1D3: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D33B1A8" + +# 0x1D4: MOVX R00, (0x82) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D405820" + +# 0x1D5: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D53B1A8" + +# 0x1D6: MOVX R00, (0x81) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D605810" + +# 0x1D7: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D73B1A8" + +# 0x1D8: MOVX R00, (0x80) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D805800" + +# 0x1D9: CALL 0x1A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D93B1A8" + +# 0x1DA: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DA3D000" + +# 0x1DB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DB3E000" + +# 0x1DC: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DC3C000" + +# 0x1DD: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DD03000" + +# 0x1DE: MOVC (0xAE), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DE0DAE0" + +# 0x1DF: CALL 0x2BE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DF3B2BE" + +# 0x1E0: MOV R00, 0x26 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E003260" + +# 0x1E1: MOVC (0xA6), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E10DA60" + +# 0x1E2: MOVC (0xA7), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E20DA70" + +# 0x1E3: MOV R00, 0xE8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E303E80" + +# 0x1E4: MOVC (0xA8), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E40DA80" + +# 0x1E5: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E503030" + +# 0x1E6: MOVC (0xA9), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E60DA90" + +# 0x1E7: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E703000" + +# 0x1E8: MOVC (0xAA), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E80DAA0" + +# 0x1E9: MOVC (0xAB), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E90DAB0" + +# 0x1EA: MOVC (0xAC), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EA0DAC0" + +# 0x1EB: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EB03070" + +# 0x1EC: MOVC (0xAF), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EC0DAF0" + +# 0x1ED: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1ED3D000" + +# 0x1EE: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EE3E000" + +# 0x1EF: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EF3C001" + +# 0x1F0: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F03C002" + +# 0x1F1: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F13C003" + +# 0x1F2: MOVC R03, (0xAC) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F20AAC3" + +# 0x1F3: MOVC R01, (0xA6) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F30AA61" + +# 0x1F4: MOVC R02, (0xAF) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F40AAF2" + +# 0x1F5: INC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F511012" + +# 0x1F6: CMP R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F60F082" + +# 0x1F7: JNE 0x201 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F73A201" + +# 0x1F8: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F803002" + +# 0x1F9: MOVC R00, (0xA7) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F90AA70" + +# 0x1FA: CMP R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FA0E010" + +# 0x1FB: JEQ 0x1F9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FB391F9" + +# 0x1FC: MOVC R03, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FC09013" + +# 0x1FD: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FD11011" + +# 0x1FE: CMP R01, 0xA6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FE0FA61" + +# 0x1FF: JNE 0x201 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FF3A201" + +# 0x200: MOV R01, 0x26 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20003261" + +# 0x201: MOVC (0xA6), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2010DA61" + +# 0x202: MOVC (0xAF), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2020DAF2" + +# 0x203: MOV R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20303FF0" + +# 0x204: SHL R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2041E003" + +# 0x205: JNC 0x207 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20534207" + +# 0x206: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20603000" + +# 0x207: MOVC (0xAC), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2070DAC3" + +# 0x208: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2083D003" + +# 0x209: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2093D002" + +# 0x20A: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20A3D001" + +# 0x20B: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20B3E000" + +# 0x20C: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20C190F0" + +# 0x20D: CMP R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20D0F0A0" + +# 0x20E: JLT 0x210 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20E35210" + +# 0x20F: ADD R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20F11070" + +# 0x210: ADD R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21011300" + +# 0x211: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2113E000" + +# 0x212: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2123C000" + +# 0x213: CALL 0x20C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2133B20C" + +# 0x214: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21402001" + +# 0x215: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2153D000" + +# 0x216: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2162A000" + +# 0x217: CALL 0x20C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2173B20C" + +# 0x218: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2183E000" + +# 0x219: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21903002" + +# 0x21A: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21A03030" + +# 0x21B: CALL 0x265 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21B3B265" + +# 0x21C: CALL 0x2BE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21C3B2BE" + +# 0x21D: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21D03002" + +# 0x21E: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21E03030" + +# 0x21F: CALL 0x265 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21F3B265" + +# 0x220: CALL 0x2BE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2203B2BE" + +# 0x221: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22103002" + +# 0x222: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22203020" + +# 0x223: CALL 0x265 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2233B265" + +# 0x224: CALL 0x2C5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2243B2C5" + +# 0x225: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22503280" + +# 0x226: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2263B236" + +# 0x227: MOV R00, 0x0C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "227030C0" + +# 0x228: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2283B236" + +# 0x229: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22903060" + +# 0x22A: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22A3B236" + +# 0x22B: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22B03010" + +# 0x22C: CALL 0x236 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22C3B236" + +# 0x22D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22D3E000" + +# 0x22E: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22E3C000" + +# 0x22F: CALL 0x259 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22F3B259" + +# 0x230: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23019800" + +# 0x231: JZ 0x234 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23131234" + +# 0x232: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2323B2DC" + +# 0x233: JMP 0x22F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2333022F" + +# 0x234: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2343D000" + +# 0x235: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2353E000" + +# 0x236: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2363C002" + +# 0x237: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23703002" + +# 0x238: CALL 0x252 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2383B252" + +# 0x239: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2393D002" + +# 0x23A: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23A3E000" + +# 0x23B: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23B3C000" + +# 0x23C: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23C04010" + +# 0x23D: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23D11011" + +# 0x23E: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23E0F000" + +# 0x23F: JZ 0x242 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23F31242" + +# 0x240: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2403B24D" + +# 0x241: JMP 0x23C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2413023C" + +# 0x242: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2423D000" + +# 0x243: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2433E000" + +# 0x244: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2443C000" + +# 0x245: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24509010" + +# 0x246: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24611011" + +# 0x247: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2470F000" + +# 0x248: JZ 0x24B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2483124B" + +# 0x249: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2493B24D" + +# 0x24A: JMP 0x245 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24A30245" + +# 0x24B: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24B3D000" + +# 0x24C: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24C3E000" + +# 0x24D: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24D3C002" + +# 0x24E: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24E03402" + +# 0x24F: CALL 0x252 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24F3B252" + +# 0x250: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2503D002" + +# 0x251: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2513E000" + +# 0x252: CALL 0x22E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2523B22E" + +# 0x253: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2533C000" + +# 0x254: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2542A000" + +# 0x255: CALL 0x265 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2553B265" + +# 0x256: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2563D000" + +# 0x257: CALL 0x265 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2573B265" + +# 0x258: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2583E000" + +# 0x259: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2593C002" + +# 0x25A: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25A03002" + +# 0x25B: CALL 0x25E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25B3B25E" + +# 0x25C: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25C3D002" + +# 0x25D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25D3E000" + +# 0x25E: CALL 0x278 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25E3B278" + +# 0x25F: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25F2A000" + +# 0x260: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2603C000" + +# 0x261: CALL 0x278 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2613B278" + +# 0x262: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2623D002" + +# 0x263: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2631A020" + +# 0x264: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2643E000" + +# 0x265: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2653C001" + +# 0x266: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "266190F0" + +# 0x267: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26702001" + +# 0x268: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2681A021" + +# 0x269: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26924031" + +# 0x26A: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26A3B2DC" + +# 0x26B: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26B02001" + +# 0x26C: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26C1A021" + +# 0x26D: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26D1B801" + +# 0x26E: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26E24031" + +# 0x26F: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26F3B2DC" + +# 0x270: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27002001" + +# 0x271: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2711A021" + +# 0x272: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27224031" + +# 0x273: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2733B2DC" + +# 0x274: OR R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2741B201" + +# 0x275: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27524031" + +# 0x276: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2763D001" + +# 0x277: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2773E000" + +# 0x278: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2783C001" + +# 0x279: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27903201" + +# 0x27A: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27A1A021" + +# 0x27B: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27B24031" + +# 0x27C: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27C3B2DC" + +# 0x27D: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27D03201" + +# 0x27E: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27E1A021" + +# 0x27F: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27F1B801" + +# 0x280: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28024031" + +# 0x281: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2813B2DC" + +# 0x282: XIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28228030" + +# 0x283: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "283190F0" + +# 0x284: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28403201" + +# 0x285: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2851A021" + +# 0x286: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28624031" + +# 0x287: CALL 0x2DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2873B2DC" + +# 0x288: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2883D001" + +# 0x289: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2893E000" + +# 0x28A: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28A3C000" + +# 0x28B: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28B03020" + +# 0x28C: XOUT (0x0E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28C240E0" + +# 0x28D: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28D3D000" + +# 0x28E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28E3E000" + +# 0x28F: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28F3C000" + +# 0x290: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29003010" + +# 0x291: XOUT (0x0E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "291240E0" + +# 0x292: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2923D000" + +# 0x293: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2933E000" + +# 0x294: CALL 0x2AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2943B2AA" + +# 0x295: XOUT (0x0C), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "295240C1" + +# 0x296: XOUT (0x0B), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "296240B0" + +# 0x297: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2973E000" + +# 0x298: CALL 0x2AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2983B2AA" + +# 0x299: XOUT (0x0D), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "299240D0" + +# 0x29A: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29A3E000" + +# 0x29B: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29B3C000" + +# 0x29C: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29C04010" + +# 0x29D: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29D11011" + +# 0x29E: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29E0F000" + +# 0x29F: JZ 0x2A2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29F312A2" + +# 0x2A0: CALL 0x298 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A03B298" + +# 0x2A1: JMP 0x29C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A13029C" + +# 0x2A2: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A23D000" + +# 0x2A3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A33E000" + +# 0x2A4: CALL 0x28A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A43B28A" + +# 0x2A5: CALL 0x29B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A53B29B" + +# 0x2A6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A63E000" + +# 0x2A7: CALL 0x29B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A73B29B" + +# 0x2A8: CALL 0x28A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A83B28A" + +# 0x2A9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A93E000" + +# 0x2AA: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AA3C000" + +# 0x2AB: XIN R00, (0x0E) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AB280E0" + +# 0x2AC: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AC19020" + +# 0x2AD: JZ 0x2AB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AD312AB" + +# 0x2AE: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AE3D000" + +# 0x2AF: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AF3E000" + +# 0x2B0: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B03C00F" + +# 0x2B1: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B1030AF" + +# 0x2B2: CALL 0x2B7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B23B2B7" + +# 0x2B3: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B31501F" + +# 0x2B4: JNZ 0x2B2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B4322B2" + +# 0x2B5: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B53D00F" + +# 0x2B6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B63E000" + +# 0x2B7: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B73C00F" + +# 0x2B8: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B8030AF" + +# 0x2B9: CALL 0x2BE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B93B2BE" + +# 0x2BA: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BA1501F" + +# 0x2BB: JNZ 0x2B9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BB322B9" + +# 0x2BC: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BC3D00F" + +# 0x2BD: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BD3E000" + +# 0x2BE: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BE3C00F" + +# 0x2BF: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BF030AF" + +# 0x2C0: CALL 0x2C5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C03B2C5" + +# 0x2C1: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C11501F" + +# 0x2C2: JNZ 0x2C0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C2322C0" + +# 0x2C3: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C33D00F" + +# 0x2C4: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C43E000" + +# 0x2C5: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C53C00F" + +# 0x2C6: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C6030AF" + +# 0x2C7: CALL 0x2CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C73B2CC" + +# 0x2C8: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C81501F" + +# 0x2C9: JNZ 0x2C7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C9322C7" + +# 0x2CA: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CA3D00F" + +# 0x2CB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CB3E000" + +# 0x2CC: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CC3C00F" + +# 0x2CD: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CD030AF" + +# 0x2CE: CALL 0x2D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CE3B2D3" + +# 0x2CF: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CF1501F" + +# 0x2D0: JNZ 0x2CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D0322CE" + +# 0x2D1: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D13D00F" + +# 0x2D2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D23E000" + +# 0x2D3: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D33C00F" + +# 0x2D4: MOV R15, 0x63 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D40363F" + +# 0x2D5: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D500000" + +# 0x2D6: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D600000" + +# 0x2D7: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D700000" + +# 0x2D8: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D81501F" + +# 0x2D9: JNZ 0x2D5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D9322D5" + +# 0x2DA: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DA3D00F" + +# 0x2DB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DB3E000" + +# 0x2DC: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DC3C00F" + +# 0x2DD: MOV R15, 0x09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DD0309F" + +# 0x2DE: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DE00000" + +# 0x2DF: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DF00000" + +# 0x2E0: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E000000" + +# 0x2E1: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E11501F" + +# 0x2E2: JNZ 0x2DE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E2322DE" + +# 0x2E3: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E33D00F" + +# 0x2E4: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E43E000" + +# 0x2E5: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E53C001" + +# 0x2E6: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E628061" + +# 0x2E7: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E719021" + +# 0x2E8: JNZ 0x2E6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E8322E6" + +# 0x2E9: XOUT (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2E924020" + +# 0x2EA: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EA3D001" + +# 0x2EB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EB3E000" + +# 0x2EC: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EC3C001" + +# 0x2ED: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2ED28061" + +# 0x2EE: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EE19101" + +# 0x2EF: JZ 0x2ED +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2EF312ED" + +# 0x2F0: XIN R00, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F028020" + +# 0x2F1: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F13D001" + +# 0x2F2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2F23E000" + +# Assembled from pen_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "000D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "010A" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "074D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0820" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0954" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B73" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E43" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F6C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1065" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1161" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1272" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1369" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "146E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1567" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1620" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1753" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1844" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1952" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A41" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B4D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D57" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2074" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2169" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "226E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2367" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2420" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2553" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2644" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2752" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2841" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "294D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B52" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "306E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3167" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3220" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "374D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3952" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E6E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F67" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4020" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4142" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4269" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4374" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "446D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4561" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4670" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4856" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4965" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C66" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D79" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F4F" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "504B" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5246" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5361" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5469" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "556C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5665" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5764" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5820" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5961" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D2E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/rom.tcl b/projects/cpu/asm/rom.tcl new file mode 100644 index 0000000..d337450 --- /dev/null +++ b/projects/cpu/asm/rom.tcl @@ -0,0 +1,64 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +# Source JTAG/TCL frame work +#cd $env(CHIPSCOPE)\bin\nt +cd F:\\Xilinx9\\ChipScope_Pro_9_1i\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \ + "frequency=6000000"] + # frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +set CABLE_NAME $CSEJTAG_TARGET_PLATFORMUSB +set CABLE_ARGS $PLATFORM_USB_CABLE_ARGS + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CABLE_NAME 0 $CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 + +# --------------------------------------------------------------- +# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +::chipscope::csejtag_tap shift_chain_ir $handle $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 10 3C2 + +# Write Program +# JASM_ROM_INSERT_HERE + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/sdr_test.jsm b/projects/cpu/asm/sdr_test.jsm new file mode 100644 index 0000000..f68f8ba --- /dev/null +++ b/projects/cpu/asm/sdr_test.jsm @@ -0,0 +1,306 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +addr_incr: equ 2 +addr_msb_max: equ 0xFF + +; External RAM/ROM + xmem +greet_txt: dc "SDRAM Test", 0 +msg_txt0: dc "Clearing SDRAM", 0 +msg_txt1: dc "Writing SDRAM", 0 +msg_txt2: dc "Reading SDRAM", 0 +verify_ok: dc "Verify OK", 0 +verify_nok: dc "Verify Failed", 0 +dot: dc ".", 0 + + org 0x80 +sdram_data: db 8 ; SDRAM data window at X:0x80 + +; Internal RAM + cmem 0 +round: db 1 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp main + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- + org 0x001 + reti + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +main: + call LCD_init + mov R0, 0x00 + xout (led_port), R0 + + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Wait until SDRAM ready +poll_bsy_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, SDRAM_STAT_BUSY + jnz poll_bsy_fin + + ; Print greeting message + mov R1, greet_txt + call LCD_putsx + + xin R0, (ctrl_reg) + or R0, 0x10 + xout (ctrl_reg), R0 + call delay100ms + or R0, 0x20 + xout (ctrl_reg), R0 + call delay100ms + and R0, 0xEF + xout (ctrl_reg), R0 + call delay100ms + and R0, 0xCF + xout (ctrl_reg), R0 + + jmp do_clear +; ---------------------------------------------------------- +; SDRAM clear +; ---------------------------------------------------------- +do_clear: ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Clear message + mov R1, msg_txt0 + call LCD_putsx + + ; Set SDRAM address register to 0 + call AddrCnt_Init + + ; Fill SDR Buffer with zeros + mov R0, sdram_data + mov R15, 8 +buf_clr_loop: movx (R0), 0 + inc R0 + dec R15 + jnz buf_clr_loop + +sdr_clear: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq clear_finished + + ; Wait finished last write +poll_clear_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, SDRAM_STAT_WRITE_BUSY + + jnz poll_clear_fin + + ; Start SDR write + mov R0, sdram_reg + xout (R0), SDRAM_CTRL_WRITE_REQUEST + + ; Advance address counter + mov R0, addr_incr + call AddrCnt_Adv + + jmp sdr_clear + +clear_finished: + call AddrCnt_Disp + call delay1s + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +do_write: ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Write message + mov R1, msg_txt1 + call LCD_putsx + + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_write: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq write_finished + + ; Fill SDR Buffer + movc R1, (round) +; xin R0, (sdram_addr+2) +; cmp R0, 0x7F +; jne force_no_err +; inc R1 +force_no_err: mov R0, sdram_data + mov R15, 8 +write_loop: movx (R0), R1 + inc R0 + inc R1 + dec R15 + jnz write_loop + + ; Wait finished last write +poll_write_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, SDRAM_STAT_WRITE_BUSY + jnz poll_write_fin + + ; Start SDR write + mov R0, sdram_reg + xout (R0), SDRAM_CTRL_WRITE_REQUEST + + ; Advance address counter + mov R0, addr_incr + call AddrCnt_Adv + movc R0, (round) + inc R0 + movc (round), R0 + + jmp sdr_write + +write_finished: call AddrCnt_Disp + call delay1s + +; ---------------------------------------------------------- +; SDRAM Verify +; ---------------------------------------------------------- +do_read: ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Read message + mov R1, msg_txt2 + call LCD_putsx + + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_read: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq read_finished + + ; Start SDR read + mov R0, sdram_reg + xout (R0), SDRAM_CTRL_READ_REQUEST + + ; Wait last read +poll_read_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, SDRAM_STAT_READ_BUSY + jnz poll_read_fin + +read_back_mem: + ; Verify SDR Buffer + movc R1, (round) + mov R0, sdram_data + mov R15, 8 +read_loop: movx R2, (R0) + cmp R2, R1 + jne verify_error + inc R0 + inc R1 + dec R15 + jnz read_loop + + ; Advance address counter + mov R0, addr_incr + call AddrCnt_Adv + movc R0, (round) + inc R0 + movc (round), R0 + jmp sdr_read + +; ---------------------------------------------------------- +read_finished: +no_error: mov R0, LCD_CMD_Z2 + call LCD_writecmd + mov R1, verify_ok + call LCD_putsx + jmp ende + +verify_error: mov R0, LCD_CMD_Z2 + call LCD_writecmd + mov R1, verify_nok + call LCD_putsx + jmp ende + +ende: call delay1s + jmp do_clear + +; ------------------------------------------------- +AddrCnt_Init: push R0 + mov R0, 0x00 + xout (sdram_addr+0), R0 + xout (sdram_addr+1), R0 + xout (sdram_addr+2), R0 + pop R0 + ret + +; ------------------------------------------------- +; Parameter +; R0: increment value +AddrCnt_Adv: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + add R1, R0 + addc R2, 0 + addc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Display Address counter +AddrCnt_Disp: mov R0, LCD_CMD_Z2 + call LCD_writecmd + + xin R0, (sdram_addr+2) + call PutHexByte + xin R0, (sdram_addr+1) + call PutHexByte + xin R0, (sdram_addr+0) + call PutHexByte + + ret + +; ------------------------------------------------- +; PutHexByte +; R0 : Byte value +PutHexByte: call bin2hex + call LCD_writechar + mov R0, R1 + call LCD_writechar + ret + +; ------------------------------------------------- +include "../../../lib/jasm/utils.inc.jsm" +include "../../../lib/jasm/lcd.inc.jsm" +include "../../../lib/jasm/delays.inc.jsm" + \ No newline at end of file diff --git a/projects/cpu/asm/sdr_test.tcl b/projects/cpu/asm/sdr_test.tcl new file mode 100644 index 0000000..d1a9c86 --- /dev/null +++ b/projects/cpu/asm/sdr_test.tcl @@ -0,0 +1,1239 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from sdr_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x002 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030002" + +# 0x001: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013F000" + +# 0x002: CALL 0x0B1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0023B0B1" + +# 0x003: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00303000" + +# 0x004: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00424010" + +# 0x005: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00503010" + +# 0x006: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0063B0CE" + +# 0x007: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00728070" + +# 0x008: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00824010" + +# 0x009: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00919800" + +# 0x00A: JNZ 0x007 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A32007" + +# 0x00B: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B03001" + +# 0x00C: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C3B0D3" + +# 0x00D: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D28040" + +# 0x00E: OR R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E1B100" + +# 0x00F: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F24040" + +# 0x010: CALL 0x129 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103B129" + +# 0x011: OR R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0111B200" + +# 0x012: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01224040" + +# 0x013: CALL 0x129 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0133B129" + +# 0x014: AND R00, 0xEF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01419EF0" + +# 0x015: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01524040" + +# 0x016: CALL 0x129 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0163B129" + +# 0x017: AND R00, 0xCF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01719CF0" + +# 0x018: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01824040" + +# 0x019: JMP 0x01A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0193001A" + +# 0x01A: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A03010" + +# 0x01B: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B3B0CE" + +# 0x01C: MOV R01, 0x0B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C030B1" + +# 0x01D: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D3B0D3" + +# 0x01E: CALL 0x07F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E3B07F" + +# 0x01F: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F03800" + +# 0x020: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0200308F" + +# 0x021: MOVX (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02107000" + +# 0x022: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02211010" + +# 0x023: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0231501F" + +# 0x024: JNZ 0x021 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02432021" + +# 0x025: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "025280A0" + +# 0x026: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0260FFF0" + +# 0x027: JEQ 0x031 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02739031" + +# 0x028: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02828070" + +# 0x029: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02924010" + +# 0x02A: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A19020" + +# 0x02B: JNZ 0x028 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B32028" + +# 0x02C: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C03070" + +# 0x02D: XOUT (R00), 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D25020" + +# 0x02E: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E03020" + +# 0x02F: CALL 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F3B086" + +# 0x030: JMP 0x025 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03030025" + +# 0x031: CALL 0x096 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0313B096" + +# 0x032: CALL 0x122 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0323B122" + +# 0x033: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03303010" + +# 0x034: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0343B0CE" + +# 0x035: MOV R01, 0x1A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "035031A1" + +# 0x036: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0363B0D3" + +# 0x037: CALL 0x07F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0373B07F" + +# 0x038: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03803000" + +# 0x039: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0390D000" + +# 0x03A: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A280A0" + +# 0x03B: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B0FFF0" + +# 0x03C: JEQ 0x051 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C39051" + +# 0x03D: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D0A001" + +# 0x03E: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E03800" + +# 0x03F: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F0308F" + +# 0x040: MOVX (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04006001" + +# 0x041: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04111010" + +# 0x042: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04211011" + +# 0x043: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0431501F" + +# 0x044: JNZ 0x040 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04432040" + +# 0x045: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04528070" + +# 0x046: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04624010" + +# 0x047: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04719020" + +# 0x048: JNZ 0x045 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04832045" + +# 0x049: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04903070" + +# 0x04A: XOUT (R00), 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A25020" + +# 0x04B: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B03020" + +# 0x04C: CALL 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C3B086" + +# 0x04D: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D0A000" + +# 0x04E: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E11010" + +# 0x04F: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F0D000" + +# 0x050: JMP 0x03A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0503003A" + +# 0x051: CALL 0x096 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0513B096" + +# 0x052: CALL 0x122 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0523B122" + +# 0x053: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05303010" + +# 0x054: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0543B0CE" + +# 0x055: MOV R01, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05503281" + +# 0x056: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0563B0D3" + +# 0x057: CALL 0x07F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0573B07F" + +# 0x058: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05803000" + +# 0x059: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0590D000" + +# 0x05A: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A280A0" + +# 0x05B: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B0FFF0" + +# 0x05C: JEQ 0x073 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C39073" + +# 0x05D: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D03070" + +# 0x05E: XOUT (R00), 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E25010" + +# 0x05F: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F28070" + +# 0x060: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06024010" + +# 0x061: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06119010" + +# 0x062: JNZ 0x05F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0623205F" + +# 0x063: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0630A001" + +# 0x064: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06403800" + +# 0x065: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0650308F" + +# 0x066: MOVX R02, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06604002" + +# 0x067: CMP R02, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0670E012" + +# 0x068: JNE 0x078 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0683A078" + +# 0x069: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06911010" + +# 0x06A: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A11011" + +# 0x06B: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B1501F" + +# 0x06C: JNZ 0x066 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C32066" + +# 0x06D: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D03020" + +# 0x06E: CALL 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E3B086" + +# 0x06F: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F0A000" + +# 0x070: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07011010" + +# 0x071: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0710D000" + +# 0x072: JMP 0x05A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0723005A" + +# 0x073: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07303C00" + +# 0x074: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0743B0CE" + +# 0x075: MOV R01, 0x36 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07503361" + +# 0x076: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0763B0D3" + +# 0x077: JMP 0x07D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0773007D" + +# 0x078: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07803C00" + +# 0x079: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0793B0CE" + +# 0x07A: MOV R01, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A03401" + +# 0x07B: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B3B0D3" + +# 0x07C: JMP 0x07D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C3007D" + +# 0x07D: CALL 0x122 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D3B122" + +# 0x07E: JMP 0x01A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E3001A" + +# 0x07F: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F3C000" + +# 0x080: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08003000" + +# 0x081: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08124080" + +# 0x082: XOUT (0x09), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08224090" + +# 0x083: XOUT (0x0A), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "083240A0" + +# 0x084: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0843D000" + +# 0x085: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0853E000" + +# 0x086: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0863C001" + +# 0x087: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0873C002" + +# 0x088: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0883C003" + +# 0x089: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08928081" + +# 0x08A: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A28092" + +# 0x08B: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B280A3" + +# 0x08C: ADD R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C10001" + +# 0x08D: ADDC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D13002" + +# 0x08E: ADDC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E13003" + +# 0x08F: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F24081" + +# 0x090: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09024092" + +# 0x091: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "091240A3" + +# 0x092: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0923D003" + +# 0x093: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0933D002" + +# 0x094: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0943D001" + +# 0x095: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0953E000" + +# 0x096: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09603C00" + +# 0x097: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0973B0CE" + +# 0x098: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "098280A0" + +# 0x099: CALL 0x09F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0993B09F" + +# 0x09A: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A28090" + +# 0x09B: CALL 0x09F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B3B09F" + +# 0x09C: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C28080" + +# 0x09D: CALL 0x09F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D3B09F" + +# 0x09E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E3E000" + +# 0x09F: CALL 0x0AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F3B0AA" + +# 0x0A0: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A03B0E5" + +# 0x0A1: MOV R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A102010" + +# 0x0A2: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A23B0E5" + +# 0x0A3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A33E000" + +# 0x0A4: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A4190F0" + +# 0x0A5: CMP R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A50F0A0" + +# 0x0A6: JLT 0x0A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A6350A8" + +# 0x0A7: ADD R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A711070" + +# 0x0A8: ADD R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A811300" + +# 0x0A9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A93E000" + +# 0x0AA: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AA3C000" + +# 0x0AB: CALL 0x0A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AB3B0A4" + +# 0x0AC: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AC02001" + +# 0x0AD: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AD3D000" + +# 0x0AE: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AE2A000" + +# 0x0AF: CALL 0x0A4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AF3B0A4" + +# 0x0B0: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B03E000" + +# 0x0B1: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B103002" + +# 0x0B2: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B203030" + +# 0x0B3: CALL 0x0FD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B33B0FD" + +# 0x0B4: CALL 0x130 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B43B130" + +# 0x0B5: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B503002" + +# 0x0B6: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B603030" + +# 0x0B7: CALL 0x0FD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B73B0FD" + +# 0x0B8: CALL 0x130 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B83B130" + +# 0x0B9: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B903002" + +# 0x0BA: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BA03020" + +# 0x0BB: CALL 0x0FD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BB3B0FD" + +# 0x0BC: CALL 0x137 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BC3B137" + +# 0x0BD: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BD03280" + +# 0x0BE: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BE3B0CE" + +# 0x0BF: MOV R00, 0x0C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BF030C0" + +# 0x0C0: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C03B0CE" + +# 0x0C1: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C103060" + +# 0x0C2: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C23B0CE" + +# 0x0C3: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C303010" + +# 0x0C4: CALL 0x0CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C43B0CE" + +# 0x0C5: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C53E000" + +# 0x0C6: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C63C000" + +# 0x0C7: CALL 0x0F1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C73B0F1" + +# 0x0C8: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C819800" + +# 0x0C9: JZ 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C9310CC" + +# 0x0CA: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CA3B14E" + +# 0x0CB: JMP 0x0C7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CB300C7" + +# 0x0CC: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CC3D000" + +# 0x0CD: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CD3E000" + +# 0x0CE: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CE3C002" + +# 0x0CF: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CF03002" + +# 0x0D0: CALL 0x0EA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D03B0EA" + +# 0x0D1: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D13D002" + +# 0x0D2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D23E000" + +# 0x0D3: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D33C000" + +# 0x0D4: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D404010" + +# 0x0D5: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D511011" + +# 0x0D6: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D60F000" + +# 0x0D7: JZ 0x0DA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D7310DA" + +# 0x0D8: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D83B0E5" + +# 0x0D9: JMP 0x0D4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D9300D4" + +# 0x0DA: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DA3D000" + +# 0x0DB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DB3E000" + +# 0x0DC: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DC3C000" + +# 0x0DD: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DD09010" + +# 0x0DE: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DE11011" + +# 0x0DF: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DF0F000" + +# 0x0E0: JZ 0x0E3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E0310E3" + +# 0x0E1: CALL 0x0E5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E13B0E5" + +# 0x0E2: JMP 0x0DD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E2300DD" + +# 0x0E3: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E33D000" + +# 0x0E4: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E43E000" + +# 0x0E5: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E53C002" + +# 0x0E6: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E603402" + +# 0x0E7: CALL 0x0EA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E73B0EA" + +# 0x0E8: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E83D002" + +# 0x0E9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E93E000" + +# 0x0EA: CALL 0x0C6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EA3B0C6" + +# 0x0EB: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EB3C000" + +# 0x0EC: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EC2A000" + +# 0x0ED: CALL 0x0FD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0ED3B0FD" + +# 0x0EE: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EE3D000" + +# 0x0EF: CALL 0x0FD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EF3B0FD" + +# 0x0F0: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F03E000" + +# 0x0F1: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F13C002" + +# 0x0F2: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F203002" + +# 0x0F3: CALL 0x0F6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F33B0F6" + +# 0x0F4: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F43D002" + +# 0x0F5: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F53E000" + +# 0x0F6: CALL 0x110 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F63B110" + +# 0x0F7: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F72A000" + +# 0x0F8: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F83C000" + +# 0x0F9: CALL 0x110 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F93B110" + +# 0x0FA: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FA3D002" + +# 0x0FB: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FB1A020" + +# 0x0FC: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FC3E000" + +# 0x0FD: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FD3C001" + +# 0x0FE: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FE190F0" + +# 0x0FF: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FF02001" + +# 0x100: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1001A021" + +# 0x101: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10124031" + +# 0x102: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1023B14E" + +# 0x103: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10302001" + +# 0x104: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1041A021" + +# 0x105: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1051B801" + +# 0x106: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10624031" + +# 0x107: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1073B14E" + +# 0x108: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10802001" + +# 0x109: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1091A021" + +# 0x10A: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10A24031" + +# 0x10B: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10B3B14E" + +# 0x10C: OR R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10C1B201" + +# 0x10D: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10D24031" + +# 0x10E: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10E3D001" + +# 0x10F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10F3E000" + +# 0x110: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1103C001" + +# 0x111: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11103201" + +# 0x112: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1121A021" + +# 0x113: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11324031" + +# 0x114: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1143B14E" + +# 0x115: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11503201" + +# 0x116: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1161A021" + +# 0x117: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1171B801" + +# 0x118: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11824031" + +# 0x119: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1193B14E" + +# 0x11A: XIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11A28030" + +# 0x11B: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11B190F0" + +# 0x11C: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11C03201" + +# 0x11D: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11D1A021" + +# 0x11E: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11E24031" + +# 0x11F: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11F3B14E" + +# 0x120: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1203D001" + +# 0x121: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1213E000" + +# 0x122: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1223C00F" + +# 0x123: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "123030AF" + +# 0x124: CALL 0x129 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1243B129" + +# 0x125: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1251501F" + +# 0x126: JNZ 0x124 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12632124" + +# 0x127: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1273D00F" + +# 0x128: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1283E000" + +# 0x129: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1293C00F" + +# 0x12A: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12A030AF" + +# 0x12B: CALL 0x130 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12B3B130" + +# 0x12C: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12C1501F" + +# 0x12D: JNZ 0x12B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12D3212B" + +# 0x12E: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12E3D00F" + +# 0x12F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12F3E000" + +# 0x130: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1303C00F" + +# 0x131: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "131030AF" + +# 0x132: CALL 0x137 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1323B137" + +# 0x133: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1331501F" + +# 0x134: JNZ 0x132 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13432132" + +# 0x135: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1353D00F" + +# 0x136: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1363E000" + +# 0x137: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1373C00F" + +# 0x138: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "138030AF" + +# 0x139: CALL 0x13E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1393B13E" + +# 0x13A: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13A1501F" + +# 0x13B: JNZ 0x139 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13B32139" + +# 0x13C: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13C3D00F" + +# 0x13D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13D3E000" + +# 0x13E: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13E3C00F" + +# 0x13F: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13F030AF" + +# 0x140: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1403B145" + +# 0x141: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1411501F" + +# 0x142: JNZ 0x140 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14232140" + +# 0x143: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1433D00F" + +# 0x144: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1443E000" + +# 0x145: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1453C00F" + +# 0x146: MOV R15, 0x63 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1460363F" + +# 0x147: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14700000" + +# 0x148: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14800000" + +# 0x149: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14900000" + +# 0x14A: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14A1501F" + +# 0x14B: JNZ 0x147 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14B32147" + +# 0x14C: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14C3D00F" + +# 0x14D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14D3E000" + +# 0x14E: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14E3C00F" + +# 0x14F: MOV R15, 0x09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14F0309F" + +# 0x150: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15000000" + +# 0x151: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15100000" + +# 0x152: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15200000" + +# 0x153: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1531501F" + +# 0x154: JNZ 0x150 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15432150" + +# 0x155: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1553D00F" + +# 0x156: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1563E000" + +# Assembled from sdr_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0053" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0144" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0252" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0341" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "044D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0520" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0654" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0765" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0873" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0974" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B43" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C6C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1069" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "116E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1267" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1320" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1453" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1544" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1652" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1741" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "184D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A57" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F6E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2067" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2120" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2253" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2344" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2452" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2541" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "264D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2852" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2965" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D6E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E67" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3053" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3144" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3252" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3341" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "344D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3656" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3765" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3872" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3969" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A66" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B79" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D4F" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E4B" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4056" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4165" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4272" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4369" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4466" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4579" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4620" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4746" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4861" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4969" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A6C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E2E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/sdr_test_short.jsm b/projects/cpu/asm/sdr_test_short.jsm new file mode 100644 index 0000000..4f748d1 --- /dev/null +++ b/projects/cpu/asm/sdr_test_short.jsm @@ -0,0 +1,215 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +addr_incr: equ 2 +addr_lsb_max: equ 0x08 + +; External RAM/ROM + xmem + org 0x80 +sdram_data: db 8 ; SDRAM data window at X:0x80 + +; Internal RAM + cmem 0 +round: db 1 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp main + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- + org 0x001 + reti + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +main: mov R0, 0x00 + xout (led_port), R0 + xin R0, (ctrl_reg) + and R0, 0xCF + xout (ctrl_reg), R0 + + ; Wait until SDRAM ready +poll_bsy_fin: xin R0, (sdram_reg) + and R0, SDRAM_STAT_BUSY + jnz poll_bsy_fin + + jmp do_clear +; ---------------------------------------------------------- +; SDRAM clear +; ---------------------------------------------------------- +do_clear: + ; Set SDRAM address register to 0 + call AddrCnt_Init + + ; Fill SDR Buffer with zeros + mov R0, sdram_data + mov R15, 8 +buf_clr_loop: movx (R0), 0 + inc R0 + dec R15 + jnz buf_clr_loop + +sdr_clear: xin R0, (sdram_addr+0) + cmp R0, addr_lsb_max + jeq clear_finished + + ; Wait finished last write +poll_clear_fin: xin R0, (sdram_reg) + and R0, SDRAM_STAT_WRITE_BUSY + jnz poll_clear_fin + + ; Start SDR write + mov R0, sdram_reg + xout (R0), SDRAM_CTRL_WRITE_REQUEST + + ; Advance address counter + mov R0, addr_incr + call AddrCnt_Adv + + jmp sdr_clear + +clear_finished: + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +do_write: + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_write: xin R0, (sdram_addr+0) + cmp R0, addr_lsb_max + jeq write_finished + + ; Fill SDR Buffer + movc R1, (round) +force_no_err: mov R0, sdram_data + mov R15, 8 +write_loop: movx (R0), R1 + inc R0 + inc R1 + dec R15 + jnz write_loop + + ; Wait finished last write +poll_write_fin: xin R0, (sdram_reg) + and R0, SDRAM_STAT_WRITE_BUSY + jnz poll_write_fin + + nop + + ; Start SDR write + mov R0, sdram_reg + xout (R0), SDRAM_CTRL_WRITE_REQUEST + + ; Advance address counter + mov R0, addr_incr + call AddrCnt_Adv + movc R0, (round) + inc R0 + movc (round), R0 + + jmp sdr_write + +write_finished: + +; ---------------------------------------------------------- +; SDRAM Verify +; ---------------------------------------------------------- +do_read: + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_read: xin R0, (sdram_addr+0) + cmp R0, addr_lsb_max + jeq read_finished + + ; Start SDR read + mov R0, sdram_reg + xout (R0), SDRAM_CTRL_READ_REQUEST + + ; Wait last read +poll_read_fin: xin R0, (sdram_reg) + and R0, SDRAM_STAT_READ_BUSY + jnz poll_read_fin + +read_back_mem: + ; Verify SDR Buffer + movc R1, (round) + mov R0, sdram_data + mov R15, 8 +read_loop: movx R2, (R0) + cmp R2, R1 + jne verify_error + inc R0 + inc R1 + dec R15 + jnz read_loop + + ; Advance address counter + mov R0, addr_incr + call AddrCnt_Adv + movc R0, (round) + inc R0 + movc (round), R0 + jmp sdr_read + +; ---------------------------------------------------------- +read_finished: +no_error: jmp ende + +verify_error: xin R0, (ctrl_reg) + or R0, 0x10 + xout (ctrl_reg), R0 + jmp ende + +ende: jmp ende + +; ------------------------------------------------- +AddrCnt_Init: push R0 + mov R0, 0x00 + xout (sdram_addr+0), R0 + xout (sdram_addr+1), R0 + xout (sdram_addr+2), R0 + pop R0 + ret + +; ------------------------------------------------- +; Parameter +; R0: increment value +AddrCnt_Adv: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + add R1, R0 + addc R2, 0 + addc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- + \ No newline at end of file diff --git a/projects/cpu/asm/sdr_test_short.tcl b/projects/cpu/asm/sdr_test_short.tcl new file mode 100644 index 0000000..b5dd735 --- /dev/null +++ b/projects/cpu/asm/sdr_test_short.tcl @@ -0,0 +1,542 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG +# +# Copyright (C) 2007 J. Ahrensfeld +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# For questions and ideas, please contact the author at jens@jayfield.org +# +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from sdr_test_short.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x002 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030002" + +# 0x001: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013F000" + +# 0x002: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00203000" + +# 0x003: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00324010" + +# 0x004: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00428040" + +# 0x005: AND R00, 0xCF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00519CF0" + +# 0x006: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00624040" + +# 0x007: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00728070" + +# 0x008: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00819800" + +# 0x009: JNZ 0x007 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00932007" + +# 0x00A: JMP 0x00B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A3000B" + +# 0x00B: CALL 0x058 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B3B058" + +# 0x00C: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C03800" + +# 0x00D: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D0308F" + +# 0x00E: MOVX (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E07000" + +# 0x00F: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F11010" + +# 0x010: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0101501F" + +# 0x011: JNZ 0x00E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0113200E" + +# 0x012: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01228080" + +# 0x013: CMP R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0130F080" + +# 0x014: JEQ 0x01D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0143901D" + +# 0x015: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01528070" + +# 0x016: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01619020" + +# 0x017: JNZ 0x015 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01732015" + +# 0x018: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01803070" + +# 0x019: XOUT (R00), 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01925020" + +# 0x01A: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A03020" + +# 0x01B: CALL 0x05F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B3B05F" + +# 0x01C: JMP 0x012 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C30012" + +# 0x01D: CALL 0x058 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D3B058" + +# 0x01E: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E03000" + +# 0x01F: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F0D000" + +# 0x020: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02028080" + +# 0x021: CMP R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0210F080" + +# 0x022: JEQ 0x037 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02239037" + +# 0x023: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0230A001" + +# 0x024: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02403800" + +# 0x025: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0250308F" + +# 0x026: MOVX (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02606001" + +# 0x027: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02711010" + +# 0x028: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02811011" + +# 0x029: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0291501F" + +# 0x02A: JNZ 0x026 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A32026" + +# 0x02B: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B28070" + +# 0x02C: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C19020" + +# 0x02D: JNZ 0x02B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D3202B" + +# 0x02E: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E00000" + +# 0x02F: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F03070" + +# 0x030: XOUT (R00), 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03025020" + +# 0x031: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03103020" + +# 0x032: CALL 0x05F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0323B05F" + +# 0x033: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0330A000" + +# 0x034: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03411010" + +# 0x035: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0350D000" + +# 0x036: JMP 0x020 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03630020" + +# 0x037: CALL 0x058 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0373B058" + +# 0x038: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03803000" + +# 0x039: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0390D000" + +# 0x03A: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A28080" + +# 0x03B: CMP R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B0F080" + +# 0x03C: JEQ 0x052 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C39052" + +# 0x03D: MOV R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D03070" + +# 0x03E: XOUT (R00), 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E25010" + +# 0x03F: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F28070" + +# 0x040: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04019010" + +# 0x041: JNZ 0x03F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0413203F" + +# 0x042: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0420A001" + +# 0x043: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04303800" + +# 0x044: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0440308F" + +# 0x045: MOVX R02, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04504002" + +# 0x046: CMP R02, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0460E012" + +# 0x047: JNE 0x053 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0473A053" + +# 0x048: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04811010" + +# 0x049: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04911011" + +# 0x04A: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A1501F" + +# 0x04B: JNZ 0x045 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B32045" + +# 0x04C: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C03020" + +# 0x04D: CALL 0x05F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D3B05F" + +# 0x04E: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E0A000" + +# 0x04F: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F11010" + +# 0x050: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0500D000" + +# 0x051: JMP 0x03A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0513003A" + +# 0x052: JMP 0x057 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05230057" + +# 0x053: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05328040" + +# 0x054: OR R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0541B100" + +# 0x055: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05524040" + +# 0x056: JMP 0x057 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05630057" + +# 0x057: JMP 0x057 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05730057" + +# 0x058: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0583C000" + +# 0x059: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05903000" + +# 0x05A: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A24080" + +# 0x05B: XOUT (0x09), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B24090" + +# 0x05C: XOUT (0x0A), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C240A0" + +# 0x05D: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D3D000" + +# 0x05E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E3E000" + +# 0x05F: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F3C001" + +# 0x060: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0603C002" + +# 0x061: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0613C003" + +# 0x062: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06228081" + +# 0x063: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06328092" + +# 0x064: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "064280A3" + +# 0x065: ADD R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06510001" + +# 0x066: ADDC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06613002" + +# 0x067: ADDC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06713003" + +# 0x068: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06824081" + +# 0x069: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06924092" + +# 0x06A: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A240A3" + +# 0x06B: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B3D003" + +# 0x06C: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C3D002" + +# 0x06D: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D3D001" + +# 0x06E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E3E000" + +# Assembled from sdr_test_short.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/sdr_tst.tcl b/projects/cpu/asm/sdr_tst.tcl new file mode 100644 index 0000000..6507e94 --- /dev/null +++ b/projects/cpu/asm/sdr_tst.tcl @@ -0,0 +1,62 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/sdram_test.jsm b/projects/cpu/asm/sdram_test.jsm new file mode 100644 index 0000000..8f05ae0 --- /dev/null +++ b/projects/cpu/asm/sdram_test.jsm @@ -0,0 +1,472 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +BURST_LEN: equ 8 +SD_CMD_WRITE: equ 0x06 +SD_CMD_READ: equ 0x05 +addr_msb_max: equ 0xFF + +; External RAM/ROM + xmem +crlf: dc 13, 10, 0 +greet_txt: dc "SDRAM Test", 0 +msg_txt0: dc "Clearing SDRAM", 0 +msg_txt1: dc "Writing SDRAM", 0 +msg_txt2: dc "Reading SDRAM", 0 +verify_ok: dc "Verify OK", 0 +verify_nok: dc "Failed at ", 0 +dot: dc ".", 0 + + org 0x80 +sdram_data: db 8 ; SDRAM data window at X:0x80 + +; Internal RAM + cmem 0 +round: db 1 +bmp_offset: db 4 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp main + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- + org 0x001 + push R0 + xin R0, (ctrl_reg) + or R0, 0x10 + xout (ctrl_reg), R0 + pop R0 + reti + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +main: + call LCD_init + mov R0, 0x00 + xout (led_port), R0 + + mov R0, CTRL_VGA_ENABLE + xout (ctrl_reg), R0 + + + cin R0, (cpu_int_ctrl) + or R0, 0x05 + cout (cpu_int_ctrl), R0 + + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + mov R0, 0 + mov R1, 0xC0 + xout (reg_color_red), R1 + xout (reg_color_grn), R1 + xout (reg_color_blu), R1 + + call cg_wait_rdy + call cg_clr_screen + + ; Print greeting message + mov R1, greet_txt + call LCD_putsx + + mov R1, greet_txt + call cg_puts + mov R1, crlf + call cg_puts_clr + + xin R0, (ctrl_reg) + or R0, 0x10 + xout (ctrl_reg), R0 + call delay100ms + or R0, 0x20 + xout (ctrl_reg), R0 + call delay100ms + and R0, 0xEF + xout (ctrl_reg), R0 + call delay100ms + and R0, 0xCF + xout (ctrl_reg), R0 + +; ---------------------------------------------------------- +; SDRAM clear +; ---------------------------------------------------------- +do_clear: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Clear message + mov R1, msg_txt0 + call LCD_putsx + + mov R1, msg_txt0 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + call AddrCnt_Init + + ; Fill SDR Buffer with zeros + mov R0, sdram_data + mov R15, 8 +buf_clr_loop: movx (R0), 0 + inc R0 + dec R15 + jnz buf_clr_loop + +sdr_clear: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq clear_finished + + mov R2, BURST_LEN + +poll_clear_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_clear_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + sub R2, 2 + jnz poll_clear_full + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + ; Advance address counter + mov R0, BURST_LEN + call AddrCnt_Adv + + jmp sdr_clear + +clear_finished: + call AddrCnt_Disp + call delay1s + jmp do_write + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +do_write: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Write message + mov R1, msg_txt1 + call LCD_putsx + + mov R1, msg_txt1 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_write: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq write_finished + + mov R2, BURST_LEN + + ; Fill SDR Buffer +sdr_burst_wr: movc R1, (round) +; xin R0, (sdram_addr+2) +; cmp R0, 0x7F +; jne force_no_err +; inc R1 +force_no_err: mov R0, sdram_data + mov R15, 8 +write_loop: movx (R0), R1 + inc R0 + inc R1 + dec R15 + jnz write_loop + +poll_write_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_write_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + movc R0, (round) + inc R0 + movc (round), R0 + + sub R2, 2 + jnz sdr_burst_wr + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + ; Advance address counter + mov R0, BURST_LEN + call AddrCnt_Adv + + jmp sdr_write + +write_finished: call AddrCnt_Disp + call delay1s + +; ---------------------------------------------------------- +; SDRAM Verify +; ---------------------------------------------------------- +do_read: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Read message + mov R1, msg_txt2 + call LCD_putsx + + mov R1, msg_txt2 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_read: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq read_finished + + ; Start SDR read + call wait_cmd_rdy + mov R0, SD_CMD_READ + xout (sdram_reg), R0 + +; mov R0, LCD_CMD_Z1 +; call LCD_writecmd +; call print_addr +; mov R0, LCD_CMD_Z2 +; call LCD_writecmd +; call print_data + + mov R3, BURST_LEN + + ; Wait last read +poll_read_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_READ_DATA_EMPTY + jnz poll_read_fin + + ; Verify SDR Buffer + movc R1, (round) + mov R0, sdram_data + mov R15, 8 +read_loop: movx R2, (R0) + cmp R2, R1 + jne verify_error + inc R0 + inc R1 + dec R15 + jnz read_loop + + ; Advance Read-FIFO + mov R0, FIFO_CTRL_IS_READ + xout (sdram_reg), R0 + + movc R0, (round) + inc R0 + movc (round), R0 + + sub R3, 2 + jnz poll_read_fin + + ; Advance address counter + mov R0, BURST_LEN + call AddrCnt_Adv + jmp sdr_read + +; ---------------------------------------------------------- +sd_request: push R0 + mov R0, SDRAM_CTRL_REQUEST + xout (sdram_reg), R0 +wait4grant: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, SDRAM_STAT_ACCESS + jz wait4grant + pop R0 + ret + +; ---------------------------------------------------------- +wait_cmd_rdy: call sd_request + push R0 +wait4cmd: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_CMD_FULL + jnz wait4cmd + pop R0 + ret + +; ---------------------------------------------------------- +read_finished: +no_error: mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, verify_ok + call LCD_putsx + mov R0, LCD_CMD_Z2 + call LCD_writecmd + call print_addr + + mov R1, verify_ok + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + jmp ende + +verify_error: mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, verify_nok + call LCD_putsx + call print_addr + call print_data + mov R1, verify_nok + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + jmp ende + +ende: call delay1s + jmp do_clear + +; ------------------------------------------------- +AddrCnt_Init: push R0 + mov R0, 0x00 + xout (sdram_addr+0), R0 + xout (sdram_addr+1), R0 + xout (sdram_addr+2), R0 + pop R0 + ret + +; ------------------------------------------------- +; Parameter +; R0: increment value +AddrCnt_Adv: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + add R1, R0 + addc R2, 0 + addc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Display Address counter +AddrCnt_Disp: mov R0, LCD_CMD_Z2 + call LCD_writecmd + call print_addr + ret + +; ------------------------------------------------- +; PutHexByte +; R0 : Byte value +PutHexByte: push R1 + call bin2hex + call LCD_writechar + mov R0, R1 + call LCD_writechar + pop R1 + ret + +; ------------------------------------------------- +print_addr: push R0 + xin R0, (sdram_addr+2) + call PutHexByte + xin R0, (sdram_addr+1) + call PutHexByte + xin R0, (sdram_addr+0) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +; R1 : ptr to byte array +print_dword: push R0 + add R1, 3 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +print_data: push R0 + mov R0, LCD_CMD_Z2 + call LCD_writecmd + movx R0, (sdram_data+7) + call PutHexByte + movx R0, (sdram_data+6) + call PutHexByte + movx R0, (sdram_data+5) + call PutHexByte + movx R0, (sdram_data+4) + call PutHexByte + movx R0, (sdram_data+3) + call PutHexByte + movx R0, (sdram_data+2) + call PutHexByte + movx R0, (sdram_data+1) + call PutHexByte + movx R0, (sdram_data+0) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +include "../../../lib/jasm/utils.inc.jsm" +include "../../../lib/jasm/lcd.inc.jsm" +include "../../../lib/jasm/cg.inc.jsm" +include "../../../lib/jasm/delays.inc.jsm" +include "../../../lib/jasm/uart.inc.jsm" + \ No newline at end of file diff --git a/projects/cpu/asm/sdram_test.tcl b/projects/cpu/asm/sdram_test.tcl new file mode 100644 index 0000000..c48bae3 --- /dev/null +++ b/projects/cpu/asm/sdram_test.tcl @@ -0,0 +1,1751 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG +# +# Copyright (C) 2007 J. Ahrensfeld +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# For questions and ideas, please contact the author at jens@jayfield.org +# +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from sdram_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x007 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030007" + +# 0x001: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013C000" + +# 0x002: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00228040" + +# 0x003: OR R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0031B100" + +# 0x004: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00424040" + +# 0x005: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0053D000" + +# 0x006: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0063F000" + +# 0x007: CALL 0x128 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0073B128" + +# 0x008: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00803000" + +# 0x009: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00924010" + +# 0x00A: MOV R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A03040" + +# 0x00B: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B24040" + +# 0x00C: CIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C29030" + +# 0x00D: OR R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D1B050" + +# 0x00E: COUT (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E26030" + +# 0x00F: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F03010" + +# 0x010: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103B145" + +# 0x011: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01103000" + +# 0x012: MOV R01, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01203C01" + +# 0x013: XOUT (0x10), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01324101" + +# 0x014: XOUT (0x11), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01424111" + +# 0x015: XOUT (0x12), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01524121" + +# 0x016: CALL 0x1B9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0163B1B9" + +# 0x017: CALL 0x19E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0173B19E" + +# 0x018: MOV R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01803031" + +# 0x019: CALL 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0193B14A" + +# 0x01A: MOV R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A03031" + +# 0x01B: CALL 0x1AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B3B1AA" + +# 0x01C: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C03001" + +# 0x01D: CALL 0x1B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D3B1B6" + +# 0x01E: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E28040" + +# 0x01F: OR R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F1B100" + +# 0x020: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02024040" + +# 0x021: CALL 0x1C6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0213B1C6" + +# 0x022: OR R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0221B200" + +# 0x023: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02324040" + +# 0x024: CALL 0x1C6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0243B1C6" + +# 0x025: AND R00, 0xEF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02519EF0" + +# 0x026: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02624040" + +# 0x027: CALL 0x1C6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0273B1C6" + +# 0x028: AND R00, 0xCF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02819CF0" + +# 0x029: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02924040" + +# 0x02A: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A03010" + +# 0x02B: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B3B145" + +# 0x02C: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C030E1" + +# 0x02D: CALL 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D3B14A" + +# 0x02E: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E030E1" + +# 0x02F: CALL 0x1B3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F3B1B3" + +# 0x030: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03003001" + +# 0x031: CALL 0x1B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0313B1B6" + +# 0x032: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0323B0CC" + +# 0x033: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03303800" + +# 0x034: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0340308F" + +# 0x035: MOVX (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03507000" + +# 0x036: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03611010" + +# 0x037: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0371501F" + +# 0x038: JNZ 0x035 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03832035" + +# 0x039: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "039280A0" + +# 0x03A: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A0FFF0" + +# 0x03B: JEQ 0x04B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B3904B" + +# 0x03C: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C03082" + +# 0x03D: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D28070" + +# 0x03E: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E24010" + +# 0x03F: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F19040" + +# 0x040: JNZ 0x03D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0403203D" + +# 0x041: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04103100" + +# 0x042: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04224070" + +# 0x043: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04315022" + +# 0x044: JNZ 0x03D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0443203D" + +# 0x045: CALL 0x0AB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0453B0AB" + +# 0x046: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04603060" + +# 0x047: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04724070" + +# 0x048: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04803080" + +# 0x049: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0493B0D3" + +# 0x04A: JMP 0x039 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A30039" + +# 0x04B: CALL 0x0E3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B3B0E3" + +# 0x04C: CALL 0x1BF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C3B1BF" + +# 0x04D: JMP 0x04E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D3004E" + +# 0x04E: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E03010" + +# 0x04F: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F3B145" + +# 0x050: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "050031D1" + +# 0x051: CALL 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0513B14A" + +# 0x052: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "052031D1" + +# 0x053: CALL 0x1B3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0533B1B3" + +# 0x054: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05403001" + +# 0x055: CALL 0x1B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0553B1B6" + +# 0x056: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0563B0CC" + +# 0x057: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05703000" + +# 0x058: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0580D000" + +# 0x059: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "059280A0" + +# 0x05A: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A0FFF0" + +# 0x05B: JEQ 0x076 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B39076" + +# 0x05C: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C03082" + +# 0x05D: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D0A001" + +# 0x05E: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E03800" + +# 0x05F: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F0308F" + +# 0x060: MOVX (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06006001" + +# 0x061: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06111010" + +# 0x062: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06211011" + +# 0x063: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0631501F" + +# 0x064: JNZ 0x060 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06432060" + +# 0x065: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06528070" + +# 0x066: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06624010" + +# 0x067: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06719040" + +# 0x068: JNZ 0x065 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06832065" + +# 0x069: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06903100" + +# 0x06A: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A24070" + +# 0x06B: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B0A000" + +# 0x06C: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C11010" + +# 0x06D: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D0D000" + +# 0x06E: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E15022" + +# 0x06F: JNZ 0x05D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F3205D" + +# 0x070: CALL 0x0AB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0703B0AB" + +# 0x071: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07103060" + +# 0x072: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07224070" + +# 0x073: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07303080" + +# 0x074: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0743B0D3" + +# 0x075: JMP 0x059 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07530059" + +# 0x076: CALL 0x0E3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0763B0E3" + +# 0x077: CALL 0x1BF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0773B1BF" + +# 0x078: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07803010" + +# 0x079: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0793B145" + +# 0x07A: MOV R01, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A032B1" + +# 0x07B: CALL 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B3B14A" + +# 0x07C: MOV R01, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C032B1" + +# 0x07D: CALL 0x1B3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D3B1B3" + +# 0x07E: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E03001" + +# 0x07F: CALL 0x1B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F3B1B6" + +# 0x080: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0803B0CC" + +# 0x081: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08103000" + +# 0x082: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0820D000" + +# 0x083: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "083280A0" + +# 0x084: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0840FFF0" + +# 0x085: JEQ 0x0B3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "085390B3" + +# 0x086: CALL 0x0AB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0863B0AB" + +# 0x087: MOV R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08703050" + +# 0x088: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08824070" + +# 0x089: MOV R03, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08903083" + +# 0x08A: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A28070" + +# 0x08B: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B24010" + +# 0x08C: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C19200" + +# 0x08D: JNZ 0x08A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D3208A" + +# 0x08E: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E0A001" + +# 0x08F: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F03800" + +# 0x090: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0900308F" + +# 0x091: MOVX R02, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09104002" + +# 0x092: CMP R02, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0920E012" + +# 0x093: JNE 0x0BF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0933A0BF" + +# 0x094: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09411010" + +# 0x095: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09511011" + +# 0x096: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0961501F" + +# 0x097: JNZ 0x091 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09732091" + +# 0x098: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09803200" + +# 0x099: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09924070" + +# 0x09A: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A0A000" + +# 0x09B: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B11010" + +# 0x09C: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C0D000" + +# 0x09D: SUB R03, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D15023" + +# 0x09E: JNZ 0x08A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E3208A" + +# 0x09F: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F03080" + +# 0x0A0: CALL 0x0D3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A03B0D3" + +# 0x0A1: JMP 0x083 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A130083" + +# 0x0A2: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A23C000" + +# 0x0A3: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A303800" + +# 0x0A4: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A424070" + +# 0x0A5: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A528070" + +# 0x0A6: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A624010" + +# 0x0A7: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A719800" + +# 0x0A8: JZ 0x0A5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A8310A5" + +# 0x0A9: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A93D000" + +# 0x0AA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AA3E000" + +# 0x0AB: CALL 0x0A2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AB3B0A2" + +# 0x0AC: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AC3C000" + +# 0x0AD: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AD28070" + +# 0x0AE: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AE24010" + +# 0x0AF: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AF19010" + +# 0x0B0: JNZ 0x0AD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B0320AD" + +# 0x0B1: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B13D000" + +# 0x0B2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B23E000" + +# 0x0B3: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B303010" + +# 0x0B4: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B43B145" + +# 0x0B5: MOV R01, 0x39 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B503391" + +# 0x0B6: CALL 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B63B14A" + +# 0x0B7: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B703C00" + +# 0x0B8: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B83B145" + +# 0x0B9: CALL 0x0EE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B93B0EE" + +# 0x0BA: MOV R01, 0x39 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BA03391" + +# 0x0BB: CALL 0x1B3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BB3B1B3" + +# 0x0BC: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BC03001" + +# 0x0BD: CALL 0x1B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BD3B1B6" + +# 0x0BE: JMP 0x0CA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BE300CA" + +# 0x0BF: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BF03010" + +# 0x0C0: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C03B145" + +# 0x0C1: MOV R01, 0x43 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C103431" + +# 0x0C2: CALL 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C23B14A" + +# 0x0C3: CALL 0x0EE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C33B0EE" + +# 0x0C4: CALL 0x106 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C43B106" + +# 0x0C5: MOV R01, 0x43 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C503431" + +# 0x0C6: CALL 0x1B3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C63B1B3" + +# 0x0C7: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C703001" + +# 0x0C8: CALL 0x1B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C83B1B6" + +# 0x0C9: JMP 0x0CA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C9300CA" + +# 0x0CA: CALL 0x1BF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CA3B1BF" + +# 0x0CB: JMP 0x02A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CB3002A" + +# 0x0CC: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CC3C000" + +# 0x0CD: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CD03000" + +# 0x0CE: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CE24080" + +# 0x0CF: XOUT (0x09), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CF24090" + +# 0x0D0: XOUT (0x0A), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D0240A0" + +# 0x0D1: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D13D000" + +# 0x0D2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D23E000" + +# 0x0D3: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D33C001" + +# 0x0D4: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D43C002" + +# 0x0D5: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D53C003" + +# 0x0D6: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D628081" + +# 0x0D7: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D728092" + +# 0x0D8: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D8280A3" + +# 0x0D9: ADD R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D910001" + +# 0x0DA: ADDC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DA13002" + +# 0x0DB: ADDC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DB13003" + +# 0x0DC: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DC24081" + +# 0x0DD: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DD24092" + +# 0x0DE: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DE240A3" + +# 0x0DF: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DF3D003" + +# 0x0E0: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E03D002" + +# 0x0E1: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E13D001" + +# 0x0E2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E23E000" + +# 0x0E3: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E303C00" + +# 0x0E4: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E43B145" + +# 0x0E5: CALL 0x0EE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E53B0EE" + +# 0x0E6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E63E000" + +# 0x0E7: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E73C001" + +# 0x0E8: CALL 0x121 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E83B121" + +# 0x0E9: CALL 0x15C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E93B15C" + +# 0x0EA: MOV R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EA02010" + +# 0x0EB: CALL 0x15C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EB3B15C" + +# 0x0EC: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EC3D001" + +# 0x0ED: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0ED3E000" + +# 0x0EE: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EE3C000" + +# 0x0EF: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EF280A0" + +# 0x0F0: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F03B0E7" + +# 0x0F1: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F128090" + +# 0x0F2: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F23B0E7" + +# 0x0F3: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F328080" + +# 0x0F4: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F43B0E7" + +# 0x0F5: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F53D000" + +# 0x0F6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F63E000" + +# 0x0F7: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F73C000" + +# 0x0F8: ADD R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F811031" + +# 0x0F9: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F909010" + +# 0x0FA: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FA3B0E7" + +# 0x0FB: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FB15011" + +# 0x0FC: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FC09010" + +# 0x0FD: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FD3B0E7" + +# 0x0FE: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FE15011" + +# 0x0FF: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FF09010" + +# 0x100: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1003B0E7" + +# 0x101: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10115011" + +# 0x102: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10209010" + +# 0x103: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1033B0E7" + +# 0x104: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1043D000" + +# 0x105: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1053E000" + +# 0x106: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1063C000" + +# 0x107: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10703C00" + +# 0x108: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1083B145" + +# 0x109: MOVX R00, (0x87) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10905870" + +# 0x10A: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10A3B0E7" + +# 0x10B: MOVX R00, (0x86) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10B05860" + +# 0x10C: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10C3B0E7" + +# 0x10D: MOVX R00, (0x85) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10D05850" + +# 0x10E: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10E3B0E7" + +# 0x10F: MOVX R00, (0x84) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10F05840" + +# 0x110: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1103B0E7" + +# 0x111: MOVX R00, (0x83) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11105830" + +# 0x112: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1123B0E7" + +# 0x113: MOVX R00, (0x82) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11305820" + +# 0x114: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1143B0E7" + +# 0x115: MOVX R00, (0x81) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11505810" + +# 0x116: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1163B0E7" + +# 0x117: MOVX R00, (0x80) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11705800" + +# 0x118: CALL 0x0E7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1183B0E7" + +# 0x119: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1193D000" + +# 0x11A: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11A3E000" + +# 0x11B: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11B190F0" + +# 0x11C: CMP R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11C0F0A0" + +# 0x11D: JLT 0x11F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11D3511F" + +# 0x11E: ADD R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11E11070" + +# 0x11F: ADD R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11F11300" + +# 0x120: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1203E000" + +# 0x121: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1213C000" + +# 0x122: CALL 0x11B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1223B11B" + +# 0x123: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12302001" + +# 0x124: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1243D000" + +# 0x125: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1252A000" + +# 0x126: CALL 0x11B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1263B11B" + +# 0x127: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1273E000" + +# 0x128: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12803002" + +# 0x129: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12903030" + +# 0x12A: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12A3B174" + +# 0x12B: CALL 0x1CD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12B3B1CD" + +# 0x12C: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12C03002" + +# 0x12D: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12D03030" + +# 0x12E: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12E3B174" + +# 0x12F: CALL 0x1CD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12F3B1CD" + +# 0x130: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13003002" + +# 0x131: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13103020" + +# 0x132: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1323B174" + +# 0x133: CALL 0x1D4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1333B1D4" + +# 0x134: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13403280" + +# 0x135: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1353B145" + +# 0x136: MOV R00, 0x0C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "136030C0" + +# 0x137: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1373B145" + +# 0x138: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13803060" + +# 0x139: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1393B145" + +# 0x13A: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13A03010" + +# 0x13B: CALL 0x145 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13B3B145" + +# 0x13C: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13C3E000" + +# 0x13D: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13D3C000" + +# 0x13E: CALL 0x168 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13E3B168" + +# 0x13F: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13F19800" + +# 0x140: JZ 0x143 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14031143" + +# 0x141: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1413B1EB" + +# 0x142: JMP 0x13E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1423013E" + +# 0x143: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1433D000" + +# 0x144: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1443E000" + +# 0x145: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1453C002" + +# 0x146: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14603002" + +# 0x147: CALL 0x161 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1473B161" + +# 0x148: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1483D002" + +# 0x149: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1493E000" + +# 0x14A: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14A3C000" + +# 0x14B: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14B04010" + +# 0x14C: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14C11011" + +# 0x14D: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14D0F000" + +# 0x14E: JZ 0x151 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14E31151" + +# 0x14F: CALL 0x15C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14F3B15C" + +# 0x150: JMP 0x14B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1503014B" + +# 0x151: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1513D000" + +# 0x152: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1523E000" + +# 0x153: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1533C000" + +# 0x154: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15409010" + +# 0x155: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15511011" + +# 0x156: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1560F000" + +# 0x157: JZ 0x15A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1573115A" + +# 0x158: CALL 0x15C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1583B15C" + +# 0x159: JMP 0x154 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15930154" + +# 0x15A: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15A3D000" + +# 0x15B: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15B3E000" + +# 0x15C: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15C3C002" + +# 0x15D: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15D03402" + +# 0x15E: CALL 0x161 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15E3B161" + +# 0x15F: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15F3D002" + +# 0x160: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1603E000" + +# 0x161: CALL 0x13D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1613B13D" + +# 0x162: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1623C000" + +# 0x163: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1632A000" + +# 0x164: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1643B174" + +# 0x165: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1653D000" + +# 0x166: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1663B174" + +# 0x167: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1673E000" + +# 0x168: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1683C002" + +# 0x169: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16903002" + +# 0x16A: CALL 0x16D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16A3B16D" + +# 0x16B: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16B3D002" + +# 0x16C: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16C3E000" + +# 0x16D: CALL 0x187 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16D3B187" + +# 0x16E: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16E2A000" + +# 0x16F: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16F3C000" + +# 0x170: CALL 0x187 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1703B187" + +# 0x171: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1713D002" + +# 0x172: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1721A020" + +# 0x173: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1733E000" + +# 0x174: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1743C001" + +# 0x175: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "175190F0" + +# 0x176: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17602001" + +# 0x177: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1771A021" + +# 0x178: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17824031" + +# 0x179: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1793B1EB" + +# 0x17A: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17A02001" + +# 0x17B: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17B1A021" + +# 0x17C: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17C1B801" + +# 0x17D: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17D24031" + +# 0x17E: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17E3B1EB" + +# 0x17F: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17F02001" + +# 0x180: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1801A021" + +# 0x181: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18124031" + +# 0x182: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1823B1EB" + +# 0x183: OR R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1831B201" + +# 0x184: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18424031" + +# 0x185: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1853D001" + +# 0x186: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1863E000" + +# 0x187: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1873C001" + +# 0x188: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18803201" + +# 0x189: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1891A021" + +# 0x18A: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18A24031" + +# 0x18B: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18B3B1EB" + +# 0x18C: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18C03201" + +# 0x18D: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18D1A021" + +# 0x18E: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18E1B801" + +# 0x18F: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18F24031" + +# 0x190: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1903B1EB" + +# 0x191: XIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19128030" + +# 0x192: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "192190F0" + +# 0x193: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19303201" + +# 0x194: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1941A021" + +# 0x195: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19524031" + +# 0x196: CALL 0x1EB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1963B1EB" + +# 0x197: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1973D001" + +# 0x198: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1983E000" + +# 0x199: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1993C000" + +# 0x19A: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19A03020" + +# 0x19B: XOUT (0x0E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19B240E0" + +# 0x19C: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19C3D000" + +# 0x19D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19D3E000" + +# 0x19E: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19E3C000" + +# 0x19F: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19F03010" + +# 0x1A0: XOUT (0x0E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A0240E0" + +# 0x1A1: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A13D000" + +# 0x1A2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A23E000" + +# 0x1A3: CALL 0x1B9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A33B1B9" + +# 0x1A4: XOUT (0x0C), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A4240C1" + +# 0x1A5: XOUT (0x0B), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A5240B0" + +# 0x1A6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A63E000" + +# 0x1A7: CALL 0x1B9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A73B1B9" + +# 0x1A8: XOUT (0x0D), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A8240D0" + +# 0x1A9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A93E000" + +# 0x1AA: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AA3C000" + +# 0x1AB: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AB04010" + +# 0x1AC: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AC11011" + +# 0x1AD: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AD0F000" + +# 0x1AE: JZ 0x1B1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AE311B1" + +# 0x1AF: CALL 0x1A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AF3B1A7" + +# 0x1B0: JMP 0x1AB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B0301AB" + +# 0x1B1: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B13D000" + +# 0x1B2: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B23E000" + +# 0x1B3: CALL 0x199 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B33B199" + +# 0x1B4: CALL 0x1AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B43B1AA" + +# 0x1B5: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B53E000" + +# 0x1B6: CALL 0x1AA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B63B1AA" + +# 0x1B7: CALL 0x199 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B73B199" + +# 0x1B8: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B83E000" + +# 0x1B9: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B93C000" + +# 0x1BA: XIN R00, (0x0E) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BA280E0" + +# 0x1BB: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BB19020" + +# 0x1BC: JZ 0x1BA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BC311BA" + +# 0x1BD: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BD3D000" + +# 0x1BE: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BE3E000" + +# 0x1BF: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BF3C00F" + +# 0x1C0: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C0030AF" + +# 0x1C1: CALL 0x1C6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C13B1C6" + +# 0x1C2: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C21501F" + +# 0x1C3: JNZ 0x1C1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C3321C1" + +# 0x1C4: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C43D00F" + +# 0x1C5: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C53E000" + +# 0x1C6: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C63C00F" + +# 0x1C7: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C7030AF" + +# 0x1C8: CALL 0x1CD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C83B1CD" + +# 0x1C9: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C91501F" + +# 0x1CA: JNZ 0x1C8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CA321C8" + +# 0x1CB: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CB3D00F" + +# 0x1CC: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CC3E000" + +# 0x1CD: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CD3C00F" + +# 0x1CE: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CE030AF" + +# 0x1CF: CALL 0x1D4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CF3B1D4" + +# 0x1D0: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D01501F" + +# 0x1D1: JNZ 0x1CF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D1321CF" + +# 0x1D2: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D23D00F" + +# 0x1D3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D33E000" + +# 0x1D4: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D43C00F" + +# 0x1D5: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D5030AF" + +# 0x1D6: CALL 0x1DB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D63B1DB" + +# 0x1D7: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D71501F" + +# 0x1D8: JNZ 0x1D6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D8321D6" + +# 0x1D9: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D93D00F" + +# 0x1DA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DA3E000" + +# 0x1DB: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DB3C00F" + +# 0x1DC: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DC030AF" + +# 0x1DD: CALL 0x1E2 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DD3B1E2" + +# 0x1DE: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DE1501F" + +# 0x1DF: JNZ 0x1DD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DF321DD" + +# 0x1E0: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E03D00F" + +# 0x1E1: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E13E000" + +# 0x1E2: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E23C00F" + +# 0x1E3: MOV R15, 0x63 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E30363F" + +# 0x1E4: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E400000" + +# 0x1E5: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E500000" + +# 0x1E6: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E600000" + +# 0x1E7: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E71501F" + +# 0x1E8: JNZ 0x1E4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E8321E4" + +# 0x1E9: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E93D00F" + +# 0x1EA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EA3E000" + +# 0x1EB: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EB3C00F" + +# 0x1EC: MOV R15, 0x09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EC0309F" + +# 0x1ED: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1ED00000" + +# 0x1EE: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EE00000" + +# 0x1EF: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EF00000" + +# 0x1F0: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F01501F" + +# 0x1F1: JNZ 0x1ED +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F1321ED" + +# 0x1F2: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F23D00F" + +# 0x1F3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F33E000" + +# 0x1F4: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F43C001" + +# 0x1F5: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F528061" + +# 0x1F6: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F619021" + +# 0x1F7: JNZ 0x1F5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F7321F5" + +# 0x1F8: XOUT (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F824020" + +# 0x1F9: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F93D001" + +# 0x1FA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FA3E000" + +# 0x1FB: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FB3C001" + +# 0x1FC: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FC28061" + +# 0x1FD: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FD19101" + +# 0x1FE: JZ 0x1FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FE311FC" + +# 0x1FF: XIN R00, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FF28020" + +# 0x200: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2003D001" + +# 0x201: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2013E000" + +# Assembled from sdram_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "000D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "010A" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "074D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0820" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0954" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B73" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E43" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F6C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1065" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1161" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1272" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1369" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "146E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1567" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1620" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1753" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1844" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1952" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A41" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B4D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D57" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2074" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2169" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "226E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2367" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2420" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2553" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2644" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2752" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2841" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "294D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B52" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "306E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3167" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3220" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "374D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3956" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D66" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E79" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "404F" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "414B" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4346" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4461" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4569" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "466C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4765" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4864" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4920" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E2E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/sdram_test_short.jsm b/projects/cpu/asm/sdram_test_short.jsm new file mode 100644 index 0000000..15618d9 --- /dev/null +++ b/projects/cpu/asm/sdram_test_short.jsm @@ -0,0 +1,308 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +BURST_LEN: equ 8 +SD_CMD_WRITE: equ 0x06 +SD_CMD_READ: equ 0x05 +addr_msb_max: equ 0x40 + +; External RAM/ROM + xmem +crlf: dc 13, 10, 0 +greet_txt: dc "SDRAM Test", 0 +msg_txt0: dc "Clearing SDRAM", 0 +msg_txt1: dc "Writing SDRAM", 0 +msg_txt2: dc "Reading SDRAM", 0 +verify_ok: dc "Verify OK", 0 +verify_nok: dc "Failed at ", 0 +dot: dc ".", 0 + + org 0x80 +sdram_data: db 8 ; SDRAM data window at X:0x80 + +; Internal RAM + cmem 0 +round: db 1 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp main + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- + org 0x001 + reti + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +main: + mov R0, 0x00 + xout (led_port), R0 + +; xin R0, (btn_port) +; tst R0 +; jz no_vga + mov R0, CTRL_VGA_ENABLE + xout (ctrl_reg), R0 + + +no_vga: mov R0, 0 + mov R1, 0x80 + xout (reg_color_red), R0 + xout (reg_color_grn), R1 + xout (reg_color_blu), R0 + + jmp do_write + +; ---------------------------------------------------------- +; SDRAM clear +; ---------------------------------------------------------- + + ; Set SDRAM address register to 0 +do_clear: call AddrCnt_Init + + ; Fill SDR Buffer with zeros + mov R0, sdram_data + mov R15, 8 +buf_clr_loop: movx (R0), 0 + inc R0 + dec R15 + jnz buf_clr_loop + +sdr_clear: xin R0, (sdram_addr+0) + cmp R0, addr_msb_max + jeq clear_finished + + mov R2, BURST_LEN + +poll_clear_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_clear_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + sub R2, 2 + jnz poll_clear_full + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + ; Advance address counter + mov R0, BURST_LEN + call AddrCnt_Adv + + jmp sdr_clear + +clear_finished: + call AddrCnt_Disp + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +do_write: ; Clear LCD + + + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_write: xin R0, (sdram_addr+0) + cmp R0, addr_msb_max + jeq write_finished + + mov R2, BURST_LEN + + ; Fill SDR Buffer +sdr_burst_wr: movc R1, (round) +; xin R0, (sdram_addr+2) +; cmp R0, 0x7F +; jne force_no_err +; inc R1 +force_no_err: mov R0, sdram_data + mov R15, 8 +write_loop: movx (R0), R1 + inc R0 + inc R1 + dec R15 + jnz write_loop + +poll_write_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_write_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + movc R0, (round) + inc R0 + movc (round), R0 + + sub R2, 2 + jnz sdr_burst_wr + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + ; Advance address counter + mov R0, BURST_LEN + call AddrCnt_Adv + + jmp sdr_write + +write_finished: call AddrCnt_Disp + +; ---------------------------------------------------------- +; SDRAM Verify +; ---------------------------------------------------------- +do_read: ; Clear LCD + + ; Set SDRAM address register to 0 + call AddrCnt_Init + mov R0, 0 + movc (round), R0 + +sdr_read: xin R0, (sdram_addr+2) + cmp R0, addr_msb_max + jeq read_finished + + ; Start SDR read + call wait_cmd_rdy + mov R0, SD_CMD_READ + xout (sdram_reg), R0 + + + mov R3, BURST_LEN + + ; Wait last read +poll_read_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_READ_DATA_EMPTY + jnz poll_read_fin + + ; Verify SDR Buffer + movc R1, (round) + mov R0, sdram_data + mov R15, 8 +read_loop: movx R2, (R0) + cmp R2, R1 + jne verify_error + inc R0 + inc R1 + dec R15 + jnz read_loop + + ; Advance Read-FIFO + mov R0, FIFO_CTRL_IS_READ + xout (sdram_reg), R0 + + movc R0, (round) + inc R0 + movc (round), R0 + + sub R3, 2 + jnz poll_read_fin + + ; Advance address counter + mov R0, BURST_LEN + call AddrCnt_Adv + jmp sdr_read + +; ---------------------------------------------------------- +sd_request: push R0 + mov R0, SDRAM_CTRL_REQUEST + xout (sdram_reg), R0 +wait4grant: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, SDRAM_STAT_ACCESS + jz wait4grant + pop R0 + ret + +; ---------------------------------------------------------- +wait_cmd_rdy: call sd_request + push R0 +wait4cmd: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_CMD_FULL + jnz wait4cmd + pop R0 + ret + +; ---------------------------------------------------------- +read_finished: +no_error: jmp ende + +verify_error: jmp ende + +ende: jmp do_clear + +; ------------------------------------------------- +AddrCnt_Init: push R0 + mov R0, 0x00 + xout (sdram_addr+0), R0 + xout (sdram_addr+1), R0 + xout (sdram_addr+2), R0 + pop R0 + ret + +; ------------------------------------------------- +; Parameter +; R0: increment value +AddrCnt_Adv: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + add R1, R0 + addc R2, 0 + addc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Display Address counter +AddrCnt_Disp: ret + +; ------------------------------------------------- +; PutHexByte +; R0 : Byte value +PutHexByte: ret + +; ------------------------------------------------- +print_addr: ret + +; ------------------------------------------------- +print_data: ret + +; ------------------------------------------------- +include "../../../lib/jasm/utils.inc.jsm" + \ No newline at end of file diff --git a/projects/cpu/asm/sdram_test_short.tcl b/projects/cpu/asm/sdram_test_short.tcl new file mode 100644 index 0000000..1ec1369 --- /dev/null +++ b/projects/cpu/asm/sdram_test_short.tcl @@ -0,0 +1,704 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG +# +# Copyright (C) 2007 J. Ahrensfeld +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# For questions and ideas, please contact the author at jens@jayfield.org +# +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from sdram_test_short.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x002 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030002" + +# 0x001: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013F000" + +# 0x002: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00203000" + +# 0x003: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00324010" + +# 0x004: MOV R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00403040" + +# 0x005: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00524040" + +# 0x006: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00603000" + +# 0x007: MOV R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00703801" + +# 0x008: XOUT (0x10), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00824100" + +# 0x009: XOUT (0x11), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00924111" + +# 0x00A: XOUT (0x12), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A24120" + +# 0x00B: JMP 0x026 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B30026" + +# 0x00C: CALL 0x07D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C3B07D" + +# 0x00D: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D03800" + +# 0x00E: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E0308F" + +# 0x00F: MOVX (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F07000" + +# 0x010: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01011010" + +# 0x011: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0111501F" + +# 0x012: JNZ 0x00F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0123200F" + +# 0x013: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01328080" + +# 0x014: CMP R00, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0140F400" + +# 0x015: JEQ 0x025 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01539025" + +# 0x016: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01603082" + +# 0x017: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01728070" + +# 0x018: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01824010" + +# 0x019: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01919040" + +# 0x01A: JNZ 0x017 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A32017" + +# 0x01B: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B03100" + +# 0x01C: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C24070" + +# 0x01D: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D15022" + +# 0x01E: JNZ 0x017 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E32017" + +# 0x01F: CALL 0x072 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F3B072" + +# 0x020: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02003060" + +# 0x021: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02124070" + +# 0x022: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02203080" + +# 0x023: CALL 0x084 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0233B084" + +# 0x024: JMP 0x013 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02430013" + +# 0x025: CALL 0x094 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0253B094" + +# 0x026: CALL 0x07D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0263B07D" + +# 0x027: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02703000" + +# 0x028: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0280D000" + +# 0x029: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02928080" + +# 0x02A: CMP R00, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A0F400" + +# 0x02B: JEQ 0x046 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B39046" + +# 0x02C: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C03082" + +# 0x02D: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D0A001" + +# 0x02E: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E03800" + +# 0x02F: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F0308F" + +# 0x030: MOVX (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03006001" + +# 0x031: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03111010" + +# 0x032: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03211011" + +# 0x033: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0331501F" + +# 0x034: JNZ 0x030 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03432030" + +# 0x035: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03528070" + +# 0x036: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03624010" + +# 0x037: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03719040" + +# 0x038: JNZ 0x035 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03832035" + +# 0x039: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03903100" + +# 0x03A: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A24070" + +# 0x03B: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B0A000" + +# 0x03C: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C11010" + +# 0x03D: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D0D000" + +# 0x03E: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E15022" + +# 0x03F: JNZ 0x02D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F3202D" + +# 0x040: CALL 0x072 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0403B072" + +# 0x041: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04103060" + +# 0x042: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04224070" + +# 0x043: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04303080" + +# 0x044: CALL 0x084 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0443B084" + +# 0x045: JMP 0x029 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04530029" + +# 0x046: CALL 0x094 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0463B094" + +# 0x047: CALL 0x07D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0473B07D" + +# 0x048: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04803000" + +# 0x049: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0490D000" + +# 0x04A: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A280A0" + +# 0x04B: CMP R00, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B0F400" + +# 0x04C: JEQ 0x07A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C3907A" + +# 0x04D: CALL 0x072 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D3B072" + +# 0x04E: MOV R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E03050" + +# 0x04F: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F24070" + +# 0x050: MOV R03, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05003083" + +# 0x051: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05128070" + +# 0x052: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05224010" + +# 0x053: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05319200" + +# 0x054: JNZ 0x051 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05432051" + +# 0x055: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0550A001" + +# 0x056: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05603800" + +# 0x057: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0570308F" + +# 0x058: MOVX R02, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05804002" + +# 0x059: CMP R02, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0590E012" + +# 0x05A: JNE 0x07B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A3A07B" + +# 0x05B: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B11010" + +# 0x05C: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C11011" + +# 0x05D: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D1501F" + +# 0x05E: JNZ 0x058 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E32058" + +# 0x05F: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F03200" + +# 0x060: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06024070" + +# 0x061: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0610A000" + +# 0x062: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06211010" + +# 0x063: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0630D000" + +# 0x064: SUB R03, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06415023" + +# 0x065: JNZ 0x051 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06532051" + +# 0x066: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06603080" + +# 0x067: CALL 0x084 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0673B084" + +# 0x068: JMP 0x04A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0683004A" + +# 0x069: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0693C000" + +# 0x06A: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A03800" + +# 0x06B: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B24070" + +# 0x06C: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C28070" + +# 0x06D: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D24010" + +# 0x06E: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E19800" + +# 0x06F: JZ 0x06C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F3106C" + +# 0x070: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0703D000" + +# 0x071: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0713E000" + +# 0x072: CALL 0x069 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0723B069" + +# 0x073: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0733C000" + +# 0x074: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07428070" + +# 0x075: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07524010" + +# 0x076: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07619010" + +# 0x077: JNZ 0x074 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07732074" + +# 0x078: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0783D000" + +# 0x079: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0793E000" + +# 0x07A: JMP 0x07C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A3007C" + +# 0x07B: JMP 0x07C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B3007C" + +# 0x07C: JMP 0x00C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C3000C" + +# 0x07D: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D3C000" + +# 0x07E: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E03000" + +# 0x07F: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F24080" + +# 0x080: XOUT (0x09), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08024090" + +# 0x081: XOUT (0x0A), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "081240A0" + +# 0x082: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0823D000" + +# 0x083: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0833E000" + +# 0x084: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0843C001" + +# 0x085: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0853C002" + +# 0x086: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0863C003" + +# 0x087: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08728081" + +# 0x088: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08828092" + +# 0x089: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "089280A3" + +# 0x08A: ADD R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A10001" + +# 0x08B: ADDC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B13002" + +# 0x08C: ADDC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C13003" + +# 0x08D: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D24081" + +# 0x08E: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E24092" + +# 0x08F: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F240A3" + +# 0x090: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0903D003" + +# 0x091: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0913D002" + +# 0x092: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0923D001" + +# 0x093: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0933E000" + +# 0x094: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0943E000" + +# 0x095: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0953E000" + +# 0x096: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0963E000" + +# 0x097: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0973E000" + +# 0x098: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "098190F0" + +# 0x099: CMP R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0990F0A0" + +# 0x09A: JLT 0x09C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A3509C" + +# 0x09B: ADD R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B11070" + +# 0x09C: ADD R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C11300" + +# 0x09D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D3E000" + +# 0x09E: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E3C000" + +# 0x09F: CALL 0x098 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F3B098" + +# 0x0A0: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A002001" + +# 0x0A1: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A13D000" + +# 0x0A2: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A22A000" + +# 0x0A3: CALL 0x098 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A33B098" + +# 0x0A4: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A43E000" + +# Assembled from sdram_test_short.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "000D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "010A" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "074D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0820" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0954" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B73" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E43" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F6C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1065" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1161" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1272" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1369" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "146E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1567" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1620" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1753" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1844" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1952" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A41" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B4D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D57" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2074" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2169" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "226E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2367" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2420" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2553" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2644" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2752" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2841" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "294D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B52" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "306E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3167" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3220" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "374D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3956" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D66" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E79" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "404F" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "414B" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4346" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4461" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4569" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "466C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4765" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4864" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4920" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E2E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/test.jsm b/projects/cpu/asm/test.jsm new file mode 100644 index 0000000..f92d833 --- /dev/null +++ b/projects/cpu/asm/test.jsm @@ -0,0 +1,188 @@ +; PROJECT "test" + + data 10 +constant: DROM 55, 33,3a,5b,01,4f +rxbuf: DRAM 16 +txbuf: DRAM 16 +message: DROM 12, 99, 45, 2a, 5c, 0, 0d, 0a + +reset: jmp start + inc R14 + mov R8, R15 + mov R15, #00 + add R15, R14 + mov R15, R8 + reti + nop + nop + nop + +const1: equ 01 +const2: equ 02 +const3: equ 03 +const4: equ EF +const5: equ BE + + org 10 + +f1: +f2: inc R13 + ret + +start: mov R11, message + nop +; This is a comment: + mov R0, #00 + mov R1, const1 + mov R2, const2 + mov R3, const3 + mov R4, const4 + mov R5, const5 + mov R6, #06 + mov R7, #07 + mov R8, #08 + mov R9, #09 + mov R10, #10 + mov R11, #65 + mov R12, #12 + mov R13, #40 + mov R14, #00 + mov R15, #15 + movx (#21), R5 + movx (R14), #65 + tst R0 + tst R5 + shr R13 + shr R13 + shl R13 + shl R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + ror R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + rol R13 + ror R15 + ror R15 + ror R15 + ror R15 + halt + nop + mov R8, #80 + mov R15, #00 + shl R8 + rolc R15 + rol R15 + rol R15 + rol R15 + rol R15 + rol R15 + rol R15 + rol R15 + + xor R9, #08 + or R6, #50 + and R15, #51 + + cmp R0, #00 + jne error + jlt error + jgt error + jne error + jeq ok10 + jmp error +ok10: + jle ok11 + jmp error +ok11: + jge ok12 + jmp error +ok12: + + cmp R1, #00 + jeq error + jlt error + jgt ok20 +ok20: + jne ok21 +ok21: + jge ok22 + jmp error +ok22: + + cmp R11 #64 + jeq error + cmp R11 #65 + jle ok30 + jmp error +ok30: + jge ok31 + jmp error +ok31: + jgt error + jlt error + + cmp R11 #66 + jle ok40 + jmp error +ok40: + jgt error + jge error + jlt label2 + jmp error + +label2: movx (const4), R10 +linit: mov R2, #10 + mov R1, #01 +loop: sub R2, R1 + jnz loop + jmp sub + +sub: mov R15, #20 + push R15 + mov R8, #01 + call f1 + call f2 + call stub + mov R7, const4 + pop R15 + mov R15, R7 + jmp linit + + nop + nop + nop + +stub: mov R0, #00 +L2: movx (R0), R7; + add R0, #02 + sub R15, #01; Subtract + jnz L2 ; exit, if zero + + movx R5, (#09) + movx R7, (R0) + ret + +error: + nop + jmp error + diff --git a/projects/cpu/asm/test.tcl b/projects/cpu/asm/test.tcl new file mode 100644 index 0000000..e69de29 diff --git a/projects/cpu/asm/uart_test.jsm b/projects/cpu/asm/uart_test.jsm new file mode 100644 index 0000000..ea01df2 --- /dev/null +++ b/projects/cpu/asm/uart_test.jsm @@ -0,0 +1,510 @@ +; ------------------------------------------------- +; Uart test +; ------------------------------------------------- +reset: jmp init + + org 0x001 + jmp isr + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +ram_start: equ 0x00 ; R/W +txt_start: equ 0x80 ; RO +txt_end: equ 0x8B ; RO +btn_port: equ 0xC0 ; RO +led_port: equ 0xC1 ; Write +uart_data: equ 0xC2 ; Write +lcd_port: equ 0xC3 ; R/W +ctrl_reg: equ 0xC4 ; R/W +dip_port: equ 0xC5 ; RO +uart_status: equ 0xC6 ; Read + +lcd_read: equ 0x20 +lcd_data: equ 0x40 +lcd_enable: equ 0x80 + +DIV10: equ 0x0A + +CR: equ 0x0D +LF: equ 0x0A + +count0: equ 0x00 +count1: equ 0x01 +count2: equ 0x02 +count3: equ 0x03 + +cntDigit0: equ 0x04 +cntDigit1: equ 0x05 +cntDigit2: equ 0x06 +cntDigit3: equ 0x07 +cntDigit4: equ 0x08 +cntDigit5: equ 0x09 +cntDigit6: equ 0x0A +cntDigit7: equ 0x0B + +LCD_CMD_Z1: equ 0x80 +LCD_CMD_Z2: equ 0xC0 + +count_stat: equ 0x0C + +; Chip register +cpu_revision: equ 0x00 ; RO +cpu_control: equ 0x01 ; R/W +cpu_status: equ 0x02 ; RO +cpu_int_ctrl: equ 0x03 ; R/W + +; ------------------------------------------------- +; Main +; ------------------------------------------------- + org 010 + +init: mov R1, 0x55 + movx (led_port), R1 +; jmp init + call CounterInit + call LCD_init + mov R0, 0x00 + movc (count_stat), R0 + mov R1, 0x04 + movx R0, (btn_port) + and R0, 0x01 + jz not_pressed + mov R1, 0x00 +not_pressed: movx (led_port), R1 + + mov R0, ctrl_reg + ; Enable timer + movx (R0), 0x02 + ; Enable interrupt + movx (R0), 0x03 + + ; Enable CPU interrupt + cin R0, (cpu_int_ctrl) + or R0, 0x01 + cout (cpu_int_ctrl), R0 + +start: halt + call Cnt32 + call UpdateDigits + mov R15, cntDigit7 + + movc R0, (count_stat) + tst R0 + jz start + mov R0, 0x00 + movc (count_stat), R0 + +loop: call subprog + movc R0, (R15) + call sout + cmp R15, cntDigit0 + jeq sendCRLF + dec R15 + jmp loop + +sendCRLF: mov R0, CR + call sout + mov R0, LF + call sout + + jmp start + +; ------------------------------------------------- +CounterInit: mov R0, 0x00 + movc (count0), R0 + movc (count1), R0 + movc (count2), R0 + movc (count3), R0 + ret + +Cnt32: mov R0, count0 +cloop: movc R1, (R0) + inc R1 + movc (R0), R1 + ; ---------------- + mov R7, R1 + mov R14, R7 + mov R7, 0x55 + mov R7, 0xAA + xor R7, R7 + xor R14, 0x99 + ; ---------------- + jnc CountRdy + cmp R0, count3 + jeq CountRdy + inc R0 + jmp cloop +CountRdy: ret + +UpdateDigits: mov R2, cntDigit0 + mov R0, count0 +dualLoop: movc R1, (R0) + and R1, 0x0F + cmp R1, 0x0A + jlt isNum1 + add R1, 0x07 +isNum1: add R1, 0x30 + movc (R2), R1 + inc R2 + movc R1, (R0) + shr R1 + shr R1 + shr R1 + shr R1 + and R1, 0x0F + cmp R1, 0x0A + jlt isNum2 + add R1, 0x07 +isNum2: add R1, 0x30 + movc (R2), R1 + cmp R0, count3 + jeq UpdRdy + inc R0 + inc R2 + jmp dualLoop +UpdRdy: ret + +; ------------------------------------------------- +; subprog +; ------------------------------------------------- +subprog: push R0 + push R1 + push R2 + push R3 + push R4 + push R5 + push R6 + push R7 + push R8 + push R9 + push R10 + push R11 + push R12 + push R13 + push R14 + push R15 + pop R15 + pop R14 + pop R13 + pop R12 + pop R11 + pop R10 + pop R9 + pop R8 + pop R7 + pop R6 + pop R5 + pop R4 + pop R3 + pop R2 + pop R1 + pop R0 + ret + +; ------------------------------------------------- +; sout +; ------------------------------------------------- +; R0 = input +sout: push R1 +sout1: movx R1, (uart_status) + and R1, 0x02 + jnz sout1 + movx (uart_data), R0 + pop R1 + ret + +; ------------------------------------------------- +; sin +; ------------------------------------------------- +; R0 = output +sin: push R1 +sin1: movx R1, (uart_status) + and R1, 0x10 + jnz sin1 + movx R0, (uart_data) + pop R1 + ret + +; ------------------------------------------------- +; Init LCD +; ------------------------------------------------- +LCD_init: mov R1, lcd_port + movx (R1), lcd_read + + call delay10ms + + ; 0. + mov R2, 0x00 + mov R0, 0x03 + call LCD_write_ + call delay10ms + mov R2, 0x00 + mov R0, 0x03 + call LCD_write_ + call delay10ms + + mov R2, 0x00 + mov R0, 0x02 + call LCD_write_ + call delay1ms + + ; 1. + mov R0, 0x28 + call LCD_writecmd + + ; 2. + mov R0, 0x0E + call LCD_writecmd + + ; 3. + mov R0, 0x06 + call LCD_writecmd + + ; 3. + mov R0, 0x01 + call LCD_writecmd + + ret + +; ------------------------------------------------- +; LCD_Clear +; ------------------------------------------------- +LCD_clear: push R0 + mov R0, 0x01 + call LCD_writecmd + pop R0 + ret + +; ------------------------------------------------- +; LCD_writecmd +; ------------------------------------------------- +; R0 = cmd +LCD_writecmd: call LCD_waitbsy + push R2 + push R0 + push R0 + mov R2, 0x00 + shr R0 + shr R0 + shr R0 + shr R0 + call LCD_write_ + pop R0 + and R0, 0x0F + call LCD_write_ + pop R0 + pop R2 + ret + +; ------------------------------------------------- +; LCD_writechar +; ------------------------------------------------- +; R0 = char +LCD_writechar: call LCD_waitbsy + push R2 + push R0 + push R0 + mov R2, lcd_data + shr R0 + shr R0 + shr R0 + shr R0 + call LCD_write_ + pop R0 + and R0, 0x0F + call LCD_write_ + pop R0 + pop R2 + ret + +; ------------------------------------------------- +; LCD_write_ +; ------------------------------------------------- +; R0 = input +LCD_write_: push R1 + + mov R1, R0 + or R1, R2 + movx (lcd_port), R1 + call delay1us + + mov R1, R0 + or R1, R2 + or R1, lcd_enable + movx (lcd_port), R1 + call delay1us + + mov R1, R0 + or R1, R2 + movx (lcd_port), R1 + call delay1us + + pop R1 + ret + +; ------------------------------------------------- +; LCD_read_ +; ------------------------------------------------- +; R0 = output +LCD_read_: push R1 + + mov R1, lcd_read + or R1, R2 + movx (lcd_port), R1 + call delay1us + + mov R1, lcd_read + or R1, R2 + or R1, lcd_enable + movx (lcd_port), R1 + call delay1us + movx R0, (lcd_port) + + mov R1, lcd_read + or R1, R2 + movx (lcd_port), R1 + call delay1us + + pop R1 + ret + +; ------------------------------------------------- +; LCD_readstat +; ------------------------------------------------- +; R0 = status +LCD_readstat: push R2 + mov R2, 0x00 + call LCD_read_ + shl R0 + shl R0 + shl R0 + shl R0 + push R0 + call LCD_read_ + and R0, 0x0F + pop R2 + or R0, R2 + pop R2 + ret + +; ------------------------------------------------- +; LCD_waitbsy +; ------------------------------------------------- +LCD_waitbsy: push R0 +bsy_loop: call LCD_readstat + and R0, 0x80 + jz ex_bsy + call delay1us + jmp bsy_loop +ex_bsy: pop R0 + ret + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- +isr: push R0 + push R1 + movx R0, (led_port) + xor R0, 0x02 + movx (led_port), R0 + + call LCD_clear + + mov R0, LCD_CMD_Z1 + call LCD_writecmd + + mov R1, txt_start +read_rom: movx R0, (R1) + call LCD_writechar + inc R1 + cmp R1, txt_end + jlt read_rom + + mov R0, LCD_CMD_Z2 + call LCD_writecmd + mov R1, cntDigit1 + movc R0, (R1) + mov R1, cntDigit7 + cmp R0, 0x30 + jne print_num + mov R0, 0x01 + movc (count_stat), R0 + +print_num: movc R0, (R1) + call LCD_writechar + cmp R1, cntDigit0 + jeq ex_isr + dec R1 + jmp print_num + +ex_isr: call delay1ms + pop R1 + pop R0 + + reti + +; ------------------------------------------------- +; Delays +; ------------------------------------------------- +delay1s: push R15 + mov R15, DIV10 +loop1s: call delay100ms + dec R15 + jnz loop1s + pop R15 + ret + +delay100ms: push R15 + mov R15, DIV10 +loop100ms: call delay10ms + dec R15 + jnz loop100ms + pop R15 + ret + +delay10ms: push R15 + mov R15, DIV10 +loop10ms: call delay1ms + dec R15 + jnz loop10ms + pop R15 + ret + +delay1ms: push R15 + mov R15, DIV10 +loop1ms: call delay100us + dec R15 + jnz loop1ms + pop R15 + ret + +delay100us: push R15 + mov R15, DIV10 +loop100us: call delay10us + dec R15 + jnz loop100us + pop R15 + ret + +delay10us: push R15 + mov R15, DIV10 +loop10us: call delay1us + dec R15 + jnz loop10us + pop R15 + ret + +delay1us: push R15 + mov R15, DIV10 +loop1us: call delay100ns + dec R15 + jnz loop1us + pop R15 + ret + +delay100ns: nop + nop + nop + nop + ret \ No newline at end of file diff --git a/projects/cpu/asm/uart_test.tcl b/projects/cpu/asm/uart_test.tcl new file mode 100644 index 0000000..48e2515 --- /dev/null +++ b/projects/cpu/asm/uart_test.tcl @@ -0,0 +1,1103 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG + +# Copyright (C) 2007 J. Ahrensfeld + +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. + +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. + +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +# For questions and ideas, please contact the author at jens@jayfield.org + +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" \ + "frequency=1500000"] + # frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +# --------------------------------------------------------------- +# Shift the USER1 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 $irlength "3C2"] + +# Write Program +# JASM_ROM_INSERT_HERE +# 0x000: JMP 0x008 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00030008" + +# 0x001: JMP 0x103 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00070103" + +# 0x002: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00080000" + +# 0x003: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "000C0000" + +# 0x004: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00100000" + +# 0x005: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00140000" + +# 0x006: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00180000" + +# 0x007: +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "001C0000" + +# 0x008: MOV R01, 0x55 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00203551" + +# 0x009: MOVX (0xC1), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00248C11" + +# 0x00A: CALL 0x02F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "002BB02F" + +# 0x00B: CALL 0x08F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "002FB08F" + +# 0x00C: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00303000" + +# 0x00D: MOVC (0x0C), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0034D0C0" + +# 0x00E: MOV R01, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00383041" + +# 0x00F: MOVX R00, (0xC0) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "003C5C00" + +# 0x010: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00419010" + +# 0x011: JZ 0x013 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00471013" + +# 0x012: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00483001" + +# 0x013: MOVX (0xC1), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "004C8C11" + +# 0x014: MOV R00, 0xC4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00503C40" + +# 0x015: MOVX (R00), 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00547020" + +# 0x016: MOVX (R00), 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00587030" + +# 0x017: CIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "005E9030" + +# 0x018: OR R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0061B010" + +# 0x019: COUT (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00666030" + +# 0x01A: HALT +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00681000" + +# 0x01B: CALL 0x035 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "006FB035" + +# 0x01C: CALL 0x045 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0073B045" + +# 0x01D: MOV R15, 0x0B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007430BF" + +# 0x01E: MOVC R00, (0x0C) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0078A0C0" + +# 0x01F: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "007CF000" + +# 0x020: JZ 0x01A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0083101A" + +# 0x021: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00843000" + +# 0x022: MOVC (0x0C), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0088D0C0" + +# 0x023: CALL 0x060 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "008FB060" + +# 0x024: MOVC R00, (R15) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009090F0" + +# 0x025: CALL 0x081 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0097B081" + +# 0x026: CMP R15, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0098F04F" + +# 0x027: JEQ 0x02A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "009F902A" + +# 0x028: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A1501F" + +# 0x029: JMP 0x023 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A70023" + +# 0x02A: MOV R00, 0x0D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00A830D0" + +# 0x02B: CALL 0x081 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00AFB081" + +# 0x02C: MOV R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B030A0" + +# 0x02D: CALL 0x081 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00B7B081" + +# 0x02E: JMP 0x01A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00BB001A" + +# 0x02F: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00BC3000" + +# 0x030: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C0D000" + +# 0x031: MOVC (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C4D010" + +# 0x032: MOVC (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00C8D020" + +# 0x033: MOVC (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00CCD030" + +# 0x034: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D3E000" + +# 0x035: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D43000" + +# 0x036: MOVC R01, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00D89001" + +# 0x037: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00DD1011" + +# 0x038: MOVC (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E0B001" + +# 0x039: MOV R07, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E42017" + +# 0x03A: MOV R14, R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00E8207E" + +# 0x03B: MOV R07, 0x55 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00EC3557" + +# 0x03C: MOV R07, 0xAA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F03AA7" + +# 0x03D: XOR R07, R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F5C077" + +# 0x03E: XOR R14, 0x99 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00F9D99E" + +# 0x03F: JNC 0x044 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "00FF4044" + +# 0x040: CMP R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0100F030" + +# 0x041: JEQ 0x044 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01079044" + +# 0x042: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01091010" + +# 0x043: JMP 0x036 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "010F0036" + +# 0x044: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0113E000" + +# 0x045: MOV R02, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01143042" + +# 0x046: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01183000" + +# 0x047: MOVC R01, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "011C9001" + +# 0x048: AND R01, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "012190F1" + +# 0x049: CMP R01, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0124F0A1" + +# 0x04A: JLT 0x04C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "012B504C" + +# 0x04B: ADD R01, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "012D1071" + +# 0x04C: ADD R01, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01311301" + +# 0x04D: MOVC (R01), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0134B021" + +# 0x04E: INC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01391012" + +# 0x04F: MOVC R01, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "013C9001" + +# 0x050: SHR R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0141F001" + +# 0x051: SHR R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0145F001" + +# 0x052: SHR R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0149F001" + +# 0x053: SHR R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "014DF001" + +# 0x054: AND R01, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "015190F1" + +# 0x055: CMP R01, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0154F0A1" + +# 0x056: JLT 0x058 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "015B5058" + +# 0x057: ADD R01, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "015D1071" + +# 0x058: ADD R01, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01611301" + +# 0x059: MOVC (R01), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0164B021" + +# 0x05A: CMP R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0168F030" + +# 0x05B: JEQ 0x05F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "016F905F" + +# 0x05C: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01711010" + +# 0x05D: INC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01751012" + +# 0x05E: JMP 0x047 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "017B0047" + +# 0x05F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "017FE000" + +# 0x060: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0183C000" + +# 0x061: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0187C001" + +# 0x062: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "018BC002" + +# 0x063: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "018FC003" + +# 0x064: PUSH R04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0193C004" + +# 0x065: PUSH R05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0197C005" + +# 0x066: PUSH R06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "019BC006" + +# 0x067: PUSH R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "019FC007" + +# 0x068: PUSH R08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01A3C008" + +# 0x069: PUSH R09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01A7C009" + +# 0x06A: PUSH R10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01ABC00A" + +# 0x06B: PUSH R11 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01AFC00B" + +# 0x06C: PUSH R12 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B3C00C" + +# 0x06D: PUSH R13 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01B7C00D" + +# 0x06E: PUSH R14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01BBC00E" + +# 0x06F: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01BFC00F" + +# 0x070: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C3D00F" + +# 0x071: POP R14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01C7D00E" + +# 0x072: POP R13 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01CBD00D" + +# 0x073: POP R12 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01CFD00C" + +# 0x074: POP R11 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01D3D00B" + +# 0x075: POP R10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01D7D00A" + +# 0x076: POP R09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01DBD009" + +# 0x077: POP R08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01DFD008" + +# 0x078: POP R07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01E3D007" + +# 0x079: POP R06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01E7D006" + +# 0x07A: POP R05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01EBD005" + +# 0x07B: POP R04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01EFD004" + +# 0x07C: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F3D003" + +# 0x07D: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01F7D002" + +# 0x07E: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01FBD001" + +# 0x07F: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "01FFD000" + +# 0x080: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0203E000" + +# 0x081: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0207C001" + +# 0x082: MOVX R01, (0xC6) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02085C61" + +# 0x083: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "020D9021" + +# 0x084: JNZ 0x082 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02132082" + +# 0x085: MOVX (0xC2), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02148C20" + +# 0x086: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "021BD001" + +# 0x087: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "021FE000" + +# 0x088: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0223C001" + +# 0x089: MOVX R01, (0xC6) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02245C61" + +# 0x08A: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02299101" + +# 0x08B: JNZ 0x089 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "022F2089" + +# 0x08C: MOVX R00, (0xC2) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02305C20" + +# 0x08D: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0237D001" + +# 0x08E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "023BE000" + +# 0x08F: MOV R01, 0xC3 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "023C3C31" + +# 0x090: MOVX (R01), 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02407201" + +# 0x091: CALL 0x132 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0247B132" + +# 0x092: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02483002" + +# 0x093: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "024C3030" + +# 0x094: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0253B0CC" + +# 0x095: CALL 0x132 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0257B132" + +# 0x096: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02583002" + +# 0x097: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "025C3030" + +# 0x098: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0263B0CC" + +# 0x099: CALL 0x132 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0267B132" + +# 0x09A: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02683002" + +# 0x09B: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "026C3020" + +# 0x09C: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0273B0CC" + +# 0x09D: CALL 0x139 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0277B139" + +# 0x09E: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02783280" + +# 0x09F: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "027FB0AC" + +# 0x0A0: MOV R00, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "028030E0" + +# 0x0A1: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0287B0AC" + +# 0x0A2: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02883060" + +# 0x0A3: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "028FB0AC" + +# 0x0A4: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02903010" + +# 0x0A5: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0297B0AC" + +# 0x0A6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "029BE000" + +# 0x0A7: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "029FC000" + +# 0x0A8: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02A03010" + +# 0x0A9: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02A7B0AC" + +# 0x0AA: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02ABD000" + +# 0x0AB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02AFE000" + +# 0x0AC: CALL 0x0FB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B3B0FB" + +# 0x0AD: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02B7C002" + +# 0x0AE: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02BBC000" + +# 0x0AF: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02BFC000" + +# 0x0B0: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C03002" + +# 0x0B1: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C5F000" + +# 0x0B2: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02C9F000" + +# 0x0B3: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02CDF000" + +# 0x0B4: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02D1F000" + +# 0x0B5: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02D7B0CC" + +# 0x0B6: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02DBD000" + +# 0x0B7: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02DD90F0" + +# 0x0B8: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02E3B0CC" + +# 0x0B9: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02E7D000" + +# 0x0BA: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02EBD002" + +# 0x0BB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02EFE000" + +# 0x0BC: CALL 0x0FB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02F3B0FB" + +# 0x0BD: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02F7C002" + +# 0x0BE: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02FBC000" + +# 0x0BF: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "02FFC000" + +# 0x0C0: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03003402" + +# 0x0C1: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0305F000" + +# 0x0C2: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0309F000" + +# 0x0C3: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "030DF000" + +# 0x0C4: SHR R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0311F000" + +# 0x0C5: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0317B0CC" + +# 0x0C6: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "031BD000" + +# 0x0C7: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "031D90F0" + +# 0x0C8: CALL 0x0CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0323B0CC" + +# 0x0C9: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0327D000" + +# 0x0CA: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032BD002" + +# 0x0CB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "032FE000" + +# 0x0CC: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0333C001" + +# 0x0CD: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03342001" + +# 0x0CE: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0339A021" + +# 0x0CF: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "033C8C31" + +# 0x0D0: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0343B14E" + +# 0x0D1: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03442001" + +# 0x0D2: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0349A021" + +# 0x0D3: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "034DB801" + +# 0x0D4: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03508C31" + +# 0x0D5: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0357B14E" + +# 0x0D6: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03582001" + +# 0x0D7: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "035DA021" + +# 0x0D8: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03608C31" + +# 0x0D9: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0367B14E" + +# 0x0DA: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "036BD001" + +# 0x0DB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "036FE000" + +# 0x0DC: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0373C001" + +# 0x0DD: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03743201" + +# 0x0DE: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0379A021" + +# 0x0DF: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "037C8C31" + +# 0x0E0: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0383B14E" + +# 0x0E1: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03843201" + +# 0x0E2: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0389A021" + +# 0x0E3: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "038DB801" + +# 0x0E4: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03908C31" + +# 0x0E5: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0397B14E" + +# 0x0E6: MOVX R00, (0xC3) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03985C30" + +# 0x0E7: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "039C3201" + +# 0x0E8: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03A1A021" + +# 0x0E9: MOVX (0xC3), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03A48C31" + +# 0x0EA: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03ABB14E" + +# 0x0EB: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03AFD001" + +# 0x0EC: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B3E000" + +# 0x0ED: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B7C002" + +# 0x0EE: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03B83002" + +# 0x0EF: CALL 0x0DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03BFB0DC" + +# 0x0F0: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C1E000" + +# 0x0F1: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C5E000" + +# 0x0F2: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03C9E000" + +# 0x0F3: SHL R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03CDE000" + +# 0x0F4: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03D3C000" + +# 0x0F5: CALL 0x0DC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03D7B0DC" + +# 0x0F6: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03D990F0" + +# 0x0F7: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03DFD002" + +# 0x0F8: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03E1A020" + +# 0x0F9: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03E7D002" + +# 0x0FA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03EBE000" + +# 0x0FB: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03EFC000" + +# 0x0FC: CALL 0x0ED +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03F3B0ED" + +# 0x0FD: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03F59800" + +# 0x0FE: JZ 0x101 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03FB1101" + +# 0x0FF: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "03FFB14E" + +# 0x100: JMP 0x0FC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "040300FC" + +# 0x101: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0407D000" + +# 0x102: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "040BE000" + +# 0x103: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "040FC000" + +# 0x104: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0413C001" + +# 0x105: MOVX R00, (0xC1) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04145C10" + +# 0x106: XOR R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0419D020" + +# 0x107: MOVX (0xC1), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "041C8C10" + +# 0x108: CALL 0x0A7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0423B0A7" + +# 0x109: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04243800" + +# 0x10A: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "042BB0AC" + +# 0x10B: MOV R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "042C3801" + +# 0x10C: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04304010" + +# 0x10D: CALL 0x0BC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0437B0BC" + +# 0x10E: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04391011" + +# 0x10F: CMP R01, 0x8B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "043CF8B1" + +# 0x110: JLT 0x10C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0443510C" + +# 0x111: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04443C00" + +# 0x112: CALL 0x0AC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "044BB0AC" + +# 0x113: MOV R01, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "044C3051" + +# 0x114: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04509010" + +# 0x115: MOV R01, 0x0B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "045430B1" + +# 0x116: CMP R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0458F300" + +# 0x117: JNE 0x11A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "045FA11A" + +# 0x118: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04603010" + +# 0x119: MOVC (0x0C), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0464D0C0" + +# 0x11A: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04689010" + +# 0x11B: CALL 0x0BC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "046FB0BC" + +# 0x11C: CMP R01, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0470F041" + +# 0x11D: JEQ 0x120 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04779120" + +# 0x11E: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04795011" + +# 0x11F: JMP 0x11A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "047F011A" + +# 0x120: CALL 0x139 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0483B139" + +# 0x121: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0487D001" + +# 0x122: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "048BD000" + +# 0x123: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "048FF000" + +# 0x124: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0493C00F" + +# 0x125: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "049430AF" + +# 0x126: CALL 0x12B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "049BB12B" + +# 0x127: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "049D501F" + +# 0x128: JNZ 0x126 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04A32126" + +# 0x129: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04A7D00F" + +# 0x12A: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04ABE000" + +# 0x12B: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04AFC00F" + +# 0x12C: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04B030AF" + +# 0x12D: CALL 0x132 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04B7B132" + +# 0x12E: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04B9501F" + +# 0x12F: JNZ 0x12D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04BF212D" + +# 0x130: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04C3D00F" + +# 0x131: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04C7E000" + +# 0x132: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04CBC00F" + +# 0x133: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04CC30AF" + +# 0x134: CALL 0x139 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04D3B139" + +# 0x135: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04D5501F" + +# 0x136: JNZ 0x134 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04DB2134" + +# 0x137: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04DFD00F" + +# 0x138: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04E3E000" + +# 0x139: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04E7C00F" + +# 0x13A: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04E830AF" + +# 0x13B: CALL 0x140 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04EFB140" + +# 0x13C: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04F1501F" + +# 0x13D: JNZ 0x13B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04F7213B" + +# 0x13E: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04FBD00F" + +# 0x13F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "04FFE000" + +# 0x140: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0503C00F" + +# 0x141: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "050430AF" + +# 0x142: CALL 0x147 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "050BB147" + +# 0x143: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "050D501F" + +# 0x144: JNZ 0x142 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "05132142" + +# 0x145: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0517D00F" + +# 0x146: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "051BE000" + +# 0x147: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "051FC00F" + +# 0x148: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "052030AF" + +# 0x149: CALL 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0527B14E" + +# 0x14A: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0529501F" + +# 0x14B: JNZ 0x149 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "052F2149" + +# 0x14C: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0533D00F" + +# 0x14D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0537E000" + +# 0x14E: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "053BC00F" + +# 0x14F: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "053C30AF" + +# 0x150: CALL 0x155 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0543B155" + +# 0x151: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0545501F" + +# 0x152: JNZ 0x150 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "054B2150" + +# 0x153: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "054FD00F" + +# 0x154: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0553E000" + +# 0x155: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "05540000" + +# 0x156: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "05580000" + +# 0x157: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "055C0000" + +# 0x158: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "05600000" + +# 0x159: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSEJTAG_SHIFT_READWRITE $CSEJTAG_RUN_TEST_IDLE 0 28 "0567E000" + + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/vga_test.jsm b/projects/cpu/asm/vga_test.jsm new file mode 100644 index 0000000..cdc8ae6 --- /dev/null +++ b/projects/cpu/asm/vga_test.jsm @@ -0,0 +1,736 @@ +; ------------------------------------------------- +; Register definitions +; ------------------------------------------------- +include "../../../lib/jasm/cregs.inc.jsm" +include "xregs.inc.jsm" + +; ------------------------------------------------- +; Constants +; ------------------------------------------------- +BURST_LEN: equ 8 +SD_CMD_WRITE: equ 0x06 +SD_CMD_READ: equ 0x05 +START_ADDR0: equ 0x00 +START_ADDR1: equ 0x00 +START_ADDR2: equ 0x20 +END_ADDR0: equ 0xF8 +END_ADDR1: equ 0xFF +END_ADDR2: equ 0xFF +SIO_TIMEOUT0: equ 0xE8 +SIO_TIMEOUT1: equ 0x03 +SIO_BUFSIZE: equ 64 + +; External RAM/ROM + xmem +crlf: dc 13, 10, 0 +greet_txt: dc "SDRAM Test", 0 +msg_txt0: dc "Clearing SDRAM", 0 +msg_txt1: dc "Writing SDRAM", 0 +msg_txt2: dc "Reading SDRAM", 0 +msg_txt3: dc "Reading Bitmap", 0 +verify_ok: dc "Verify OK", 0 +verify_nok: dc "Failed at ", 0 +dot: dc ".", 0 + + org 0x80 +sdram_data: db 8 ; SDRAM data window at X:0x80 + +; Internal RAM + cmem 0 +block_cnt: db 1 +round_cnt: db 1 +bmp_offset: db 4 +pixel_buf: db 24 + +sio_rx_buf: db 64 +sio_rx_ptr_r: db 1 +sio_rx_ptr_w: db 1 +sio_timeout: db 2 + +; ------------------------------------------------- +; Program +; ------------------------------------------------- + code +reset: org 0x000 + jmp main + +; ------------------------------------------------- +; ISR +; ------------------------------------------------- + org 0x001 +sio_isr: push R0 + push R1 +u_get_nxt: xin R1, (uart_status) + and R1, 0x10 + jz ex_uart_isr + xin R0, (uart_data) + movc R1, (sio_rx_ptr_w) + movc (R1), R0 + inc R1 + cmp R1, sio_rx_buf+64 + jne u_upd_nxt + mov R1, sio_rx_buf +u_upd_nxt: movc (sio_rx_ptr_w), R1 + movc R0, (sio_rx_ptr_r) + cmp R0, R1 + jne u_get_nxt + xin R0, (ctrl_reg) + or R0, 0x20 + xout (ctrl_reg), R0 + jmp u_get_nxt +ex_uart_isr: call Timer_isr + pop R1 + pop R0 + reti + +Timer_isr: xin R0, (btn_port) + and R0, 0x01 + jz btn_chk2 + mov R0, vga_read_addr + xout (R0), 0x00 + inc R0 + xout (R0), 0x00 + inc R0 + xout (R0), 0x00 + jmp ex_t_isr +btn_chk2: xin R0, (btn_port) + and R0, 0x02 + jz ex_t_isr + mov R0, vga_read_addr + xout (R0), 0x00 + inc R0 + xout (R0), 0x00 + inc R0 + xout (R0), 0x20 +ex_t_isr: ret + +; ------------------------------------------------- +; Main +; ------------------------------------------------- +main: call sio_init + call LCD_init + mov R0, 0x00 + xout (led_port), R0 + + mov R0, CTRL_VGA_ENABLE + xout (ctrl_reg), R0 + + xin R0, (ctrl_reg) + or R0, CTRL_TIMER_ENABLE + xout (ctrl_reg), R0 + + mov R0, 0x03 + cout (cpu_int_ctrl), R0 + + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + mov R0, 0 + mov R1, 0xC0 + xout (reg_color_red), R1 + xout (reg_color_grn), R1 + xout (reg_color_blu), R1 + + call cg_wait_rdy + call cg_clr_screen + + ; Print greeting message + mov R1, greet_txt + call LCD_putsx + + mov R1, greet_txt + call cg_puts + mov R1, crlf + call cg_puts_clr + + xin R0, (ctrl_reg) + and R0, 0xCF + xout (ctrl_reg), R0 + + mov R0, 0 + movc (round_cnt), R0 + + +main_loop: call write_uart_data +; call do_clear +ML1: call do_write + call do_read + movc R0, (round_cnt) + inc R0 + movc (round_cnt), R0 + jmp ML1 + +; ---------------------------------------------------------- +; SDRAM clear +; ---------------------------------------------------------- +do_clear: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Clear message + mov R1, msg_txt0 + call LCD_putsx + + mov R1, msg_txt0 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + mov R0, 0 + mov R1, 0 + mov R2, 0 + call AddrCnt_Init + + ; Fill SDR Buffer with zeros + mov R0, sdram_data + mov R15, 8 +buf_clr_loop: movx (R0), 0 + inc R0 + dec R15 + jnz buf_clr_loop + +sdr_clear: mov R2, BURST_LEN + +poll_clear_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_clear_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + sub R2, 2 + jnz poll_clear_full + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + xin R0, (sdram_addr+0) + cmp R0, END_ADDR0 + jne next_addr_c + xin R0, (sdram_addr+1) + cmp R0, END_ADDR1 + jne next_addr_c + xin R0, (sdram_addr+2) + cmp R0, END_ADDR2 + jeq clear_finished + + ; Advance address counter +next_addr_c: mov R0, BURST_LEN + call AddrCnt_Inc + + jmp sdr_clear + +clear_finished: + call AddrCnt_Disp + call delay1s + ret + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +write_uart_data: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Clear message + mov R1, msg_txt3 + call LCD_putsx + + mov R1, msg_txt3 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 +; mov R0, 0xF8 ; 800x600 +; mov R1, 0x52 ; 800x600 +; mov R2, 0x07 ; 800x600 + mov R0, 0xF8 ; 1280x1024 + mov R1, 0xFF ; 1280x1024 + mov R2, 0x13 ; 1280x1024 + call AddrCnt_Init + +read_bmp: mov R15, 0 +skip_hdr1: call sio_getchar + jc write_uart_data + inc R15 + cmp R15, 10 + jne skip_hdr1 + + call sio_getchar + jc write_uart_data + inc R15 + movc (bmp_offset+0), R0 + + call sio_getchar + jc write_uart_data + inc R15 + movc (bmp_offset+1), R0 + + call sio_getchar + jc write_uart_data + inc R15 + movc (bmp_offset+2), R0 + + call sio_getchar + jc write_uart_data + inc R15 + movc (bmp_offset+3), R0 + + movc R1, (bmp_offset+0) +skip_hdr2: call sio_getchar + jc write_uart_data + inc R15 + cmp R15, R1 + jne skip_hdr2 + +get_pixel: mov R15, 8 + mov R1, pixel_buf+23 +next_pixel: mov R2, 3 +next_color: dec R2 + mov R3, R1 + call sio_getchar + jc sdw_fin + sub R3, R2 + movc (R3), R0 + tst R2 + jnz next_color + sub R1, 3 + dec R15 + jnz next_pixel + + mov R2, BURST_LEN + + ; Fill SDR Buffer + mov R1, pixel_buf +wls: mov R3, sdram_data +wls0: movc R0, (R1) + movx (R3), R0 + inc R1 + inc R3 + cmp R3, sdram_data+6 + jne wls0 + +pwf: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz pwf + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + sub R2, 2 + jnz wls + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + call AddrCnt_Disp + xin R0, (sdram_addr+0) + tst R0 + jnz next_addr + xin R0, (sdram_addr+1) + tst R0 + jnz next_addr + xin R0, (sdram_addr+2) + tst R0 + jz sdw_fin + + ; Advance address counter +next_addr: mov R0, BURST_LEN + call AddrCnt_Dec + jmp get_pixel +sdw_fin: call delay1s + ret + +; ---------------------------------------------------------- +; SDRAM Write +; ---------------------------------------------------------- +do_write: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Write message + mov R1, msg_txt1 + call LCD_putsx + + mov R1, msg_txt1 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + mov R0, START_ADDR0 + mov R1, START_ADDR1 + mov R2, START_ADDR2 + call AddrCnt_Init + movc R0, (round_cnt) + movc (block_cnt), R0 + +sdr_write: mov R2, BURST_LEN + + ; Fill SDR Buffer +sdr_burst_wr: movc R1, (block_cnt) + mov R0, sdram_data + mov R15, 8 +write_loop: movx (R0), R1 + inc R0 + inc R1 + dec R15 + jnz write_loop + +poll_write_full: + xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_WRITE_DATA_FULL + jnz poll_write_full + + ; Fill FIFO + mov R0, FIFO_CTRL_IS_WRITE + xout (sdram_reg), R0 + + movc R0, (block_cnt) + inc R0 + movc (block_cnt), R0 + + sub R2, 2 + jnz sdr_burst_wr + + ; Start SDR write + call wait_cmd_rdy + mov R0, SD_CMD_WRITE + xout (sdram_reg), R0 + + xin R0, (sdram_addr+0) + cmp R0, END_ADDR0 + jne next_addr_w + xin R0, (sdram_addr+1) + cmp R0, END_ADDR1 + jne next_addr_w + xin R0, (sdram_addr+2) + cmp R0, END_ADDR2 + jeq write_finished + + ; Advance address counter +next_addr_w: mov R0, BURST_LEN + call AddrCnt_Inc + + jmp sdr_write + +write_finished: call AddrCnt_Disp + call delay1s + ret + +; ---------------------------------------------------------- +; SDRAM Verify +; ---------------------------------------------------------- +do_read: + ; Clear LCD + mov R0, LCD_CMD_CLEAR + call LCD_writecmd + + ; Print Read message + mov R1, msg_txt2 + call LCD_putsx + + mov R1, msg_txt2 + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + ; Set SDRAM address register to 0 + mov R0, START_ADDR0 + mov R1, START_ADDR1 + mov R2, START_ADDR2 + call AddrCnt_Init + movc R0, (round_cnt) + movc (block_cnt), R0 + + ; flush_data +flush_data: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_READ_DATA_EMPTY + jnz sdr_read + mov R0, FIFO_CTRL_IS_READ + xout (sdram_reg), R0 + jmp flush_data + +sdr_read: ; Start SDR read + call wait_cmd_rdy + mov R0, SD_CMD_READ + xout (sdram_reg), R0 + + mov R3, BURST_LEN + + ; Wait last read +poll_read_fin: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_READ_DATA_EMPTY + jnz poll_read_fin + + ; Verify SDR Buffer + movc R1, (block_cnt) + mov R0, sdram_data + mov R15, 8 +read_loop: movx R2, (R0) + cmp R2, R1 + jne verify_error + inc R0 + inc R1 + dec R15 + jnz read_loop + + ; Advance Read-FIFO + mov R0, FIFO_CTRL_IS_READ + xout (sdram_reg), R0 + + movc R0, (block_cnt) + inc R0 + movc (block_cnt), R0 + + sub R3, 2 + jnz poll_read_fin + + xin R0, (sdram_addr+0) + cmp R0, END_ADDR0 + jne next_addr_r + xin R0, (sdram_addr+1) + cmp R0, END_ADDR1 + jne next_addr_r + xin R0, (sdram_addr+2) + cmp R0, END_ADDR2 + jeq read_finished + + ; Advance address counter +next_addr_r: mov R0, BURST_LEN + call AddrCnt_Inc + jmp sdr_read + +; ---------------------------------------------------------- +wait_cmd_rdy: push R0 +wait4cmd: xin R0, (sdram_reg) + xout (led_port), R0 + and R0, FIFO_STAT_CMD_FULL + jnz wait4cmd + pop R0 + ret + +; ---------------------------------------------------------- +read_finished: +no_error: mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, verify_ok + call LCD_putsx + mov R0, LCD_CMD_Z2 + call LCD_writecmd + call print_addr + + mov R1, verify_ok + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + + jmp ende + +verify_error: mov R0, LCD_CMD_CLEAR + call LCD_writecmd + mov R1, verify_nok + call LCD_putsx + call print_addr + call print_data + mov R1, verify_nok + call cg_clr_puts + mov R1, crlf + call cg_puts_clr + xin R0, (ctrl_reg) + or R0, 0x10 + xout (ctrl_reg), R0 + + jmp ende + +ende: call delay1s + ret + +; ------------------------------------------------- +AddrCnt_Init: xout (sdram_addr+0), R0 + xout (sdram_addr+1), R1 + xout (sdram_addr+2), R2 + ret + +; ------------------------------------------------- +; Parameter +; R0: increment value +AddrCnt_Inc: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + add R1, R0 + addc R2, 0 + addc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Parameter +; R0: decrement value +AddrCnt_Dec: push R1 + push R2 + push R3 + xin R1, (sdram_addr+0) + xin R2, (sdram_addr+1) + xin R3, (sdram_addr+2) + sub R1, R0 + subc R2, 0 + subc R3, 0 + xout (sdram_addr+0), R1 + xout (sdram_addr+1), R2 + xout (sdram_addr+2), R3 + pop R3 + pop R2 + pop R1 + ret + +; ------------------------------------------------- +; Display Address counter +AddrCnt_Disp: mov R0, LCD_CMD_Z2 + call LCD_writecmd + call print_addr + ret + +; ------------------------------------------------- +; PutHexByte +; R0 : Byte value +PutHexByte: push R1 + call bin2hex + call LCD_writechar + mov R0, R1 + call LCD_writechar + pop R1 + ret + +; ------------------------------------------------- +print_addr: push R0 + xin R0, (sdram_addr+2) + call PutHexByte + xin R0, (sdram_addr+1) + call PutHexByte + xin R0, (sdram_addr+0) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +; R1 : ptr to byte array +print_dword: push R0 + add R1, 3 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + dec R1 + movc R0, (R1) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +print_data: push R0 + mov R0, LCD_CMD_Z2 + call LCD_writecmd + movx R0, (sdram_data+7) + call PutHexByte + movx R0, (sdram_data+6) + call PutHexByte + movx R0, (sdram_data+5) + call PutHexByte + movx R0, (sdram_data+4) + call PutHexByte + movx R0, (sdram_data+3) + call PutHexByte + movx R0, (sdram_data+2) + call PutHexByte + movx R0, (sdram_data+1) + call PutHexByte + movx R0, (sdram_data+0) + call PutHexByte + pop R0 + ret + +; ------------------------------------------------- +sio_init: push R0 + mov R0, 13 + xout (uart_baudrate), R0 + mov R0, sio_rx_buf + movc (sio_rx_ptr_r), R0 + movc (sio_rx_ptr_w), R0 + mov R0, SIO_TIMEOUT0 + movc (sio_timeout+0), R0 + mov R0, SIO_TIMEOUT1 + movc (sio_timeout+1), R0 + pop R0 + ret + +; ------------------------------------------------- +; Params: none +; Return: +; R0 : received character +sio_getchar: push R1 + push R2 + push R3 + movc R2, (sio_timeout+0) + movc R3, (sio_timeout+1) + movc R1, (sio_rx_ptr_r) +sio_wait_rx: movc R0, (sio_rx_ptr_w) + cmp R0, R1 + jeq wait_rx_stub + movc R0, (R1) + inc R1 + cmp R1, sio_rx_buf+64 + jne u_upd_r_ptr + mov R1, sio_rx_buf +u_upd_r_ptr: movc (sio_rx_ptr_r), R1 + clrc +ex_sio_gc: pop R3 + pop R2 + pop R1 + ret +wait_rx_stub: call delay1ms + dec R2 + subc R3, 0 + jnz sio_wait_rx + tst R2 + jnz sio_wait_rx +sio_to: setc + jmp ex_sio_gc + +; ------------------------------------------------- +include "../../../lib/jasm/utils.inc.jsm" +include "../../../lib/jasm/lcd.inc.jsm" +include "../../../lib/jasm/cg.inc.jsm" +include "../../../lib/jasm/delays.inc.jsm" +include "../../../lib/jasm/uart.inc.jsm" + \ No newline at end of file diff --git a/projects/cpu/asm/vga_test.tcl b/projects/cpu/asm/vga_test.tcl new file mode 100644 index 0000000..cc0a78c --- /dev/null +++ b/projects/cpu/asm/vga_test.tcl @@ -0,0 +1,2402 @@ +# ---------------------------------------------------------------------- +# Project: JCPU, a portable 8-bit RISC CPU written in VHDL +# This file: The ROM file for upload to target over JTAG +# +# Copyright (C) 2007 J. Ahrensfeld +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation, either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . +# +# For questions and ideas, please contact the author at jens@jayfield.org +# +# --------------------------------------------------------------------- + +# --------------------------------------------------------------------- +# For Chipscope 9.1 +# --------------------------------------------------------------------- +# Source JTAG/TCL frame work +cd $env(CHIPSCOPE)\\bin\\nt +source csejtag.tcl + +namespace import ::chipscope::* + +# Platform USB Cable +set PLATFORM_USB_CABLE_ARGS [list "port=USB2" "frequency=6000000"] +# frequency="24000000 | 12000000 | 6000000 | 3000000 | 1500000 | 750000" + +# Create session +set handle [::chipscope::csejtag_session create 0] + +# Open JTAG and lock +set open_result [::chipscope::csejtag_target open $handle $CSEJTAG_TARGET_PLATFORMUSB 0 $PLATFORM_USB_CABLE_ARGS] +set lock_result [::chipscope::csejtag_target lock $handle 1000] + +set devlist [::chipscope::csejtag_tap autodetect_chain $handle $CSEJTAG_SCAN_DEFAULT] + +# Get Device ID +set devtype "Virtex-4SX" +set devid 2 +set irlength [::chipscope::csejtag_tap get_irlength $handle $devid] +set idcode [::chipscope::csejtag_tap get_device_idcode $handle $devid] + +set CSE_OP $CSEJTAG_SHIFT_READWRITE +set CSE_ES $CSEJTAG_RUN_TEST_IDLE + +# Write Program +# JASM_ROM_INSERT_HERE +# Assembled from vga_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000010) into the Instruction Register of FPGA +# User 1 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C2"] + +# 0x000: JMP 0x033 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00030033" + +# 0x001: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0013C000" + +# 0x002: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0023C001" + +# 0x003: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00328061" + +# 0x004: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00419101" + +# 0x005: JZ 0x015 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00531015" + +# 0x006: XIN R00, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00628020" + +# 0x007: MOVC R01, (0x5F) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0070A5F1" + +# 0x008: MOVC (R00), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0080B010" + +# 0x009: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00911011" + +# 0x00A: CMP R01, 0x5E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00A0F5E1" + +# 0x00B: JNE 0x00D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00B3A00D" + +# 0x00C: MOV R01, 0x1E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00C031E1" + +# 0x00D: MOVC (0x5F), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00D0D5F1" + +# 0x00E: MOVC R00, (0x5E) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00E0A5E0" + +# 0x00F: CMP R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "00F0E010" + +# 0x010: JNE 0x003 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0103A003" + +# 0x011: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01128040" + +# 0x012: OR R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0121B200" + +# 0x013: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01324040" + +# 0x014: JMP 0x003 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01430003" + +# 0x015: CALL 0x019 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0153B019" + +# 0x016: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0163D001" + +# 0x017: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0173D000" + +# 0x018: RETI +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0183F000" + +# 0x019: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01928000" + +# 0x01A: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01A19200" + +# 0x01B: XIN R01, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01B28041" + +# 0x01C: AND R01, 0xDF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01C19DF1" + +# 0x01D: OR R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01D1A010" + +# 0x01E: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01E24040" + +# 0x01F: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "01F28000" + +# 0x020: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02019010" + +# 0x021: JZ 0x029 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02131029" + +# 0x022: MOV R00, 0x14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02203140" + +# 0x023: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02325000" + +# 0x024: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02411010" + +# 0x025: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02525000" + +# 0x026: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02611010" + +# 0x027: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02725000" + +# 0x028: JMP 0x032 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02830032" + +# 0x029: XIN R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02928000" + +# 0x02A: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02A19020" + +# 0x02B: JZ 0x032 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02B31032" + +# 0x02C: MOV R00, 0x14 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02C03140" + +# 0x02D: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02D25000" + +# 0x02E: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02E11010" + +# 0x02F: XOUT (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "02F25000" + +# 0x030: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03011010" + +# 0x031: XOUT (R00), 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03125200" + +# 0x032: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0323E000" + +# 0x033: CALL 0x1CC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0333B1CC" + +# 0x034: CALL 0x201 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0343B201" + +# 0x035: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03503000" + +# 0x036: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03624010" + +# 0x037: MOV R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03703040" + +# 0x038: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03824040" + +# 0x039: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03928040" + +# 0x03A: OR R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03A1B020" + +# 0x03B: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03B24040" + +# 0x03C: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03C03030" + +# 0x03D: COUT (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03D26030" + +# 0x03E: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03E03010" + +# 0x03F: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "03F3B21E" + +# 0x040: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04003000" + +# 0x041: MOV R01, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04103C01" + +# 0x042: XOUT (0x10), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04224101" + +# 0x043: XOUT (0x11), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04324111" + +# 0x044: XOUT (0x12), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04424121" + +# 0x045: CALL 0x292 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0453B292" + +# 0x046: CALL 0x277 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0463B277" + +# 0x047: MOV R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04703031" + +# 0x048: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0483B223" + +# 0x049: MOV R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04903031" + +# 0x04A: CALL 0x283 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04A3B283" + +# 0x04B: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04B03001" + +# 0x04C: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04C3B28F" + +# 0x04D: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04D28040" + +# 0x04E: AND R00, 0xCF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04E19CF0" + +# 0x04F: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "04F24040" + +# 0x050: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05003000" + +# 0x051: MOVC (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0510D010" + +# 0x052: CALL 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0523B086" + +# 0x053: CALL 0x0DF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0533B0DF" + +# 0x054: CALL 0x113 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0543B113" + +# 0x055: MOVC R00, (0x01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0550A010" + +# 0x056: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05611010" + +# 0x057: MOVC (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0570D010" + +# 0x058: JMP 0x053 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05830053" + +# 0x059: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05903010" + +# 0x05A: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05A3B21E" + +# 0x05B: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05B030E1" + +# 0x05C: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05C3B223" + +# 0x05D: MOV R01, 0x0E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05D030E1" + +# 0x05E: CALL 0x28C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05E3B28C" + +# 0x05F: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "05F03001" + +# 0x060: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0603B28F" + +# 0x061: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06103000" + +# 0x062: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06203001" + +# 0x063: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06303002" + +# 0x064: CALL 0x170 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0643B170" + +# 0x065: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06503800" + +# 0x066: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0660308F" + +# 0x067: MOVX (R00), 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06707000" + +# 0x068: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06811010" + +# 0x069: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0691501F" + +# 0x06A: JNZ 0x067 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06A32067" + +# 0x06B: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06B03082" + +# 0x06C: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06C28070" + +# 0x06D: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06D24010" + +# 0x06E: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06E19040" + +# 0x06F: JNZ 0x06C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "06F3206C" + +# 0x070: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07003100" + +# 0x071: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07124070" + +# 0x072: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07215022" + +# 0x073: JNZ 0x06C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0733206C" + +# 0x074: CALL 0x14D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0743B14D" + +# 0x075: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07503060" + +# 0x076: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07624070" + +# 0x077: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07728080" + +# 0x078: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0780FF80" + +# 0x079: JNE 0x080 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0793A080" + +# 0x07A: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07A28090" + +# 0x07B: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07B0FFF0" + +# 0x07C: JNE 0x080 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07C3A080" + +# 0x07D: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07D280A0" + +# 0x07E: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07E0FFF0" + +# 0x07F: JEQ 0x083 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "07F39083" + +# 0x080: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08003080" + +# 0x081: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0813B174" + +# 0x082: JMP 0x06B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0823006B" + +# 0x083: CALL 0x194 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0833B194" + +# 0x084: CALL 0x298 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0843B298" + +# 0x085: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0853E000" + +# 0x086: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08603010" + +# 0x087: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0873B21E" + +# 0x088: MOV R01, 0x39 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08803391" + +# 0x089: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0893B223" + +# 0x08A: MOV R01, 0x39 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08A03391" + +# 0x08B: CALL 0x28C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08B3B28C" + +# 0x08C: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08C03001" + +# 0x08D: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08D3B28F" + +# 0x08E: MOV R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08E03F80" + +# 0x08F: MOV R01, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "08F03FF1" + +# 0x090: MOV R02, 0x13 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09003132" + +# 0x091: CALL 0x170 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0913B170" + +# 0x092: MOV R15, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0920300F" + +# 0x093: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0933B1D8" + +# 0x094: JC 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09433086" + +# 0x095: INC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0951101F" + +# 0x096: CMP R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0960F0AF" + +# 0x097: JNE 0x093 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0973A093" + +# 0x098: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0983B1D8" + +# 0x099: JC 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09933086" + +# 0x09A: INC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09A1101F" + +# 0x09B: MOVC (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09B0D020" + +# 0x09C: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09C3B1D8" + +# 0x09D: JC 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09D33086" + +# 0x09E: INC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09E1101F" + +# 0x09F: MOVC (0x03), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "09F0D030" + +# 0x0A0: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A03B1D8" + +# 0x0A1: JC 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A133086" + +# 0x0A2: INC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A21101F" + +# 0x0A3: MOVC (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A30D040" + +# 0x0A4: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A43B1D8" + +# 0x0A5: JC 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A533086" + +# 0x0A6: INC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A61101F" + +# 0x0A7: MOVC (0x05), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A70D050" + +# 0x0A8: MOVC R01, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A80A021" + +# 0x0A9: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0A93B1D8" + +# 0x0AA: JC 0x086 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AA33086" + +# 0x0AB: INC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AB1101F" + +# 0x0AC: CMP R15, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AC0E01F" + +# 0x0AD: JNE 0x0A9 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AD3A0A9" + +# 0x0AE: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AE0308F" + +# 0x0AF: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0AF031D1" + +# 0x0B0: MOV R02, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B003032" + +# 0x0B1: DEC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B115012" + +# 0x0B2: MOV R03, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B202013" + +# 0x0B3: CALL 0x1D8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B33B1D8" + +# 0x0B4: JC 0x0DD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B4330DD" + +# 0x0B5: SUB R03, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B514023" + +# 0x0B6: MOVC (R00), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B60B030" + +# 0x0B7: TST R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B70F002" + +# 0x0B8: JNZ 0x0B1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B8320B1" + +# 0x0B9: SUB R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0B915031" + +# 0x0BA: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BA1501F" + +# 0x0BB: JNZ 0x0B0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BB320B0" + +# 0x0BC: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BC03082" + +# 0x0BD: MOV R01, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BD03061" + +# 0x0BE: MOV R03, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BE03803" + +# 0x0BF: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0BF09010" + +# 0x0C0: MOVX (R00), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C006030" + +# 0x0C1: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C111011" + +# 0x0C2: INC R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C211013" + +# 0x0C3: CMP R03, 0x86 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C30F863" + +# 0x0C4: JNE 0x0BF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C43A0BF" + +# 0x0C5: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C528070" + +# 0x0C6: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C624010" + +# 0x0C7: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C719040" + +# 0x0C8: JNZ 0x0C5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C8320C5" + +# 0x0C9: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0C903100" + +# 0x0CA: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CA24070" + +# 0x0CB: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CB15022" + +# 0x0CC: JNZ 0x0BE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CC320BE" + +# 0x0CD: CALL 0x14D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CD3B14D" + +# 0x0CE: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CE03060" + +# 0x0CF: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0CF24070" + +# 0x0D0: CALL 0x194 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D03B194" + +# 0x0D1: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D128080" + +# 0x0D2: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D20F000" + +# 0x0D3: JNZ 0x0DA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D3320DA" + +# 0x0D4: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D428090" + +# 0x0D5: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D50F000" + +# 0x0D6: JNZ 0x0DA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D6320DA" + +# 0x0D7: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D7280A0" + +# 0x0D8: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D80F000" + +# 0x0D9: JZ 0x0DD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0D9310DD" + +# 0x0DA: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DA03080" + +# 0x0DB: CALL 0x184 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DB3B184" + +# 0x0DC: JMP 0x0AE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DC300AE" + +# 0x0DD: CALL 0x298 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DD3B298" + +# 0x0DE: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DE3E000" + +# 0x0DF: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0DF03010" + +# 0x0E0: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E03B21E" + +# 0x0E1: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E1031D1" + +# 0x0E2: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E23B223" + +# 0x0E3: MOV R01, 0x1D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E3031D1" + +# 0x0E4: CALL 0x28C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E43B28C" + +# 0x0E5: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E503001" + +# 0x0E6: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E63B28F" + +# 0x0E7: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E703000" + +# 0x0E8: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E803001" + +# 0x0E9: MOV R02, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0E903202" + +# 0x0EA: CALL 0x170 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EA3B170" + +# 0x0EB: MOVC R00, (0x01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EB0A010" + +# 0x0EC: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EC0D000" + +# 0x0ED: MOV R02, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0ED03082" + +# 0x0EE: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EE0A001" + +# 0x0EF: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0EF03800" + +# 0x0F0: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F00308F" + +# 0x0F1: MOVX (R01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F106001" + +# 0x0F2: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F211010" + +# 0x0F3: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F311011" + +# 0x0F4: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F41501F" + +# 0x0F5: JNZ 0x0F1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F5320F1" + +# 0x0F6: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F628070" + +# 0x0F7: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F724010" + +# 0x0F8: AND R00, 0x04 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F819040" + +# 0x0F9: JNZ 0x0F6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0F9320F6" + +# 0x0FA: MOV R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FA03100" + +# 0x0FB: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FB24070" + +# 0x0FC: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FC0A000" + +# 0x0FD: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FD11010" + +# 0x0FE: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FE0D000" + +# 0x0FF: SUB R02, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "0FF15022" + +# 0x100: JNZ 0x0EE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "100320EE" + +# 0x101: CALL 0x14D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1013B14D" + +# 0x102: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10203060" + +# 0x103: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10324070" + +# 0x104: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10428080" + +# 0x105: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1050FF80" + +# 0x106: JNE 0x10D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1063A10D" + +# 0x107: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10728090" + +# 0x108: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1080FFF0" + +# 0x109: JNE 0x10D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1093A10D" + +# 0x10A: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10A280A0" + +# 0x10B: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10B0FFF0" + +# 0x10C: JEQ 0x110 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10C39110" + +# 0x10D: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10D03080" + +# 0x10E: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10E3B174" + +# 0x10F: JMP 0x0ED +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "10F300ED" + +# 0x110: CALL 0x194 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1103B194" + +# 0x111: CALL 0x298 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1113B298" + +# 0x112: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1123E000" + +# 0x113: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11303010" + +# 0x114: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1143B21E" + +# 0x115: MOV R01, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "115032B1" + +# 0x116: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1163B223" + +# 0x117: MOV R01, 0x2B +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "117032B1" + +# 0x118: CALL 0x28C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1183B28C" + +# 0x119: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11903001" + +# 0x11A: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11A3B28F" + +# 0x11B: MOV R00, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11B03000" + +# 0x11C: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11C03001" + +# 0x11D: MOV R02, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11D03202" + +# 0x11E: CALL 0x170 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11E3B170" + +# 0x11F: MOVC R00, (0x01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "11F0A010" + +# 0x120: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1200D000" + +# 0x121: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12128070" + +# 0x122: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12224010" + +# 0x123: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12319200" + +# 0x124: JNZ 0x128 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12432128" + +# 0x125: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12503200" + +# 0x126: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12624070" + +# 0x127: JMP 0x121 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12730121" + +# 0x128: CALL 0x14D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1283B14D" + +# 0x129: MOV R00, 0x05 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12903050" + +# 0x12A: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12A24070" + +# 0x12B: MOV R03, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12B03083" + +# 0x12C: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12C28070" + +# 0x12D: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12D24010" + +# 0x12E: AND R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12E19200" + +# 0x12F: JNZ 0x12C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "12F3212C" + +# 0x130: MOVC R01, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1300A001" + +# 0x131: MOV R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13103800" + +# 0x132: MOV R15, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1320308F" + +# 0x133: MOVX R02, (R00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13304002" + +# 0x134: CMP R02, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1340E012" + +# 0x135: JNE 0x160 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1353A160" + +# 0x136: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13611010" + +# 0x137: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13711011" + +# 0x138: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1381501F" + +# 0x139: JNZ 0x133 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13932133" + +# 0x13A: MOV R00, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13A03200" + +# 0x13B: XOUT (0x07), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13B24070" + +# 0x13C: MOVC R00, (0x00) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13C0A000" + +# 0x13D: INC R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13D11010" + +# 0x13E: MOVC (0x00), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13E0D000" + +# 0x13F: SUB R03, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "13F15023" + +# 0x140: JNZ 0x12C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1403212C" + +# 0x141: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14128080" + +# 0x142: CMP R00, 0xF8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1420FF80" + +# 0x143: JNE 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1433A14A" + +# 0x144: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14428090" + +# 0x145: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1450FFF0" + +# 0x146: JNE 0x14A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1463A14A" + +# 0x147: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "147280A0" + +# 0x148: CMP R00, 0xFF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1480FFF0" + +# 0x149: JEQ 0x154 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14939154" + +# 0x14A: MOV R00, 0x08 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14A03080" + +# 0x14B: CALL 0x174 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14B3B174" + +# 0x14C: JMP 0x128 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14C30128" + +# 0x14D: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14D3C000" + +# 0x14E: XIN R00, (0x07) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14E28070" + +# 0x14F: XOUT (0x01), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "14F24010" + +# 0x150: AND R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15019010" + +# 0x151: JNZ 0x14E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1513214E" + +# 0x152: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1523D000" + +# 0x153: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1533E000" + +# 0x154: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15403010" + +# 0x155: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1553B21E" + +# 0x156: MOV R01, 0x48 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15603481" + +# 0x157: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1573B223" + +# 0x158: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15803C00" + +# 0x159: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1593B21E" + +# 0x15A: CALL 0x19F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15A3B19F" + +# 0x15B: MOV R01, 0x48 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15B03481" + +# 0x15C: CALL 0x28C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15C3B28C" + +# 0x15D: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15D03001" + +# 0x15E: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15E3B28F" + +# 0x15F: JMP 0x16E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "15F3016E" + +# 0x160: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16003010" + +# 0x161: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1613B21E" + +# 0x162: MOV R01, 0x52 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16203521" + +# 0x163: CALL 0x223 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1633B223" + +# 0x164: CALL 0x19F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1643B19F" + +# 0x165: CALL 0x1B7 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1653B1B7" + +# 0x166: MOV R01, 0x52 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16603521" + +# 0x167: CALL 0x28C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1673B28C" + +# 0x168: MOV R01, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16803001" + +# 0x169: CALL 0x28F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1693B28F" + +# 0x16A: XIN R00, (0x04) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16A28040" + +# 0x16B: OR R00, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16B1B100" + +# 0x16C: XOUT (0x04), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16C24040" + +# 0x16D: JMP 0x16E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16D3016E" + +# 0x16E: CALL 0x298 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16E3B298" + +# 0x16F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "16F3E000" + +# 0x170: XOUT (0x08), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17024080" + +# 0x171: XOUT (0x09), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17124091" + +# 0x172: XOUT (0x0A), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "172240A2" + +# 0x173: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1733E000" + +# 0x174: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1743C001" + +# 0x175: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1753C002" + +# 0x176: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1763C003" + +# 0x177: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17728081" + +# 0x178: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17828092" + +# 0x179: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "179280A3" + +# 0x17A: ADD R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17A10001" + +# 0x17B: ADDC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17B13002" + +# 0x17C: ADDC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17C13003" + +# 0x17D: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17D24081" + +# 0x17E: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17E24092" + +# 0x17F: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "17F240A3" + +# 0x180: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1803D003" + +# 0x181: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1813D002" + +# 0x182: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1823D001" + +# 0x183: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1833E000" + +# 0x184: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1843C001" + +# 0x185: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1853C002" + +# 0x186: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1863C003" + +# 0x187: XIN R01, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18728081" + +# 0x188: XIN R02, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18828092" + +# 0x189: XIN R03, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "189280A3" + +# 0x18A: SUB R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18A14001" + +# 0x18B: SUBC R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18B17002" + +# 0x18C: SUBC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18C17003" + +# 0x18D: XOUT (0x08), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18D24081" + +# 0x18E: XOUT (0x09), R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18E24092" + +# 0x18F: XOUT (0x0A), R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "18F240A3" + +# 0x190: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1903D003" + +# 0x191: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1913D002" + +# 0x192: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1923D001" + +# 0x193: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1933E000" + +# 0x194: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19403C00" + +# 0x195: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1953B21E" + +# 0x196: CALL 0x19F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1963B19F" + +# 0x197: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1973E000" + +# 0x198: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1983C001" + +# 0x199: CALL 0x1FA +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1993B1FA" + +# 0x19A: CALL 0x235 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19A3B235" + +# 0x19B: MOV R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19B02010" + +# 0x19C: CALL 0x235 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19C3B235" + +# 0x19D: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19D3D001" + +# 0x19E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19E3E000" + +# 0x19F: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "19F3C000" + +# 0x1A0: XIN R00, (0x0A) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A0280A0" + +# 0x1A1: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A13B198" + +# 0x1A2: XIN R00, (0x09) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A228090" + +# 0x1A3: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A33B198" + +# 0x1A4: XIN R00, (0x08) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A428080" + +# 0x1A5: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A53B198" + +# 0x1A6: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A63D000" + +# 0x1A7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A73E000" + +# 0x1A8: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A83C000" + +# 0x1A9: ADD R01, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1A911031" + +# 0x1AA: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AA09010" + +# 0x1AB: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AB3B198" + +# 0x1AC: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AC15011" + +# 0x1AD: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AD09010" + +# 0x1AE: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AE3B198" + +# 0x1AF: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1AF15011" + +# 0x1B0: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B009010" + +# 0x1B1: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B13B198" + +# 0x1B2: DEC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B215011" + +# 0x1B3: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B309010" + +# 0x1B4: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B43B198" + +# 0x1B5: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B53D000" + +# 0x1B6: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B63E000" + +# 0x1B7: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B73C000" + +# 0x1B8: MOV R00, 0xC0 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B803C00" + +# 0x1B9: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1B93B21E" + +# 0x1BA: MOVX R00, (0x87) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BA05870" + +# 0x1BB: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BB3B198" + +# 0x1BC: MOVX R00, (0x86) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BC05860" + +# 0x1BD: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BD3B198" + +# 0x1BE: MOVX R00, (0x85) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BE05850" + +# 0x1BF: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1BF3B198" + +# 0x1C0: MOVX R00, (0x84) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C005840" + +# 0x1C1: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C13B198" + +# 0x1C2: MOVX R00, (0x83) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C205830" + +# 0x1C3: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C33B198" + +# 0x1C4: MOVX R00, (0x82) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C405820" + +# 0x1C5: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C53B198" + +# 0x1C6: MOVX R00, (0x81) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C605810" + +# 0x1C7: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C73B198" + +# 0x1C8: MOVX R00, (0x80) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C805800" + +# 0x1C9: CALL 0x198 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1C93B198" + +# 0x1CA: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CA3D000" + +# 0x1CB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CB3E000" + +# 0x1CC: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CC3C000" + +# 0x1CD: MOV R00, 0x0D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CD030D0" + +# 0x1CE: XOUT (0x13), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CE24130" + +# 0x1CF: MOV R00, 0x1E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1CF031E0" + +# 0x1D0: MOVC (0x5E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D00D5E0" + +# 0x1D1: MOVC (0x5F), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D10D5F0" + +# 0x1D2: MOV R00, 0xE8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D203E80" + +# 0x1D3: MOVC (0x60), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D30D600" + +# 0x1D4: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D403030" + +# 0x1D5: MOVC (0x61), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D50D610" + +# 0x1D6: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D63D000" + +# 0x1D7: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D73E000" + +# 0x1D8: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D83C001" + +# 0x1D9: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1D93C002" + +# 0x1DA: PUSH R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DA3C003" + +# 0x1DB: MOVC R02, (0x60) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DB0A602" + +# 0x1DC: MOVC R03, (0x61) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DC0A613" + +# 0x1DD: MOVC R01, (0x5E) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DD0A5E1" + +# 0x1DE: MOVC R00, (0x5F) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DE0A5F0" + +# 0x1DF: CMP R00, R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1DF0E010" + +# 0x1E0: JEQ 0x1EC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E0391EC" + +# 0x1E1: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E109010" + +# 0x1E2: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E211011" + +# 0x1E3: CMP R01, 0x5E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E30F5E1" + +# 0x1E4: JNE 0x1E6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E43A1E6" + +# 0x1E5: MOV R01, 0x1E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E5031E1" + +# 0x1E6: MOVC (0x5E), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E60D5E1" + +# 0x1E7: CLRC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E715000" + +# 0x1E8: POP R03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E83D003" + +# 0x1E9: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1E93D002" + +# 0x1EA: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EA3D001" + +# 0x1EB: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EB3E000" + +# 0x1EC: CALL 0x2AD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EC3B2AD" + +# 0x1ED: DEC R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1ED15012" + +# 0x1EE: SUBC R03, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EE17003" + +# 0x1EF: JNZ 0x1DE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1EF321DE" + +# 0x1F0: TST R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F00F002" + +# 0x1F1: JNZ 0x1DE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F1321DE" + +# 0x1F2: SETC +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F22B000" + +# 0x1F3: JMP 0x1E8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F3301E8" + +# 0x1F4: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F4190F0" + +# 0x1F5: CMP R00, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F50F0A0" + +# 0x1F6: JLT 0x1F8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F6351F8" + +# 0x1F7: ADD R00, 0x07 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F711070" + +# 0x1F8: ADD R00, 0x30 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F811300" + +# 0x1F9: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1F93E000" + +# 0x1FA: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FA3C000" + +# 0x1FB: CALL 0x1F4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FB3B1F4" + +# 0x1FC: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FC02001" + +# 0x1FD: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FD3D000" + +# 0x1FE: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FE2A000" + +# 0x1FF: CALL 0x1F4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "1FF3B1F4" + +# 0x200: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2003E000" + +# 0x201: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20103002" + +# 0x202: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20203030" + +# 0x203: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2033B24D" + +# 0x204: CALL 0x2A6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2043B2A6" + +# 0x205: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20503002" + +# 0x206: MOV R00, 0x03 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20603030" + +# 0x207: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2073B24D" + +# 0x208: CALL 0x2A6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2083B2A6" + +# 0x209: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20903002" + +# 0x20A: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20A03020" + +# 0x20B: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20B3B24D" + +# 0x20C: CALL 0x2AD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20C3B2AD" + +# 0x20D: MOV R00, 0x28 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20D03280" + +# 0x20E: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20E3B21E" + +# 0x20F: MOV R00, 0x0C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "20F030C0" + +# 0x210: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2103B21E" + +# 0x211: MOV R00, 0x06 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21103060" + +# 0x212: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2123B21E" + +# 0x213: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21303010" + +# 0x214: CALL 0x21E +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2143B21E" + +# 0x215: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2153E000" + +# 0x216: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2163C000" + +# 0x217: CALL 0x241 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2173B241" + +# 0x218: AND R00, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21819800" + +# 0x219: JZ 0x21C +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2193121C" + +# 0x21A: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21A3B2C4" + +# 0x21B: JMP 0x217 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21B30217" + +# 0x21C: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21C3D000" + +# 0x21D: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21D3E000" + +# 0x21E: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21E3C002" + +# 0x21F: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "21F03002" + +# 0x220: CALL 0x23A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2203B23A" + +# 0x221: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2213D002" + +# 0x222: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2223E000" + +# 0x223: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2233C000" + +# 0x224: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22404010" + +# 0x225: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22511011" + +# 0x226: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2260F000" + +# 0x227: JZ 0x22A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2273122A" + +# 0x228: CALL 0x235 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2283B235" + +# 0x229: JMP 0x224 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22930224" + +# 0x22A: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22A3D000" + +# 0x22B: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22B3E000" + +# 0x22C: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22C3C000" + +# 0x22D: MOVC R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22D09010" + +# 0x22E: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22E11011" + +# 0x22F: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "22F0F000" + +# 0x230: JZ 0x233 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23031233" + +# 0x231: CALL 0x235 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2313B235" + +# 0x232: JMP 0x22D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2323022D" + +# 0x233: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2333D000" + +# 0x234: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2343E000" + +# 0x235: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2353C002" + +# 0x236: MOV R02, 0x40 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23603402" + +# 0x237: CALL 0x23A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2373B23A" + +# 0x238: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2383D002" + +# 0x239: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2393E000" + +# 0x23A: CALL 0x216 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23A3B216" + +# 0x23B: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23B3C000" + +# 0x23C: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23C2A000" + +# 0x23D: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23D3B24D" + +# 0x23E: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23E3D000" + +# 0x23F: CALL 0x24D +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "23F3B24D" + +# 0x240: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2403E000" + +# 0x241: PUSH R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2413C002" + +# 0x242: MOV R02, 0x00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24203002" + +# 0x243: CALL 0x246 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2433B246" + +# 0x244: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2443D002" + +# 0x245: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2453E000" + +# 0x246: CALL 0x260 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2463B260" + +# 0x247: SWAP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2472A000" + +# 0x248: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2483C000" + +# 0x249: CALL 0x260 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2493B260" + +# 0x24A: POP R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24A3D002" + +# 0x24B: OR R00, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24B1A020" + +# 0x24C: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24C3E000" + +# 0x24D: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24D3C001" + +# 0x24E: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24E190F0" + +# 0x24F: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "24F02001" + +# 0x250: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2501A021" + +# 0x251: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25124031" + +# 0x252: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2523B2C4" + +# 0x253: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25302001" + +# 0x254: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2541A021" + +# 0x255: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2551B801" + +# 0x256: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25624031" + +# 0x257: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2573B2C4" + +# 0x258: MOV R01, R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25802001" + +# 0x259: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2591A021" + +# 0x25A: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25A24031" + +# 0x25B: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25B3B2C4" + +# 0x25C: OR R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25C1B201" + +# 0x25D: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25D24031" + +# 0x25E: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25E3D001" + +# 0x25F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "25F3E000" + +# 0x260: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2603C001" + +# 0x261: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26103201" + +# 0x262: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2621A021" + +# 0x263: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26324031" + +# 0x264: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2643B2C4" + +# 0x265: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26503201" + +# 0x266: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2661A021" + +# 0x267: OR R01, 0x80 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2671B801" + +# 0x268: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26824031" + +# 0x269: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2693B2C4" + +# 0x26A: XIN R00, (0x03) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26A28030" + +# 0x26B: AND R00, 0x0F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26B190F0" + +# 0x26C: MOV R01, 0x20 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26C03201" + +# 0x26D: OR R01, R02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26D1A021" + +# 0x26E: XOUT (0x03), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26E24031" + +# 0x26F: CALL 0x2C4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "26F3B2C4" + +# 0x270: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2703D001" + +# 0x271: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2713E000" + +# 0x272: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2723C000" + +# 0x273: MOV R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27303020" + +# 0x274: XOUT (0x0E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "274240E0" + +# 0x275: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2753D000" + +# 0x276: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2763E000" + +# 0x277: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2773C000" + +# 0x278: MOV R00, 0x01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27803010" + +# 0x279: XOUT (0x0E), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "279240E0" + +# 0x27A: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27A3D000" + +# 0x27B: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27B3E000" + +# 0x27C: CALL 0x292 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27C3B292" + +# 0x27D: XOUT (0x0C), R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27D240C1" + +# 0x27E: XOUT (0x0B), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27E240B0" + +# 0x27F: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "27F3E000" + +# 0x280: CALL 0x292 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2803B292" + +# 0x281: XOUT (0x0D), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "281240D0" + +# 0x282: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2823E000" + +# 0x283: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2833C000" + +# 0x284: MOVX R00, (R01) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28404010" + +# 0x285: INC R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28511011" + +# 0x286: TST R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2860F000" + +# 0x287: JZ 0x28A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2873128A" + +# 0x288: CALL 0x280 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2883B280" + +# 0x289: JMP 0x284 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28930284" + +# 0x28A: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28A3D000" + +# 0x28B: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28B3E000" + +# 0x28C: CALL 0x272 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28C3B272" + +# 0x28D: CALL 0x283 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28D3B283" + +# 0x28E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28E3E000" + +# 0x28F: CALL 0x283 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "28F3B283" + +# 0x290: CALL 0x272 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2903B272" + +# 0x291: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2913E000" + +# 0x292: PUSH R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2923C000" + +# 0x293: XIN R00, (0x0E) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "293280E0" + +# 0x294: AND R00, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29419020" + +# 0x295: JZ 0x293 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29531293" + +# 0x296: POP R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2963D000" + +# 0x297: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2973E000" + +# 0x298: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2983C00F" + +# 0x299: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "299030AF" + +# 0x29A: CALL 0x29F +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29A3B29F" + +# 0x29B: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29B1501F" + +# 0x29C: JNZ 0x29A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29C3229A" + +# 0x29D: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29D3D00F" + +# 0x29E: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29E3E000" + +# 0x29F: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "29F3C00F" + +# 0x2A0: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A0030AF" + +# 0x2A1: CALL 0x2A6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A13B2A6" + +# 0x2A2: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A21501F" + +# 0x2A3: JNZ 0x2A1 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A3322A1" + +# 0x2A4: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A43D00F" + +# 0x2A5: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A53E000" + +# 0x2A6: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A63C00F" + +# 0x2A7: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A7030AF" + +# 0x2A8: CALL 0x2AD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A83B2AD" + +# 0x2A9: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2A91501F" + +# 0x2AA: JNZ 0x2A8 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AA322A8" + +# 0x2AB: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AB3D00F" + +# 0x2AC: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AC3E000" + +# 0x2AD: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AD3C00F" + +# 0x2AE: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AE030AF" + +# 0x2AF: CALL 0x2B4 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2AF3B2B4" + +# 0x2B0: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B01501F" + +# 0x2B1: JNZ 0x2AF +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B1322AF" + +# 0x2B2: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B23D00F" + +# 0x2B3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B33E000" + +# 0x2B4: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B43C00F" + +# 0x2B5: MOV R15, 0x0A +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B5030AF" + +# 0x2B6: CALL 0x2BB +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B63B2BB" + +# 0x2B7: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B71501F" + +# 0x2B8: JNZ 0x2B6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B8322B6" + +# 0x2B9: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2B93D00F" + +# 0x2BA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BA3E000" + +# 0x2BB: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BB3C00F" + +# 0x2BC: MOV R15, 0x63 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BC0363F" + +# 0x2BD: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BD00000" + +# 0x2BE: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BE00000" + +# 0x2BF: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2BF00000" + +# 0x2C0: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C01501F" + +# 0x2C1: JNZ 0x2BD +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C1322BD" + +# 0x2C2: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C23D00F" + +# 0x2C3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C33E000" + +# 0x2C4: PUSH R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C43C00F" + +# 0x2C5: MOV R15, 0x09 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C50309F" + +# 0x2C6: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C600000" + +# 0x2C7: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C700000" + +# 0x2C8: NOP +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C800000" + +# 0x2C9: DEC R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2C91501F" + +# 0x2CA: JNZ 0x2C6 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CA322C6" + +# 0x2CB: POP R15 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CB3D00F" + +# 0x2CC: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CC3E000" + +# 0x2CD: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CD3C001" + +# 0x2CE: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CE28061" + +# 0x2CF: AND R01, 0x02 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2CF19021" + +# 0x2D0: JNZ 0x2CE +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D0322CE" + +# 0x2D1: XOUT (0x02), R00 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D124020" + +# 0x2D2: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D23D001" + +# 0x2D3: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D33E000" + +# 0x2D4: PUSH R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D43C001" + +# 0x2D5: XIN R01, (0x06) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D528061" + +# 0x2D6: AND R01, 0x10 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D619101" + +# 0x2D7: JZ 0x2D5 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D7312D5" + +# 0x2D8: XIN R00, (0x02) +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D828020" + +# 0x2D9: POP R01 +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2D93D001" + +# 0x2DA: RET +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 32 "2DA3E000" + +# Assembled from vga_test.jsm +# --------------------------------------------------------------- +# Shift the USER2 Instruction (b1111000011) into the Instruction Register of FPGA +# User 2 +set result [::chipscope::csejtag_tap shift_device_ir $handle $devid $CSE_OP $CSE_ES 0 $irlength "3C3"] + +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "000D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "010A" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "074D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0820" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0954" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0B73" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0C74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0E43" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "0F6C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1065" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1161" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1272" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1369" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "146E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1567" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1620" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1753" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1844" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1952" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1A41" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1B4D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1D57" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1E72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "1F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2074" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2169" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "226E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2367" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2420" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2553" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2644" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2752" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2841" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "294D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2B52" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2C65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2D61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2E64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "2F69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "306E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3167" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3220" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3353" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3444" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3552" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3641" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "374D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3952" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3A65" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3B61" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3C64" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3D69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3E6E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "3F67" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4020" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4142" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4269" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4374" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "446D" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4561" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4670" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4856" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4965" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4A72" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4B69" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4C66" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4D79" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4E20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "4F4F" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "504B" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5246" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5361" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5469" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "556C" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5665" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5764" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5820" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5961" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5A74" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5B20" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5D2E" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "5F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "6F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7700" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7800" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7900" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7A00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7B00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7C00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7D00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7E00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "7F00" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8000" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8100" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8200" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8300" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8400" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8500" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8600" +::chipscope::csejtag_tap shift_device_dr $handle $devid $CSE_OP $CSE_ES 0 16 "8700" + +::chipscope::csejtag_target unlock $handle +::chipscope::csejtag_target close $handle +::chipscope::csejtag_session destroy $handle +exit diff --git a/projects/cpu/asm/xregs.inc.jsm b/projects/cpu/asm/xregs.inc.jsm new file mode 100644 index 0000000..f258191 --- /dev/null +++ b/projects/cpu/asm/xregs.inc.jsm @@ -0,0 +1,41 @@ +; External registers +btn_port: equ 0x00 ; RO +led_port: equ 0x01 ; R/W +uart_data: equ 0x02 ; R/W +lcd_port: equ 0x03 ; R/W +ctrl_reg: equ 0x04 ; R/W +CTRL_VGA_ENABLE: equ 0x04 +CTRL_TIMER_ENABLE: equ 0x02 +dip_port: equ 0x05 ; RO +uart_status: equ 0x06 ; RO +sdram_reg: equ 0x07 ; R/W +FIFO_CTRL_IS_CMD: equ 0x04 +FIFO_CTRL_IS_WRITE: equ 0x10 +FIFO_CTRL_IS_READ: equ 0x20 +FIFO_STAT_CMD_FULL: equ 0x01 +FIFO_STAT_CMD_EMPTY: equ 0x02 +FIFO_STAT_WRITE_DATA_FULL: equ 0x04 +FIFO_STAT_WRITE_DATA_EMPTY: equ 0x08 +FIFO_STAT_READ_DATA_FULL: equ 0x10 +FIFO_STAT_READ_DATA_EMPTY: equ 0x20 +sdram_addr: equ 0x08 ; R/W +sdram_addr0: equ 0x08 ; R/W +sdram_addr1: equ 0x09 ; R/W +sdram_addr2: equ 0x0A ; R/W +reg_cg_char_addr: equ 0x0B ; RW +reg_cg_line_addr: equ 0x0C ; RW +reg_cg_data: equ 0x0D ; RW +reg_cg_ctrl: equ 0x0E ; WO +reg_hwstat: equ 0x0E ; RO +reg_color_red: equ 0x10 ; RW +reg_color_grn: equ 0x11 ; RW +reg_color_blu: equ 0x12 ; RW +uart_baudrate: equ 0x13 ; R/W +vga_read_addr: equ 0x14 ; R/W +vga_read_addr0: equ 0x14 ; R/W +vga_read_addr1: equ 0x15 ; R/W +vga_read_addr2: equ 0x16 ; R/W +timer_reload: equ 0x17 ; R/W +timer_reload0: equ 0x17 ; R/W +timer_reload1: equ 0x18 ; R/W +timer_reload2: equ 0x19 ; R/W diff --git a/projects/cpu/doc/cpu.vsd b/projects/cpu/doc/cpu.vsd new file mode 100644 index 0000000..d9aa2b9 Binary files /dev/null and b/projects/cpu/doc/cpu.vsd differ diff --git a/projects/cpu/doc/cpu20070129.vsd b/projects/cpu/doc/cpu20070129.vsd new file mode 100644 index 0000000..18beb14 Binary files /dev/null and b/projects/cpu/doc/cpu20070129.vsd differ diff --git a/projects/cpu/doc/cpu20070130.vsd b/projects/cpu/doc/cpu20070130.vsd new file mode 100644 index 0000000..b47dd71 Binary files /dev/null and b/projects/cpu/doc/cpu20070130.vsd differ diff --git a/projects/cpu/doc/cpu20070131.vsd b/projects/cpu/doc/cpu20070131.vsd new file mode 100644 index 0000000..40aecfe Binary files /dev/null and b/projects/cpu/doc/cpu20070131.vsd differ diff --git a/projects/cpu/doc/cpu20070203.vsd b/projects/cpu/doc/cpu20070203.vsd new file mode 100644 index 0000000..3b7cd2e Binary files /dev/null and b/projects/cpu/doc/cpu20070203.vsd differ diff --git a/projects/cpu/doc/cpu20070315.vsd b/projects/cpu/doc/cpu20070315.vsd new file mode 100644 index 0000000..88a6e2e Binary files /dev/null and b/projects/cpu/doc/cpu20070315.vsd differ diff --git a/projects/cpu/doc/cpu20070404.vsd b/projects/cpu/doc/cpu20070404.vsd new file mode 100644 index 0000000..f819bd8 Binary files /dev/null and b/projects/cpu/doc/cpu20070404.vsd differ diff --git a/projects/cpu/doc/timing_template.vss b/projects/cpu/doc/timing_template.vss new file mode 100644 index 0000000..2c38de8 Binary files /dev/null and b/projects/cpu/doc/timing_template.vss differ diff --git a/projects/cpu/sim/tb_systest.fdo b/projects/cpu/sim/tb_systest.fdo new file mode 100644 index 0000000..25566ba --- /dev/null +++ b/projects/cpu/sim/tb_systest.fdo @@ -0,0 +1,51 @@ +## NOTE: Do not edit this file. +## Autogenerated by ProjNav (creatfdo.tcl) on Sat Feb 24 12:58:28 Westeuropäische Normalzeit 2007 +## +vlib work +# CPU +vcom -explicit -93 "../../../lib/FIFO/src/fifo_ctrl_pkg.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_types.vhd" +vcom -explicit -93 "../src/systest/sdram_config.vhd" +vcom -explicit -93 "../../../lib/misc/utils_pkg.vhd" +vcom -explicit -93 "../../../lib/FIFO/src/gray_counter.vhd" +vcom -explicit -93 "../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_sync.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/dpram.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/sdram_types.vhd" +vcom -explicit -93 "../../../lib/FIFO/src/async_fifo_ctrl.vhd" +vcom -explicit -93 "../src/systest/sdram_test_short_irom_ld.vhdl" +vcom -explicit -93 "../../../lib/uart/kcuart_tx.vhd" +vcom -explicit -93 "../../../lib/uart/kcuart_rx.vhd" +vcom -explicit -93 "../../../lib/uart/bbfifo_16x8.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_timing.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/linefifo.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/clkgen_virtex4.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/sdram_ctrl.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/sdram_cmd.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/reset_virtex4.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/ddr_phy_virtex4.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/clockgen_virtex4.vhd" +vcom -explicit -93 "../../../lib/FIFO/src/sync_fifo_ctrl.vhd" +vcom -explicit -93 "../src/systest/sdram_test_short_xrom_ld.vhdl" +vcom -explicit -93 "../src/systest/cpu_embedded.vhd" +vcom -explicit -93 "../../../lib/uart/uart_tx.vhd" +vcom -explicit -93 "../../../lib/uart/uart_rx.vhd" +vcom -explicit -93 "../../../lib/misc/lcd_port.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_backend.vhd" +vcom -explicit -93 "../../../lib/VGA_ctrl/src/char_gen.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/sdram_ctrl_top.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/fifo_sync.vhd" + +# Top and TB +vcom -explicit -93 "../src/systest/systest.vhd" +vcom -explicit -93 "../src/systest/tb_systest.vhd" + +vsim -t 1ps -lib work tb_systest +do {tb_systest.wdo} +view wave +view structure +view signals +run 200us + + \ No newline at end of file diff --git a/projects/cpu/sim/tb_systest.mdo b/projects/cpu/sim/tb_systest.mdo new file mode 100644 index 0000000..f1830ff --- /dev/null +++ b/projects/cpu/sim/tb_systest.mdo @@ -0,0 +1,18 @@ +## NOTE: Do not edit this file. +## Auto generated by Project Navigator for Post-Map Simulation +## +vlib work +## Compile Post-Map Model +vcom -explicit -93 "../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd" +vcom -explicit -93 "../src/systest/ddr_sdr_conf_pkg.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_2/src/mt46v16m16.vhd" +vcom -93 "../ise91/systest/netgen/map/systest_map.vhd" +vcom -93 "../src/systest/tb_systest.vhd" +vsim -t 1ps -sdfmax "/UUT=../ise91/systest/netgen/map/systest_map.sdf" -lib work tb_systest +#do {tb_systest.wdo} +view wave +add wave * +view structure +view signals +run 2us +## End diff --git a/projects/cpu/sim/tb_systest.ndo b/projects/cpu/sim/tb_systest.ndo new file mode 100644 index 0000000..6d35c63 --- /dev/null +++ b/projects/cpu/sim/tb_systest.ndo @@ -0,0 +1,18 @@ +## NOTE: Do not edit this file. +## Auto generated by Project Navigator for Post-Translate Simulation +## +vlib work +## Compile Post-Translate Model +vcom -explicit -93 "../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd" +vcom -explicit -93 "../src/systest/ddr_sdr_conf_pkg.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_2/src/mt46v16m16.vhd" +vcom -93 "../ise91/systest/netgen/translate/systest_translate.vhd" +vcom -93 "../src/systest/tb_systest.vhd" +vsim -t 1ps -lib work tb_systest +#do {tb_systest.wdo} +view wave +add wave * +view structure +view signals +run 5us +## End diff --git a/projects/cpu/sim/tb_systest.tdo b/projects/cpu/sim/tb_systest.tdo new file mode 100644 index 0000000..ef56c8d --- /dev/null +++ b/projects/cpu/sim/tb_systest.tdo @@ -0,0 +1,18 @@ +## NOTE: Do not edit this file. +## Auto generated by Project Navigator for Post-PAR Simulation +## +vlib work +## Compile Post-PAR Model +vcom -explicit -93 "../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd" +vcom -explicit -93 "../src/systest/sdr_config_pkg.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/sdr_pkg.vhd" +vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/mt46v16m16.vhd" +vcom -93 "../ise91/systest/netgen/par/systest_timesim.vhd" +vcom -93 "../src/systest/tb_systest.vhd" +vsim -t 1ps -sdfmax "/UUT=../ise91/systest/netgen/par/systest_timesim.sdf" -lib work tb_systest +view wave +do {tb_systest.wtdo} +view structure +view signals +run 20us +## End diff --git a/projects/cpu/sim/tb_systest.wdo b/projects/cpu/sim/tb_systest.wdo new file mode 100644 index 0000000..de7e8a0 --- /dev/null +++ b/projects/cpu/sim/tb_systest.wdo @@ -0,0 +1,96 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider {DDR-CPU I/F} +add wave -noupdate -divider LCD +add wave -noupdate -divider UART +add wave -noupdate -divider {DDR Ctrl SDRAM} +add wave -noupdate -divider {CPU chipram} +add wave -noupdate -divider CPU +add wave -noupdate -divider {DDR Ctrl Host} +add wave -noupdate -divider DCMs +add wave -noupdate -divider {DDR-CPU I/F} +add wave -noupdate -divider DCMs +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/cmd_fifo_dout +add wave -noupdate -format Logic /tb_systest/uut/cmd_fifo_re +add wave -noupdate -format Logic /tb_systest/uut/cmd_fifo_empty +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/cmd_fifo_din +add wave -noupdate -format Logic /tb_systest/uut/cmd_fifo_we +add wave -noupdate -format Logic /tb_systest/uut/cmd_fifo_full +add wave -noupdate -format Logic /tb_systest/uut/sd_cpu_request +add wave -noupdate -format Logic /tb_systest/uut/sd_vga_request +add wave -noupdate -format Logic /tb_systest/uut/sd_cpu_access +add wave -noupdate -format Logic /tb_systest/uut/sd_vga_access +add wave -noupdate -divider {DDR-CPU I/F} +add wave -noupdate -format Logic /tb_systest/uut/clk +add wave -noupdate -format Logic /tb_systest/uut/rst +add wave -noupdate -format Logic /tb_systest/sys_tx +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_fb +add wave -noupdate -format Logic /tb_systest/sys_rst_n_in +add wave -noupdate -format Logic /tb_systest/sys_clk_in +add wave -noupdate -format Literal /tb_systest/sys_error +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/btn +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/led +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/cpu_din +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/cpu_dout +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/cpu_addr +add wave -noupdate -format Logic /tb_systest/uut/cpu_we +add wave -noupdate -format Literal /tb_systest/uut/uart_status_port +add wave -noupdate -format Logic /tb_systest/uut/cpu_re +add wave -noupdate -format Logic /tb_systest/uut/write_to_uart +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_data +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_buf_in +add wave -noupdate -format Logic /tb_systest/uut/clk +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_udata_out_q +add wave -noupdate -format Logic -radix hexadecimal /tb_systest/uut/sdr_udata_vld_q +add wave -noupdate -divider LCD +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sys_lcd_d +add wave -noupdate -format Logic /tb_systest/uut/sys_lcd_e +add wave -noupdate -format Logic /tb_systest/uut/sys_lcd_rs +add wave -noupdate -format Logic /tb_systest/uut/sys_lcd_rw +add wave -noupdate -divider UART +add wave -noupdate -format Logic /tb_systest/sys_rx +add wave -noupdate -format Logic /tb_systest/sys_tx +add wave -noupdate -divider {DDR Ctrl SDRAM} +add wave -noupdate -format Logic /tb_systest/refresh +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_p +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_n +add wave -noupdate -format Logic /tb_systest/sys_sdr_cke_q +add wave -noupdate -format Logic /tb_systest/sys_sdr_cs_qn +add wave -noupdate -format Logic /tb_systest/sys_sdr_ras_qn +add wave -noupdate -format Logic /tb_systest/sys_sdr_cas_qn +add wave -noupdate -format Logic /tb_systest/sys_sdr_we_qn +add wave -noupdate -format Literal /tb_systest/sys_sdr_dm_q +add wave -noupdate -format Literal /tb_systest/sys_sdr_dqs_q +add wave -noupdate -format Literal /tb_systest/sys_sdr_ba_q +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/sys_sdr_a_q +add wave -noupdate -format Logic /tb_systest/uut/clk +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/sys_sdr_data +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_udata_out_q +add wave -noupdate -divider {DDR Ctrl Host} +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_buf_in +add wave -noupdate -format Literal /tb_systest/uut/sdr_ucmd +add wave -noupdate -format Logic /tb_systest/uut/sdr_ucmd_vld +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_addr +add wave -noupdate -format Logic /tb_systest/uut/sdr_busy_q +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_udata_in +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_udata_out_q +add wave -noupdate -format Logic /tb_systest/uut/sdr_udata_vld_q +add wave -noupdate -divider DCMs +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_fb +add wave -noupdate -divider {DDR-CPU I/F} +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {13733736 ps} 0} +configure wave -namecolwidth 205 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +update +WaveRestoreZoom {13683002 ps} {13792198 ps} diff --git a/projects/cpu/sim/tb_systest.wtdo b/projects/cpu/sim/tb_systest.wtdo new file mode 100644 index 0000000..e06fcfd --- /dev/null +++ b/projects/cpu/sim/tb_systest.wtdo @@ -0,0 +1,50 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -format Logic /tb_systest/sys_rst_n_in +add wave -noupdate -format Logic /tb_systest/sys_clk_in +add wave -noupdate -format Literal /tb_systest/sys_error +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_buf_in +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/uut/sdr_buf_out +add wave -noupdate -format Logic /tb_systest/uut/clk +add wave -noupdate -format Literal /tb_systest/dip +add wave -noupdate -format Literal /tb_systest/btn +add wave -noupdate -format Literal /tb_systest/led +add wave -noupdate -format Logic -label Data_vld /tb_systest/uut/inst_sdram_ctrl_inst_ddr_phy_sdr_data_vld_53 +add wave -noupdate -format Logic /tb_systest/sys_rx +add wave -noupdate -format Logic /tb_systest/sys_tx +add wave -noupdate -format Literal /tb_systest/sys_lcd_d +add wave -noupdate -format Logic /tb_systest/sys_lcd_e +add wave -noupdate -format Logic /tb_systest/sys_lcd_rs +add wave -noupdate -format Logic /tb_systest/sys_lcd_rw +add wave -noupdate -format Logic /tb_systest/refresh +add wave -noupdate -format Logic -label Read_clk /tb_systest/uut/inst_sdram_ctrl_inst_clockgen_read_clk0 +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_fb +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_p +add wave -noupdate -format Logic /tb_systest/sys_sdr_clk_n +add wave -noupdate -format Logic /tb_systest/sys_sdr_cke_q +add wave -noupdate -format Logic /tb_systest/sys_sdr_cs_qn +add wave -noupdate -format Logic /tb_systest/sys_sdr_ras_qn +add wave -noupdate -format Logic /tb_systest/sys_sdr_cas_qn +add wave -noupdate -format Logic /tb_systest/sys_sdr_we_qn +add wave -noupdate -format Literal /tb_systest/sys_sdr_dm_q +add wave -noupdate -format Literal /tb_systest/sys_sdr_dqs_q +add wave -noupdate -format Literal /tb_systest/sys_sdr_ba_q +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/sys_sdr_a_q +add wave -noupdate -format Literal -radix hexadecimal /tb_systest/sys_sdr_data +add wave -noupdate -format Logic /tb_systest/uut/clk +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {10626080 ps} 0} {{Cursor 4} {15061456 ps} 0} {{Cursor 3} {15953324 ps} 0} +configure wave -namecolwidth 164 +configure wave -valuecolwidth 134 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +update +WaveRestoreZoom {15924926 ps} {15982360 ps} diff --git a/projects/cpu/src/systest/counter_irom.vhdl b/projects/cpu/src/systest/counter_irom.vhdl new file mode 100644 index 0000000..98ff864 --- /dev/null +++ b/projects/cpu/src/systest/counter_irom.vhdl @@ -0,0 +1,1086 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); +END irom; + +ARCHITECTURE counter OF irom IS + + type imem_rom_t is array (0 to 1023) of inst_t; + + -- Assembled from counter.jsm + constant imem_rom : imem_rom_t := + ( + "110000" & X"3FF", -- 0x000: JMP 0x3FF + "111100" & X"000", -- 0x001: PUSH R00 + "111100" & X"001", -- 0x002: PUSH R01 + "111100" & X"002", -- 0x003: PUSH R02 + "111100" & X"003", -- 0x004: PUSH R03 + "111100" & X"004", -- 0x005: PUSH R04 + "111100" & X"005", -- 0x006: PUSH R05 + "111100" & X"006", -- 0x007: PUSH R06 + "111100" & X"007", -- 0x008: PUSH R07 + "111100" & X"008", -- 0x009: PUSH R08 + "111100" & X"009", -- 0x00A: PUSH R09 + "111100" & X"00A", -- 0x00B: PUSH R10 + "111100" & X"00B", -- 0x00C: PUSH R11 + "111100" & X"00C", -- 0x00D: PUSH R12 + "111100" & X"00D", -- 0x00E: PUSH R13 + "111100" & X"00E", -- 0x00F: PUSH R14 + "111100" & X"00F", -- 0x010: PUSH R15 + "101000" & X"060", -- 0x011: XIN R00, (0x06) + "011001" & X"100", -- 0x012: AND R00, 0x10 + "110001" & X"020", -- 0x013: JZ 0x020 + "101000" & X"020", -- 0x014: XIN R00, (0x02) + "001111" & X"0D0", -- 0x015: CMP R00, 0x0D + "111001" & X"01B", -- 0x016: JEQ 0x01B + "001010" & X"1E1", -- 0x017: MOVC R01, (0x1E) + "001011" & X"010", -- 0x018: MOVC (R00), R01 + "001111" & X"1D1", -- 0x019: CMP R01, 0x1D + "110101" & X"01E", -- 0x01A: JLT 0x01E + "000011" & X"0E1", -- 0x01B: MOV R01, 0x0E + "010101" & X"011", -- 0x01C: DEC R01 + "001101" & X"1F1", -- 0x01D: MOVC (0x1F), R01 + "010001" & X"011", -- 0x01E: INC R01 + "001101" & X"1E1", -- 0x01F: MOVC (0x1E), R01 + "111011" & X"098", -- 0x020: CALL 0x098 + "111101" & X"00F", -- 0x021: POP R15 + "111101" & X"00E", -- 0x022: POP R14 + "111101" & X"00D", -- 0x023: POP R13 + "111101" & X"00C", -- 0x024: POP R12 + "111101" & X"00B", -- 0x025: POP R11 + "111101" & X"00A", -- 0x026: POP R10 + "111101" & X"009", -- 0x027: POP R09 + "111101" & X"008", -- 0x028: POP R08 + "111101" & X"007", -- 0x029: POP R07 + "111101" & X"006", -- 0x02A: POP R06 + "111101" & X"005", -- 0x02B: POP R05 + "111101" & X"004", -- 0x02C: POP R04 + "111101" & X"003", -- 0x02D: POP R03 + "111101" & X"002", -- 0x02E: POP R02 + "111101" & X"001", -- 0x02F: POP R01 + "111101" & X"000", -- 0x030: POP R00 + "111111" & X"000", -- 0x031: RETI + "111011" & X"092", -- 0x032: CALL 0x092 + "111011" & X"0C8", -- 0x033: CALL 0x0C8 + "000011" & X"000", -- 0x034: MOV R00, 0x00 + "001101" & X"0C0", -- 0x035: MOVC (0x0C), R00 + "100100" & X"010", -- 0x036: XOUT (0x01), R00 + "001101" & X"1F0", -- 0x037: MOVC (0x1F), R00 + "101000" & X"001", -- 0x038: XIN R01, (0x00) + "011011" & X"801", -- 0x039: OR R01, 0x80 + "001101" & X"0D1", -- 0x03A: MOVC (0x0D), R01 + "000011" & X"0E0", -- 0x03B: MOV R00, 0x0E + "001101" & X"1E0", -- 0x03C: MOVC (0x1E), R00 + "000011" & X"040", -- 0x03D: MOV R00, 0x04 + "100101" & X"020", -- 0x03E: XOUT (R00), 0x02 + "100101" & X"030", -- 0x03F: XOUT (R00), 0x03 + "000011" & X"640", -- 0x040: MOV R00, 0x64 + "001101" & X"0C0", -- 0x041: MOVC (0x0C), R00 + "000011" & X"030", -- 0x042: MOV R00, 0x03 + "100110" & X"030", -- 0x043: COUT (0x03), R00 + "000011" & X"010", -- 0x044: MOV R00, 0x01 + "111011" & X"0E5", -- 0x045: CALL 0x0E5 + "000011" & X"001", -- 0x046: MOV R01, 0x00 + "111011" & X"0EA", -- 0x047: CALL 0x0EA + "101001" & X"000", -- 0x048: CIN R00, (0x00) + "010001" & X"300", -- 0x049: ADD R00, 0x30 + "111011" & X"0FC", -- 0x04A: CALL 0x0FC + "000011" & X"000", -- 0x04B: MOV R00, 0x00 + "100110" & X"010", -- 0x04C: COUT (0x01), R00 + "000011" & X"001", -- 0x04D: MOV R01, 0x00 + "001101" & X"201", -- 0x04E: MOVC (0x20), R01 + "000011" & X"010", -- 0x04F: MOV R00, 0x01 + "100110" & X"010", -- 0x050: COUT (0x01), R00 + "000011" & X"AA1", -- 0x051: MOV R01, 0xAA + "001101" & X"201", -- 0x052: MOVC (0x20), R01 + "000011" & X"000", -- 0x053: MOV R00, 0x00 + "100110" & X"010", -- 0x054: COUT (0x01), R00 + "001010" & X"200", -- 0x055: MOVC R00, (0x20) + "001111" & X"AA0", -- 0x056: CMP R00, 0xAA + "111001" & X"05D", -- 0x057: JEQ 0x05D + "000011" & X"010", -- 0x058: MOV R00, 0x01 + "100110" & X"010", -- 0x059: COUT (0x01), R00 + "001010" & X"200", -- 0x05A: MOVC R00, (0x20) + "001111" & X"AA0", -- 0x05B: CMP R00, 0xAA + "111001" & X"05E", -- 0x05C: JEQ 0x05E + "110000" & X"05D", -- 0x05D: JMP 0x05D + "000011" & X"000", -- 0x05E: MOV R00, 0x00 + "100110" & X"010", -- 0x05F: COUT (0x01), R00 + "000001" & X"000", -- 0x060: HALT + "001010" & X"0C0", -- 0x061: MOVC R00, (0x0C) + "010101" & X"010", -- 0x062: DEC R00 + "001101" & X"0C0", -- 0x063: MOVC (0x0C), R00 + "110010" & X"060", -- 0x064: JNZ 0x060 + "000011" & X"647", -- 0x065: MOV R07, 0x64 + "001010" & X"041", -- 0x066: MOVC R01, (0x04) + "001010" & X"052", -- 0x067: MOVC R02, (0x05) + "101010" & X"001", -- 0x068: SWAP R01 + "011100" & X"021", -- 0x069: XOR R01, R02 + "011001" & X"021", -- 0x06A: AND R01, 0x02 + "110010" & X"06F", -- 0x06B: JNZ 0x06F + "010101" & X"017", -- 0x06C: DEC R07 + "000011" & X"2D0", -- 0x06D: MOV R00, 0x2D + "110000" & X"071", -- 0x06E: JMP 0x071 + "010001" & X"017", -- 0x06F: INC R07 + "000011" & X"2B0", -- 0x070: MOV R00, 0x2B + "001101" & X"0C7", -- 0x071: MOVC (0x0C), R07 + "111011" & X"0BA", -- 0x072: CALL 0x0BA + "001010" & X"0D0", -- 0x073: MOVC R00, (0x0D) + "100000" & X"000", -- 0x074: ROL R00 + "001101" & X"0D0", -- 0x075: MOVC (0x0D), R00 + "100100" & X"010", -- 0x076: XOUT (0x01), R00 + "001010" & X"1F0", -- 0x077: MOVC R00, (0x1F) + "000011" & X"001", -- 0x078: MOV R01, 0x00 + "001101" & X"1F1", -- 0x079: MOVC (0x1F), R01 + "001111" & X"000", -- 0x07A: TST R00 + "110001" & X"082", -- 0x07B: JZ 0x082 + "000011" & X"0E1", -- 0x07C: MOV R01, 0x0E + "001001" & X"010", -- 0x07D: MOVC R00, (R01) + "111011" & X"0FC", -- 0x07E: CALL 0x0FC + "010001" & X"011", -- 0x07F: INC R01 + "001111" & X"1D1", -- 0x080: CMP R01, 0x1D + "110111" & X"07D", -- 0x081: JLE 0x07D + "111011" & X"0A2", -- 0x082: CALL 0x0A2 + "000011" & X"C00", -- 0x083: MOV R00, 0xC0 + "111011" & X"0E5", -- 0x084: CALL 0x0E5 + "000011" & X"0B1", -- 0x085: MOV R01, 0x0B + "001001" & X"010", -- 0x086: MOVC R00, (R01) + "111011" & X"0BA", -- 0x087: CALL 0x0BA + "111011" & X"0FC", -- 0x088: CALL 0x0FC + "001111" & X"041", -- 0x089: CMP R01, 0x04 + "111001" & X"08D", -- 0x08A: JEQ 0x08D + "010101" & X"011", -- 0x08B: DEC R01 + "110000" & X"086", -- 0x08C: JMP 0x086 + "000011" & X"0D0", -- 0x08D: MOV R00, 0x0D + "111011" & X"0BA", -- 0x08E: CALL 0x0BA + "000011" & X"0A0", -- 0x08F: MOV R00, 0x0A + "111011" & X"0BA", -- 0x090: CALL 0x0BA + "110000" & X"060", -- 0x091: JMP 0x060 + "000011" & X"000", -- 0x092: MOV R00, 0x00 + "001101" & X"000", -- 0x093: MOVC (0x00), R00 + "001101" & X"010", -- 0x094: MOVC (0x01), R00 + "001101" & X"020", -- 0x095: MOVC (0x02), R00 + "001101" & X"030", -- 0x096: MOVC (0x03), R00 + "111110" & X"000", -- 0x097: RET + "000011" & X"000", -- 0x098: MOV R00, 0x00 + "001001" & X"001", -- 0x099: MOVC R01, (R00) + "010001" & X"011", -- 0x09A: INC R01 + "001011" & X"001", -- 0x09B: MOVC (R01), R00 + "110100" & X"0A1", -- 0x09C: JNC 0x0A1 + "001111" & X"030", -- 0x09D: CMP R00, 0x03 + "111001" & X"0A1", -- 0x09E: JEQ 0x0A1 + "010001" & X"010", -- 0x09F: INC R00 + "110000" & X"099", -- 0x0A0: JMP 0x099 + "111110" & X"000", -- 0x0A1: RET + "000011" & X"042", -- 0x0A2: MOV R02, 0x04 + "000011" & X"000", -- 0x0A3: MOV R00, 0x00 + "001001" & X"001", -- 0x0A4: MOVC R01, (R00) + "011001" & X"0F1", -- 0x0A5: AND R01, 0x0F + "001111" & X"0A1", -- 0x0A6: CMP R01, 0x0A + "110101" & X"0A9", -- 0x0A7: JLT 0x0A9 + "010001" & X"071", -- 0x0A8: ADD R01, 0x07 + "010001" & X"301", -- 0x0A9: ADD R01, 0x30 + "001011" & X"021", -- 0x0AA: MOVC (R01), R02 + "010001" & X"012", -- 0x0AB: INC R02 + "001001" & X"001", -- 0x0AC: MOVC R01, (R00) + "101010" & X"001", -- 0x0AD: SWAP R01 + "011001" & X"0F1", -- 0x0AE: AND R01, 0x0F + "001111" & X"0A1", -- 0x0AF: CMP R01, 0x0A + "110101" & X"0B2", -- 0x0B0: JLT 0x0B2 + "010001" & X"071", -- 0x0B1: ADD R01, 0x07 + "010001" & X"301", -- 0x0B2: ADD R01, 0x30 + "001011" & X"021", -- 0x0B3: MOVC (R01), R02 + "001111" & X"030", -- 0x0B4: CMP R00, 0x03 + "111001" & X"0B9", -- 0x0B5: JEQ 0x0B9 + "010001" & X"010", -- 0x0B6: INC R00 + "010001" & X"012", -- 0x0B7: INC R02 + "110000" & X"0A4", -- 0x0B8: JMP 0x0A4 + "111110" & X"000", -- 0x0B9: RET + "111100" & X"001", -- 0x0BA: PUSH R01 + "101000" & X"061", -- 0x0BB: XIN R01, (0x06) + "011001" & X"021", -- 0x0BC: AND R01, 0x02 + "110010" & X"0BB", -- 0x0BD: JNZ 0x0BB + "100100" & X"020", -- 0x0BE: XOUT (0x02), R00 + "111101" & X"001", -- 0x0BF: POP R01 + "111110" & X"000", -- 0x0C0: RET + "111100" & X"001", -- 0x0C1: PUSH R01 + "101000" & X"061", -- 0x0C2: XIN R01, (0x06) + "011001" & X"101", -- 0x0C3: AND R01, 0x10 + "110010" & X"0C2", -- 0x0C4: JNZ 0x0C2 + "101000" & X"020", -- 0x0C5: XIN R00, (0x02) + "111101" & X"001", -- 0x0C6: POP R01 + "111110" & X"000", -- 0x0C7: RET + "000011" & X"002", -- 0x0C8: MOV R02, 0x00 + "000011" & X"030", -- 0x0C9: MOV R00, 0x03 + "111011" & X"114", -- 0x0CA: CALL 0x114 + "111011" & X"147", -- 0x0CB: CALL 0x147 + "000011" & X"002", -- 0x0CC: MOV R02, 0x00 + "000011" & X"030", -- 0x0CD: MOV R00, 0x03 + "111011" & X"114", -- 0x0CE: CALL 0x114 + "111011" & X"147", -- 0x0CF: CALL 0x147 + "000011" & X"002", -- 0x0D0: MOV R02, 0x00 + "000011" & X"020", -- 0x0D1: MOV R00, 0x02 + "111011" & X"114", -- 0x0D2: CALL 0x114 + "111011" & X"14E", -- 0x0D3: CALL 0x14E + "000011" & X"280", -- 0x0D4: MOV R00, 0x28 + "111011" & X"0E5", -- 0x0D5: CALL 0x0E5 + "000011" & X"0C0", -- 0x0D6: MOV R00, 0x0C + "111011" & X"0E5", -- 0x0D7: CALL 0x0E5 + "000011" & X"060", -- 0x0D8: MOV R00, 0x06 + "111011" & X"0E5", -- 0x0D9: CALL 0x0E5 + "000011" & X"010", -- 0x0DA: MOV R00, 0x01 + "111011" & X"0E5", -- 0x0DB: CALL 0x0E5 + "111110" & X"000", -- 0x0DC: RET + "111100" & X"000", -- 0x0DD: PUSH R00 + "111011" & X"108", -- 0x0DE: CALL 0x108 + "011001" & X"800", -- 0x0DF: AND R00, 0x80 + "110001" & X"0E3", -- 0x0E0: JZ 0x0E3 + "111011" & X"165", -- 0x0E1: CALL 0x165 + "110000" & X"0DE", -- 0x0E2: JMP 0x0DE + "111101" & X"000", -- 0x0E3: POP R00 + "111110" & X"000", -- 0x0E4: RET + "111100" & X"002", -- 0x0E5: PUSH R02 + "000011" & X"002", -- 0x0E6: MOV R02, 0x00 + "111011" & X"101", -- 0x0E7: CALL 0x101 + "111101" & X"002", -- 0x0E8: POP R02 + "111110" & X"000", -- 0x0E9: RET + "111100" & X"000", -- 0x0EA: PUSH R00 + "000100" & X"010", -- 0x0EB: MOVX R00, (R01) + "010001" & X"011", -- 0x0EC: INC R01 + "001111" & X"000", -- 0x0ED: TST R00 + "110001" & X"0F1", -- 0x0EE: JZ 0x0F1 + "111011" & X"0FC", -- 0x0EF: CALL 0x0FC + "110000" & X"0EB", -- 0x0F0: JMP 0x0EB + "111101" & X"000", -- 0x0F1: POP R00 + "111110" & X"000", -- 0x0F2: RET + "111100" & X"000", -- 0x0F3: PUSH R00 + "001001" & X"010", -- 0x0F4: MOVC R00, (R01) + "010001" & X"011", -- 0x0F5: INC R01 + "001111" & X"000", -- 0x0F6: TST R00 + "110001" & X"0FA", -- 0x0F7: JZ 0x0FA + "111011" & X"0FC", -- 0x0F8: CALL 0x0FC + "110000" & X"0F4", -- 0x0F9: JMP 0x0F4 + "111101" & X"000", -- 0x0FA: POP R00 + "111110" & X"000", -- 0x0FB: RET + "111100" & X"002", -- 0x0FC: PUSH R02 + "000011" & X"402", -- 0x0FD: MOV R02, 0x40 + "111011" & X"101", -- 0x0FE: CALL 0x101 + "111101" & X"002", -- 0x0FF: POP R02 + "111110" & X"000", -- 0x100: RET + "111011" & X"0DD", -- 0x101: CALL 0x0DD + "111100" & X"000", -- 0x102: PUSH R00 + "101010" & X"000", -- 0x103: SWAP R00 + "111011" & X"114", -- 0x104: CALL 0x114 + "111101" & X"000", -- 0x105: POP R00 + "111011" & X"114", -- 0x106: CALL 0x114 + "111110" & X"000", -- 0x107: RET + "111100" & X"002", -- 0x108: PUSH R02 + "000011" & X"002", -- 0x109: MOV R02, 0x00 + "111011" & X"10D", -- 0x10A: CALL 0x10D + "111101" & X"002", -- 0x10B: POP R02 + "111110" & X"000", -- 0x10C: RET + "111011" & X"127", -- 0x10D: CALL 0x127 + "101010" & X"000", -- 0x10E: SWAP R00 + "111100" & X"000", -- 0x10F: PUSH R00 + "111011" & X"127", -- 0x110: CALL 0x127 + "111101" & X"002", -- 0x111: POP R02 + "011010" & X"020", -- 0x112: OR R00, R02 + "111110" & X"000", -- 0x113: RET + "111100" & X"001", -- 0x114: PUSH R01 + "011001" & X"0F0", -- 0x115: AND R00, 0x0F + "000010" & X"001", -- 0x116: MOV R01, R00 + "011010" & X"021", -- 0x117: OR R01, R02 + "100100" & X"031", -- 0x118: XOUT (0x03), R01 + "111011" & X"165", -- 0x119: CALL 0x165 + "000010" & X"001", -- 0x11A: MOV R01, R00 + "011010" & X"021", -- 0x11B: OR R01, R02 + "011011" & X"801", -- 0x11C: OR R01, 0x80 + "100100" & X"031", -- 0x11D: XOUT (0x03), R01 + "111011" & X"165", -- 0x11E: CALL 0x165 + "000010" & X"001", -- 0x11F: MOV R01, R00 + "011010" & X"021", -- 0x120: OR R01, R02 + "100100" & X"031", -- 0x121: XOUT (0x03), R01 + "111011" & X"165", -- 0x122: CALL 0x165 + "011011" & X"201", -- 0x123: OR R01, 0x20 + "100100" & X"031", -- 0x124: XOUT (0x03), R01 + "111101" & X"001", -- 0x125: POP R01 + "111110" & X"000", -- 0x126: RET + "111100" & X"001", -- 0x127: PUSH R01 + "000011" & X"201", -- 0x128: MOV R01, 0x20 + "011010" & X"021", -- 0x129: OR R01, R02 + "100100" & X"031", -- 0x12A: XOUT (0x03), R01 + "111011" & X"165", -- 0x12B: CALL 0x165 + "000011" & X"201", -- 0x12C: MOV R01, 0x20 + "011010" & X"021", -- 0x12D: OR R01, R02 + "011011" & X"801", -- 0x12E: OR R01, 0x80 + "100100" & X"031", -- 0x12F: XOUT (0x03), R01 + "111011" & X"165", -- 0x130: CALL 0x165 + "101000" & X"030", -- 0x131: XIN R00, (0x03) + "011001" & X"0F0", -- 0x132: AND R00, 0x0F + "000011" & X"201", -- 0x133: MOV R01, 0x20 + "011010" & X"021", -- 0x134: OR R01, R02 + "100100" & X"031", -- 0x135: XOUT (0x03), R01 + "111011" & X"165", -- 0x136: CALL 0x165 + "111101" & X"001", -- 0x137: POP R01 + "111110" & X"000", -- 0x138: RET + "111100" & X"00F", -- 0x139: PUSH R15 + "000011" & X"0AF", -- 0x13A: MOV R15, 0x0A + "111011" & X"140", -- 0x13B: CALL 0x140 + "010101" & X"01F", -- 0x13C: DEC R15 + "110010" & X"13B", -- 0x13D: JNZ 0x13B + "111101" & X"00F", -- 0x13E: POP R15 + "111110" & X"000", -- 0x13F: RET + "111100" & X"00F", -- 0x140: PUSH R15 + "000011" & X"0AF", -- 0x141: MOV R15, 0x0A + "111011" & X"147", -- 0x142: CALL 0x147 + "010101" & X"01F", -- 0x143: DEC R15 + "110010" & X"142", -- 0x144: JNZ 0x142 + "111101" & X"00F", -- 0x145: POP R15 + "111110" & X"000", -- 0x146: RET + "111100" & X"00F", -- 0x147: PUSH R15 + "000011" & X"0AF", -- 0x148: MOV R15, 0x0A + "111011" & X"14E", -- 0x149: CALL 0x14E + "010101" & X"01F", -- 0x14A: DEC R15 + "110010" & X"149", -- 0x14B: JNZ 0x149 + "111101" & X"00F", -- 0x14C: POP R15 + "111110" & X"000", -- 0x14D: RET + "111100" & X"00F", -- 0x14E: PUSH R15 + "000011" & X"0AF", -- 0x14F: MOV R15, 0x0A + "111011" & X"155", -- 0x150: CALL 0x155 + "010101" & X"01F", -- 0x151: DEC R15 + "110010" & X"150", -- 0x152: JNZ 0x150 + "111101" & X"00F", -- 0x153: POP R15 + "111110" & X"000", -- 0x154: RET + "111100" & X"00F", -- 0x155: PUSH R15 + "000011" & X"0AF", -- 0x156: MOV R15, 0x0A + "111011" & X"15C", -- 0x157: CALL 0x15C + "010101" & X"01F", -- 0x158: DEC R15 + "110010" & X"157", -- 0x159: JNZ 0x157 + "111101" & X"00F", -- 0x15A: POP R15 + "111110" & X"000", -- 0x15B: RET + "111100" & X"00F", -- 0x15C: PUSH R15 + "000011" & X"63F", -- 0x15D: MOV R15, 0x63 + "000000" & X"000", -- 0x15E: NOP + "000000" & X"000", -- 0x15F: NOP + "000000" & X"000", -- 0x160: NOP + "010101" & X"01F", -- 0x161: DEC R15 + "110010" & X"15E", -- 0x162: JNZ 0x15E + "111101" & X"00F", -- 0x163: POP R15 + "111110" & X"000", -- 0x164: RET + "111100" & X"00F", -- 0x165: PUSH R15 + "000011" & X"09F", -- 0x166: MOV R15, 0x09 + "000000" & X"000", -- 0x167: NOP + "000000" & X"000", -- 0x168: NOP + "000000" & X"000", -- 0x169: NOP + "010101" & X"01F", -- 0x16A: DEC R15 + "110010" & X"167", -- 0x16B: JNZ 0x167 + "111101" & X"00F", -- 0x16C: POP R15 + "111110" & X"000", -- 0x16D: RET + "000000" & X"000", -- 0x16E: + "000000" & X"000", -- 0x16F: + "000000" & X"000", -- 0x170: + "000000" & X"000", -- 0x171: + "000000" & X"000", -- 0x172: + "000000" & X"000", -- 0x173: + "000000" & X"000", -- 0x174: + "000000" & X"000", -- 0x175: + "000000" & X"000", -- 0x176: + "000000" & X"000", -- 0x177: + "000000" & X"000", -- 0x178: + "000000" & X"000", -- 0x179: + "000000" & X"000", -- 0x17A: + "000000" & X"000", -- 0x17B: + "000000" & X"000", -- 0x17C: + "000000" & X"000", -- 0x17D: + "000000" & X"000", -- 0x17E: + "000000" & X"000", -- 0x17F: + "000000" & X"000", -- 0x180: + "000000" & X"000", -- 0x181: + "000000" & X"000", -- 0x182: + "000000" & X"000", -- 0x183: + "000000" & X"000", -- 0x184: + "000000" & X"000", -- 0x185: + "000000" & X"000", -- 0x186: + "000000" & X"000", -- 0x187: + "000000" & X"000", -- 0x188: + "000000" & X"000", -- 0x189: + "000000" & X"000", -- 0x18A: + "000000" & X"000", -- 0x18B: + "000000" & X"000", -- 0x18C: + "000000" & X"000", -- 0x18D: + "000000" & X"000", -- 0x18E: + "000000" & X"000", -- 0x18F: + "000000" & X"000", -- 0x190: + "000000" & X"000", -- 0x191: + "000000" & X"000", -- 0x192: + "000000" & X"000", -- 0x193: + "000000" & X"000", -- 0x194: + "000000" & X"000", -- 0x195: + "000000" & X"000", -- 0x196: + "000000" & X"000", -- 0x197: + "000000" & X"000", -- 0x198: + "000000" & X"000", -- 0x199: + "000000" & X"000", -- 0x19A: + "000000" & X"000", -- 0x19B: + "000000" & X"000", -- 0x19C: + "000000" & X"000", -- 0x19D: + "000000" & X"000", -- 0x19E: + "000000" & X"000", -- 0x19F: + "000000" & X"000", -- 0x1A0: + "000000" & X"000", -- 0x1A1: + "000000" & X"000", -- 0x1A2: + "000000" & X"000", -- 0x1A3: + "000000" & X"000", -- 0x1A4: + "000000" & X"000", -- 0x1A5: + "000000" & X"000", -- 0x1A6: + "000000" & X"000", -- 0x1A7: + "000000" & X"000", -- 0x1A8: + "000000" & X"000", -- 0x1A9: + "000000" & X"000", -- 0x1AA: + "000000" & X"000", -- 0x1AB: + "000000" & X"000", -- 0x1AC: + "000000" & X"000", -- 0x1AD: + "000000" & X"000", -- 0x1AE: + "000000" & X"000", -- 0x1AF: + "000000" & X"000", -- 0x1B0: + "000000" & X"000", -- 0x1B1: + "000000" & X"000", -- 0x1B2: + "000000" & X"000", -- 0x1B3: + "000000" & X"000", -- 0x1B4: + "000000" & X"000", -- 0x1B5: + "000000" & X"000", -- 0x1B6: + "000000" & X"000", -- 0x1B7: + "000000" & X"000", -- 0x1B8: + "000000" & X"000", -- 0x1B9: + "000000" & X"000", -- 0x1BA: + "000000" & X"000", -- 0x1BB: + "000000" & X"000", -- 0x1BC: + "000000" & X"000", -- 0x1BD: + "000000" & X"000", -- 0x1BE: + "000000" & X"000", -- 0x1BF: + "000000" & X"000", -- 0x1C0: + "000000" & X"000", -- 0x1C1: + "000000" & X"000", -- 0x1C2: + "000000" & X"000", -- 0x1C3: + "000000" & X"000", -- 0x1C4: + "000000" & X"000", -- 0x1C5: + "000000" & X"000", -- 0x1C6: + "000000" & X"000", -- 0x1C7: + "000000" & X"000", -- 0x1C8: + "000000" & X"000", -- 0x1C9: + "000000" & X"000", -- 0x1CA: + "000000" & X"000", -- 0x1CB: + "000000" & X"000", -- 0x1CC: + "000000" & X"000", -- 0x1CD: + "000000" & X"000", -- 0x1CE: + "000000" & X"000", -- 0x1CF: + "000000" & X"000", -- 0x1D0: + "000000" & X"000", -- 0x1D1: + "000000" & X"000", -- 0x1D2: + "000000" & X"000", -- 0x1D3: + "000000" & X"000", -- 0x1D4: + "000000" & X"000", -- 0x1D5: + "000000" & X"000", -- 0x1D6: + "000000" & X"000", -- 0x1D7: + "000000" & X"000", -- 0x1D8: + "000000" & X"000", -- 0x1D9: + "000000" & X"000", -- 0x1DA: + "000000" & X"000", -- 0x1DB: + "000000" & X"000", -- 0x1DC: + "000000" & X"000", -- 0x1DD: + "000000" & X"000", -- 0x1DE: + "000000" & X"000", -- 0x1DF: + "000000" & X"000", -- 0x1E0: + "000000" & X"000", -- 0x1E1: + "000000" & X"000", -- 0x1E2: + "000000" & X"000", -- 0x1E3: + "000000" & X"000", -- 0x1E4: + "000000" & X"000", -- 0x1E5: + "000000" & X"000", -- 0x1E6: + "000000" & X"000", -- 0x1E7: + "000000" & X"000", -- 0x1E8: + "000000" & X"000", -- 0x1E9: + "000000" & X"000", -- 0x1EA: + "000000" & X"000", -- 0x1EB: + "000000" & X"000", -- 0x1EC: + "000000" & X"000", -- 0x1ED: + "000000" & X"000", -- 0x1EE: + "000000" & X"000", -- 0x1EF: + "000000" & X"000", -- 0x1F0: + "000000" & X"000", -- 0x1F1: + "000000" & X"000", -- 0x1F2: + "000000" & X"000", -- 0x1F3: + "000000" & X"000", -- 0x1F4: + "000000" & X"000", -- 0x1F5: + "000000" & X"000", -- 0x1F6: + "000000" & X"000", -- 0x1F7: + "000000" & X"000", -- 0x1F8: + "000000" & X"000", -- 0x1F9: + "000000" & X"000", -- 0x1FA: + "000000" & X"000", -- 0x1FB: + "000000" & X"000", -- 0x1FC: + "000000" & X"000", -- 0x1FD: + "000000" & X"000", -- 0x1FE: + "000000" & X"000", -- 0x1FF: + "000000" & X"000", -- 0x200: + "000000" & X"000", -- 0x201: + "000000" & X"000", -- 0x202: + "000000" & X"000", -- 0x203: + "000000" & X"000", -- 0x204: + "000000" & X"000", -- 0x205: + "000000" & X"000", -- 0x206: + "000000" & X"000", -- 0x207: + "000000" & X"000", -- 0x208: + "000000" & X"000", -- 0x209: + "000000" & X"000", -- 0x20A: + "000000" & X"000", -- 0x20B: + "000000" & X"000", -- 0x20C: + "000000" & X"000", -- 0x20D: + "000000" & X"000", -- 0x20E: + "000000" & X"000", -- 0x20F: + "000000" & X"000", -- 0x210: + "000000" & X"000", -- 0x211: + "000000" & X"000", -- 0x212: + "000000" & X"000", -- 0x213: + "000000" & X"000", -- 0x214: + "000000" & X"000", -- 0x215: + "000000" & X"000", -- 0x216: + "000000" & X"000", -- 0x217: + "000000" & X"000", -- 0x218: + "000000" & X"000", -- 0x219: + "000000" & X"000", -- 0x21A: + "000000" & X"000", -- 0x21B: + "000000" & X"000", -- 0x21C: + "000000" & X"000", -- 0x21D: + "000000" & X"000", -- 0x21E: + "000000" & X"000", -- 0x21F: + "000000" & X"000", -- 0x220: + "000000" & X"000", -- 0x221: + "000000" & X"000", -- 0x222: + "000000" & X"000", -- 0x223: + "000000" & X"000", -- 0x224: + "000000" & X"000", -- 0x225: + "000000" & X"000", -- 0x226: + "000000" & X"000", -- 0x227: + "000000" & X"000", -- 0x228: + "000000" & X"000", -- 0x229: + "000000" & X"000", -- 0x22A: + "000000" & X"000", -- 0x22B: + "000000" & X"000", -- 0x22C: + "000000" & X"000", -- 0x22D: + "000000" & X"000", -- 0x22E: + "000000" & X"000", -- 0x22F: + "000000" & X"000", -- 0x230: + "000000" & X"000", -- 0x231: + "000000" & X"000", -- 0x232: + "000000" & X"000", -- 0x233: + "000000" & X"000", -- 0x234: + "000000" & X"000", -- 0x235: + "000000" & X"000", -- 0x236: + "000000" & X"000", -- 0x237: + "000000" & X"000", -- 0x238: + "000000" & X"000", -- 0x239: + "000000" & X"000", -- 0x23A: + "000000" & X"000", -- 0x23B: + "000000" & X"000", -- 0x23C: + "000000" & X"000", -- 0x23D: + "000000" & X"000", -- 0x23E: + "000000" & X"000", -- 0x23F: + "000000" & X"000", -- 0x240: + "000000" & X"000", -- 0x241: + "000000" & X"000", -- 0x242: + "000000" & X"000", -- 0x243: + "000000" & X"000", -- 0x244: + "000000" & X"000", -- 0x245: + "000000" & X"000", -- 0x246: + "000000" & X"000", -- 0x247: + "000000" & X"000", -- 0x248: + "000000" & X"000", -- 0x249: + "000000" & X"000", -- 0x24A: + "000000" & X"000", -- 0x24B: + "000000" & X"000", -- 0x24C: + "000000" & X"000", -- 0x24D: + "000000" & X"000", -- 0x24E: + "000000" & X"000", -- 0x24F: + "000000" & X"000", -- 0x250: + "000000" & X"000", -- 0x251: + "000000" & X"000", -- 0x252: + "000000" & X"000", -- 0x253: + "000000" & X"000", -- 0x254: + "000000" & X"000", -- 0x255: + "000000" & X"000", -- 0x256: + "000000" & X"000", -- 0x257: + "000000" & X"000", -- 0x258: + "000000" & X"000", -- 0x259: + "000000" & X"000", -- 0x25A: + "000000" & X"000", -- 0x25B: + "000000" & X"000", -- 0x25C: + "000000" & X"000", -- 0x25D: + "000000" & X"000", -- 0x25E: + "000000" & X"000", -- 0x25F: + "000000" & X"000", -- 0x260: + "000000" & X"000", -- 0x261: + "000000" & X"000", -- 0x262: + "000000" & X"000", -- 0x263: + "000000" & X"000", -- 0x264: + "000000" & X"000", -- 0x265: + "000000" & X"000", -- 0x266: + "000000" & X"000", -- 0x267: + "000000" & X"000", -- 0x268: + "000000" & X"000", -- 0x269: + "000000" & X"000", -- 0x26A: + "000000" & X"000", -- 0x26B: + "000000" & X"000", -- 0x26C: + "000000" & X"000", -- 0x26D: + "000000" & X"000", -- 0x26E: + "000000" & X"000", -- 0x26F: + "000000" & X"000", -- 0x270: + "000000" & X"000", -- 0x271: + "000000" & X"000", -- 0x272: + "000000" & X"000", -- 0x273: + "000000" & X"000", -- 0x274: + "000000" & X"000", -- 0x275: + "000000" & X"000", -- 0x276: + "000000" & X"000", -- 0x277: + "000000" & X"000", -- 0x278: + "000000" & X"000", -- 0x279: + "000000" & X"000", -- 0x27A: + "000000" & X"000", -- 0x27B: + "000000" & X"000", -- 0x27C: + "000000" & X"000", -- 0x27D: + "000000" & X"000", -- 0x27E: + "000000" & X"000", -- 0x27F: + "000000" & X"000", -- 0x280: + "000000" & X"000", -- 0x281: + "000000" & X"000", -- 0x282: + "000000" & X"000", -- 0x283: + "000000" & X"000", -- 0x284: + "000000" & X"000", -- 0x285: + "000000" & X"000", -- 0x286: + "000000" & X"000", -- 0x287: + "000000" & X"000", -- 0x288: + "000000" & X"000", -- 0x289: + "000000" & X"000", -- 0x28A: + "000000" & X"000", -- 0x28B: + "000000" & X"000", -- 0x28C: + "000000" & X"000", -- 0x28D: + "000000" & X"000", -- 0x28E: + "000000" & X"000", -- 0x28F: + "000000" & X"000", -- 0x290: + "000000" & X"000", -- 0x291: + "000000" & X"000", -- 0x292: + "000000" & X"000", -- 0x293: + "000000" & X"000", -- 0x294: + "000000" & X"000", -- 0x295: + "000000" & X"000", -- 0x296: + "000000" & X"000", -- 0x297: + "000000" & X"000", -- 0x298: + "000000" & X"000", -- 0x299: + "000000" & X"000", -- 0x29A: + "000000" & X"000", -- 0x29B: + "000000" & X"000", -- 0x29C: + "000000" & X"000", -- 0x29D: + "000000" & X"000", -- 0x29E: + "000000" & X"000", -- 0x29F: + "000000" & X"000", -- 0x2A0: + "000000" & X"000", -- 0x2A1: + "000000" & X"000", -- 0x2A2: + "000000" & X"000", -- 0x2A3: + "000000" & X"000", -- 0x2A4: + "000000" & X"000", -- 0x2A5: + "000000" & X"000", -- 0x2A6: + "000000" & X"000", -- 0x2A7: + "000000" & X"000", -- 0x2A8: + "000000" & X"000", -- 0x2A9: + "000000" & X"000", -- 0x2AA: + "000000" & X"000", -- 0x2AB: + "000000" & X"000", -- 0x2AC: + "000000" & X"000", -- 0x2AD: + "000000" & X"000", -- 0x2AE: + "000000" & X"000", -- 0x2AF: + "000000" & X"000", -- 0x2B0: + "000000" & X"000", -- 0x2B1: + "000000" & X"000", -- 0x2B2: + "000000" & X"000", -- 0x2B3: + "000000" & X"000", -- 0x2B4: + "000000" & X"000", -- 0x2B5: + "000000" & X"000", -- 0x2B6: + "000000" & X"000", -- 0x2B7: + "000000" & X"000", -- 0x2B8: + "000000" & X"000", -- 0x2B9: + "000000" & X"000", -- 0x2BA: + "000000" & X"000", -- 0x2BB: + "000000" & X"000", -- 0x2BC: + "000000" & X"000", -- 0x2BD: + "000000" & X"000", -- 0x2BE: + "000000" & X"000", -- 0x2BF: + "000000" & X"000", -- 0x2C0: + "000000" & X"000", -- 0x2C1: + "000000" & X"000", -- 0x2C2: + "000000" & X"000", -- 0x2C3: + "000000" & X"000", -- 0x2C4: + "000000" & X"000", -- 0x2C5: + "000000" & X"000", -- 0x2C6: + "000000" & X"000", -- 0x2C7: + "000000" & X"000", -- 0x2C8: + "000000" & X"000", -- 0x2C9: + "000000" & X"000", -- 0x2CA: + "000000" & X"000", -- 0x2CB: + "000000" & X"000", -- 0x2CC: + "000000" & X"000", -- 0x2CD: + "000000" & X"000", -- 0x2CE: + "000000" & X"000", -- 0x2CF: + "000000" & X"000", -- 0x2D0: + "000000" & X"000", -- 0x2D1: + "000000" & X"000", -- 0x2D2: + "000000" & X"000", -- 0x2D3: + "000000" & X"000", -- 0x2D4: + "000000" & X"000", -- 0x2D5: + "000000" & X"000", -- 0x2D6: + "000000" & X"000", -- 0x2D7: + "000000" & X"000", -- 0x2D8: + "000000" & X"000", -- 0x2D9: + "000000" & X"000", -- 0x2DA: + "000000" & X"000", -- 0x2DB: + "000000" & X"000", -- 0x2DC: + "000000" & X"000", -- 0x2DD: + "000000" & X"000", -- 0x2DE: + "000000" & X"000", -- 0x2DF: + "000000" & X"000", -- 0x2E0: + "000000" & X"000", -- 0x2E1: + "000000" & X"000", -- 0x2E2: + "000000" & X"000", -- 0x2E3: + "000000" & X"000", -- 0x2E4: + "000000" & X"000", -- 0x2E5: + "000000" & X"000", -- 0x2E6: + "000000" & X"000", -- 0x2E7: + "000000" & X"000", -- 0x2E8: + "000000" & X"000", -- 0x2E9: + "000000" & X"000", -- 0x2EA: + "000000" & X"000", -- 0x2EB: + "000000" & X"000", -- 0x2EC: + "000000" & X"000", -- 0x2ED: + "000000" & X"000", -- 0x2EE: + "000000" & X"000", -- 0x2EF: + "000000" & X"000", -- 0x2F0: + "000000" & X"000", -- 0x2F1: + "000000" & X"000", -- 0x2F2: + "000000" & X"000", -- 0x2F3: + "000000" & X"000", -- 0x2F4: + "000000" & X"000", -- 0x2F5: + "000000" & X"000", -- 0x2F6: + "000000" & X"000", -- 0x2F7: + "000000" & X"000", -- 0x2F8: + "000000" & X"000", -- 0x2F9: + "000000" & X"000", -- 0x2FA: + "000000" & X"000", -- 0x2FB: + "000000" & X"000", -- 0x2FC: + "000000" & X"000", -- 0x2FD: + "000000" & X"000", -- 0x2FE: + "000000" & X"000", -- 0x2FF: + "000000" & X"000", -- 0x300: + "000000" & X"000", -- 0x301: + "000000" & X"000", -- 0x302: + "000000" & X"000", -- 0x303: + "000000" & X"000", -- 0x304: + "000000" & X"000", -- 0x305: + "000000" & X"000", -- 0x306: + "000000" & X"000", -- 0x307: + "000000" & X"000", -- 0x308: + "000000" & X"000", -- 0x309: + "000000" & X"000", -- 0x30A: + "000000" & X"000", -- 0x30B: + "000000" & X"000", -- 0x30C: + "000000" & X"000", -- 0x30D: + "000000" & X"000", -- 0x30E: + "000000" & X"000", -- 0x30F: + "000000" & X"000", -- 0x310: + "000000" & X"000", -- 0x311: + "000000" & X"000", -- 0x312: + "000000" & X"000", -- 0x313: + "000000" & X"000", -- 0x314: + "000000" & X"000", -- 0x315: + "000000" & X"000", -- 0x316: + "000000" & X"000", -- 0x317: + "000000" & X"000", -- 0x318: + "000000" & X"000", -- 0x319: + "000000" & X"000", -- 0x31A: + "000000" & X"000", -- 0x31B: + "000000" & X"000", -- 0x31C: + "000000" & X"000", -- 0x31D: + "000000" & X"000", -- 0x31E: + "000000" & X"000", -- 0x31F: + "000000" & X"000", -- 0x320: + "000000" & X"000", -- 0x321: + "000000" & X"000", -- 0x322: + "000000" & X"000", -- 0x323: + "000000" & X"000", -- 0x324: + "000000" & X"000", -- 0x325: + "000000" & X"000", -- 0x326: + "000000" & X"000", -- 0x327: + "000000" & X"000", -- 0x328: + "000000" & X"000", -- 0x329: + "000000" & X"000", -- 0x32A: + "000000" & X"000", -- 0x32B: + "000000" & X"000", -- 0x32C: + "000000" & X"000", -- 0x32D: + "000000" & X"000", -- 0x32E: + "000000" & X"000", -- 0x32F: + "000000" & X"000", -- 0x330: + "000000" & X"000", -- 0x331: + "000000" & X"000", -- 0x332: + "000000" & X"000", -- 0x333: + "000000" & X"000", -- 0x334: + "000000" & X"000", -- 0x335: + "000000" & X"000", -- 0x336: + "000000" & X"000", -- 0x337: + "000000" & X"000", -- 0x338: + "000000" & X"000", -- 0x339: + "000000" & X"000", -- 0x33A: + "000000" & X"000", -- 0x33B: + "000000" & X"000", -- 0x33C: + "000000" & X"000", -- 0x33D: + "000000" & X"000", -- 0x33E: + "000000" & X"000", -- 0x33F: + "000000" & X"000", -- 0x340: + "000000" & X"000", -- 0x341: + "000000" & X"000", -- 0x342: + "000000" & X"000", -- 0x343: + "000000" & X"000", -- 0x344: + "000000" & X"000", -- 0x345: + "000000" & X"000", -- 0x346: + "000000" & X"000", -- 0x347: + "000000" & X"000", -- 0x348: + "000000" & X"000", -- 0x349: + "000000" & X"000", -- 0x34A: + "000000" & X"000", -- 0x34B: + "000000" & X"000", -- 0x34C: + "000000" & X"000", -- 0x34D: + "000000" & X"000", -- 0x34E: + "000000" & X"000", -- 0x34F: + "000000" & X"000", -- 0x350: + "000000" & X"000", -- 0x351: + "000000" & X"000", -- 0x352: + "000000" & X"000", -- 0x353: + "000000" & X"000", -- 0x354: + "000000" & X"000", -- 0x355: + "000000" & X"000", -- 0x356: + "000000" & X"000", -- 0x357: + "000000" & X"000", -- 0x358: + "000000" & X"000", -- 0x359: + "000000" & X"000", -- 0x35A: + "000000" & X"000", -- 0x35B: + "000000" & X"000", -- 0x35C: + "000000" & X"000", -- 0x35D: + "000000" & X"000", -- 0x35E: + "000000" & X"000", -- 0x35F: + "000000" & X"000", -- 0x360: + "000000" & X"000", -- 0x361: + "000000" & X"000", -- 0x362: + "000000" & X"000", -- 0x363: + "000000" & X"000", -- 0x364: + "000000" & X"000", -- 0x365: + "000000" & X"000", -- 0x366: + "000000" & X"000", -- 0x367: + "000000" & X"000", -- 0x368: + "000000" & X"000", -- 0x369: + "000000" & X"000", -- 0x36A: + "000000" & X"000", -- 0x36B: + "000000" & X"000", -- 0x36C: + "000000" & X"000", -- 0x36D: + "000000" & X"000", -- 0x36E: + "000000" & X"000", -- 0x36F: + "000000" & X"000", -- 0x370: + "000000" & X"000", -- 0x371: + "000000" & X"000", -- 0x372: + "000000" & X"000", -- 0x373: + "000000" & X"000", -- 0x374: + "000000" & X"000", -- 0x375: + "000000" & X"000", -- 0x376: + "000000" & X"000", -- 0x377: + "000000" & X"000", -- 0x378: + "000000" & X"000", -- 0x379: + "000000" & X"000", -- 0x37A: + "000000" & X"000", -- 0x37B: + "000000" & X"000", -- 0x37C: + "000000" & X"000", -- 0x37D: + "000000" & X"000", -- 0x37E: + "000000" & X"000", -- 0x37F: + "000000" & X"000", -- 0x380: + "000000" & X"000", -- 0x381: + "000000" & X"000", -- 0x382: + "000000" & X"000", -- 0x383: + "000000" & X"000", -- 0x384: + "000000" & X"000", -- 0x385: + "000000" & X"000", -- 0x386: + "000000" & X"000", -- 0x387: + "000000" & X"000", -- 0x388: + "000000" & X"000", -- 0x389: + "000000" & X"000", -- 0x38A: + "000000" & X"000", -- 0x38B: + "000000" & X"000", -- 0x38C: + "000000" & X"000", -- 0x38D: + "000000" & X"000", -- 0x38E: + "000000" & X"000", -- 0x38F: + "000000" & X"000", -- 0x390: + "000000" & X"000", -- 0x391: + "000000" & X"000", -- 0x392: + "000000" & X"000", -- 0x393: + "000000" & X"000", -- 0x394: + "000000" & X"000", -- 0x395: + "000000" & X"000", -- 0x396: + "000000" & X"000", -- 0x397: + "000000" & X"000", -- 0x398: + "000000" & X"000", -- 0x399: + "000000" & X"000", -- 0x39A: + "000000" & X"000", -- 0x39B: + "000000" & X"000", -- 0x39C: + "000000" & X"000", -- 0x39D: + "000000" & X"000", -- 0x39E: + "000000" & X"000", -- 0x39F: + "000000" & X"000", -- 0x3A0: + "000000" & X"000", -- 0x3A1: + "000000" & X"000", -- 0x3A2: + "000000" & X"000", -- 0x3A3: + "000000" & X"000", -- 0x3A4: + "000000" & X"000", -- 0x3A5: + "000000" & X"000", -- 0x3A6: + "000000" & X"000", -- 0x3A7: + "000000" & X"000", -- 0x3A8: + "000000" & X"000", -- 0x3A9: + "000000" & X"000", -- 0x3AA: + "000000" & X"000", -- 0x3AB: + "000000" & X"000", -- 0x3AC: + "000000" & X"000", -- 0x3AD: + "000000" & X"000", -- 0x3AE: + "000000" & X"000", -- 0x3AF: + "000000" & X"000", -- 0x3B0: + "000000" & X"000", -- 0x3B1: + "000000" & X"000", -- 0x3B2: + "000000" & X"000", -- 0x3B3: + "000000" & X"000", -- 0x3B4: + "000000" & X"000", -- 0x3B5: + "000000" & X"000", -- 0x3B6: + "000000" & X"000", -- 0x3B7: + "000000" & X"000", -- 0x3B8: + "000000" & X"000", -- 0x3B9: + "000000" & X"000", -- 0x3BA: + "000000" & X"000", -- 0x3BB: + "000000" & X"000", -- 0x3BC: + "000000" & X"000", -- 0x3BD: + "000000" & X"000", -- 0x3BE: + "000000" & X"000", -- 0x3BF: + "000000" & X"000", -- 0x3C0: + "000000" & X"000", -- 0x3C1: + "000000" & X"000", -- 0x3C2: + "000000" & X"000", -- 0x3C3: + "000000" & X"000", -- 0x3C4: + "000000" & X"000", -- 0x3C5: + "000000" & X"000", -- 0x3C6: + "000000" & X"000", -- 0x3C7: + "000000" & X"000", -- 0x3C8: + "000000" & X"000", -- 0x3C9: + "000000" & X"000", -- 0x3CA: + "000000" & X"000", -- 0x3CB: + "000000" & X"000", -- 0x3CC: + "000000" & X"000", -- 0x3CD: + "000000" & X"000", -- 0x3CE: + "000000" & X"000", -- 0x3CF: + "000000" & X"000", -- 0x3D0: + "000000" & X"000", -- 0x3D1: + "000000" & X"000", -- 0x3D2: + "000000" & X"000", -- 0x3D3: + "000000" & X"000", -- 0x3D4: + "000000" & X"000", -- 0x3D5: + "000000" & X"000", -- 0x3D6: + "000000" & X"000", -- 0x3D7: + "000000" & X"000", -- 0x3D8: + "000000" & X"000", -- 0x3D9: + "000000" & X"000", -- 0x3DA: + "000000" & X"000", -- 0x3DB: + "000000" & X"000", -- 0x3DC: + "000000" & X"000", -- 0x3DD: + "000000" & X"000", -- 0x3DE: + "000000" & X"000", -- 0x3DF: + "000000" & X"000", -- 0x3E0: + "000000" & X"000", -- 0x3E1: + "000000" & X"000", -- 0x3E2: + "000000" & X"000", -- 0x3E3: + "000000" & X"000", -- 0x3E4: + "000000" & X"000", -- 0x3E5: + "000000" & X"000", -- 0x3E6: + "000000" & X"000", -- 0x3E7: + "000000" & X"000", -- 0x3E8: + "000000" & X"000", -- 0x3E9: + "000000" & X"000", -- 0x3EA: + "000000" & X"000", -- 0x3EB: + "000000" & X"000", -- 0x3EC: + "000000" & X"000", -- 0x3ED: + "000000" & X"000", -- 0x3EE: + "000000" & X"000", -- 0x3EF: + "000000" & X"000", -- 0x3F0: + "000000" & X"000", -- 0x3F1: + "000000" & X"000", -- 0x3F2: + "000000" & X"000", -- 0x3F3: + "000000" & X"000", -- 0x3F4: + "000000" & X"000", -- 0x3F5: + "000000" & X"000", -- 0x3F6: + "000000" & X"000", -- 0x3F7: + "000000" & X"000", -- 0x3F8: + "000000" & X"000", -- 0x3F9: + "000000" & X"000", -- 0x3FA: + "000000" & X"000", -- 0x3FB: + "000000" & X"000", -- 0x3FC: + "000000" & X"000", -- 0x3FD: + "000000" & X"000", -- 0x3FE: + "110000" & X"032" -- 0x3FF: JMP 0x032 + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +end counter; + diff --git a/projects/cpu/src/systest/counter_irom_ld.vhdl b/projects/cpu/src/systest/counter_irom_ld.vhdl new file mode 100644 index 0000000..871aea5 --- /dev/null +++ b/projects/cpu/src/systest/counter_irom_ld.vhdl @@ -0,0 +1,1182 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + +END irom; + +ARCHITECTURE loadable OF irom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from counter.jsm + type imem_rom_t is array (0 to 1023) of inst_t; + signal imem_rom : imem_rom_t := + ( + "110000" & X"3FF", -- 0x000: JMP 0x3FF + "111100" & X"000", -- 0x001: PUSH R00 + "111100" & X"001", -- 0x002: PUSH R01 + "111100" & X"002", -- 0x003: PUSH R02 + "111100" & X"003", -- 0x004: PUSH R03 + "111100" & X"004", -- 0x005: PUSH R04 + "111100" & X"005", -- 0x006: PUSH R05 + "111100" & X"006", -- 0x007: PUSH R06 + "111100" & X"007", -- 0x008: PUSH R07 + "111100" & X"008", -- 0x009: PUSH R08 + "111100" & X"009", -- 0x00A: PUSH R09 + "111100" & X"00A", -- 0x00B: PUSH R10 + "111100" & X"00B", -- 0x00C: PUSH R11 + "111100" & X"00C", -- 0x00D: PUSH R12 + "111100" & X"00D", -- 0x00E: PUSH R13 + "111100" & X"00E", -- 0x00F: PUSH R14 + "111100" & X"00F", -- 0x010: PUSH R15 + "101000" & X"060", -- 0x011: XIN R00, (0x06) + "011001" & X"100", -- 0x012: AND R00, 0x10 + "110001" & X"020", -- 0x013: JZ 0x020 + "101000" & X"020", -- 0x014: XIN R00, (0x02) + "001111" & X"0D0", -- 0x015: CMP R00, 0x0D + "111001" & X"01B", -- 0x016: JEQ 0x01B + "001010" & X"1E1", -- 0x017: MOVC R01, (0x1E) + "001011" & X"010", -- 0x018: MOVC (R00), R01 + "001111" & X"1D1", -- 0x019: CMP R01, 0x1D + "110101" & X"01E", -- 0x01A: JLT 0x01E + "000011" & X"0E1", -- 0x01B: MOV R01, 0x0E + "010101" & X"011", -- 0x01C: DEC R01 + "001101" & X"1F1", -- 0x01D: MOVC (0x1F), R01 + "010001" & X"011", -- 0x01E: INC R01 + "001101" & X"1E1", -- 0x01F: MOVC (0x1E), R01 + "111011" & X"098", -- 0x020: CALL 0x098 + "111101" & X"00F", -- 0x021: POP R15 + "111101" & X"00E", -- 0x022: POP R14 + "111101" & X"00D", -- 0x023: POP R13 + "111101" & X"00C", -- 0x024: POP R12 + "111101" & X"00B", -- 0x025: POP R11 + "111101" & X"00A", -- 0x026: POP R10 + "111101" & X"009", -- 0x027: POP R09 + "111101" & X"008", -- 0x028: POP R08 + "111101" & X"007", -- 0x029: POP R07 + "111101" & X"006", -- 0x02A: POP R06 + "111101" & X"005", -- 0x02B: POP R05 + "111101" & X"004", -- 0x02C: POP R04 + "111101" & X"003", -- 0x02D: POP R03 + "111101" & X"002", -- 0x02E: POP R02 + "111101" & X"001", -- 0x02F: POP R01 + "111101" & X"000", -- 0x030: POP R00 + "111111" & X"000", -- 0x031: RETI + "111011" & X"092", -- 0x032: CALL 0x092 + "111011" & X"0C8", -- 0x033: CALL 0x0C8 + "000011" & X"000", -- 0x034: MOV R00, 0x00 + "001101" & X"0C0", -- 0x035: MOVC (0x0C), R00 + "100100" & X"010", -- 0x036: XOUT (0x01), R00 + "001101" & X"1F0", -- 0x037: MOVC (0x1F), R00 + "101000" & X"001", -- 0x038: XIN R01, (0x00) + "011011" & X"801", -- 0x039: OR R01, 0x80 + "001101" & X"0D1", -- 0x03A: MOVC (0x0D), R01 + "000011" & X"0E0", -- 0x03B: MOV R00, 0x0E + "001101" & X"1E0", -- 0x03C: MOVC (0x1E), R00 + "000011" & X"040", -- 0x03D: MOV R00, 0x04 + "100101" & X"020", -- 0x03E: XOUT (R00), 0x02 + "100101" & X"030", -- 0x03F: XOUT (R00), 0x03 + "000011" & X"640", -- 0x040: MOV R00, 0x64 + "001101" & X"0C0", -- 0x041: MOVC (0x0C), R00 + "000011" & X"030", -- 0x042: MOV R00, 0x03 + "100110" & X"030", -- 0x043: COUT (0x03), R00 + "000011" & X"010", -- 0x044: MOV R00, 0x01 + "111011" & X"0E5", -- 0x045: CALL 0x0E5 + "000011" & X"001", -- 0x046: MOV R01, 0x00 + "111011" & X"0EA", -- 0x047: CALL 0x0EA + "101001" & X"000", -- 0x048: CIN R00, (0x00) + "010001" & X"300", -- 0x049: ADD R00, 0x30 + "111011" & X"0FC", -- 0x04A: CALL 0x0FC + "000011" & X"000", -- 0x04B: MOV R00, 0x00 + "100110" & X"010", -- 0x04C: COUT (0x01), R00 + "000011" & X"001", -- 0x04D: MOV R01, 0x00 + "001101" & X"201", -- 0x04E: MOVC (0x20), R01 + "000011" & X"010", -- 0x04F: MOV R00, 0x01 + "100110" & X"010", -- 0x050: COUT (0x01), R00 + "000011" & X"AA1", -- 0x051: MOV R01, 0xAA + "001101" & X"201", -- 0x052: MOVC (0x20), R01 + "000011" & X"000", -- 0x053: MOV R00, 0x00 + "100110" & X"010", -- 0x054: COUT (0x01), R00 + "001010" & X"200", -- 0x055: MOVC R00, (0x20) + "001111" & X"AA0", -- 0x056: CMP R00, 0xAA + "111001" & X"05D", -- 0x057: JEQ 0x05D + "000011" & X"010", -- 0x058: MOV R00, 0x01 + "100110" & X"010", -- 0x059: COUT (0x01), R00 + "001010" & X"200", -- 0x05A: MOVC R00, (0x20) + "001111" & X"AA0", -- 0x05B: CMP R00, 0xAA + "111001" & X"05E", -- 0x05C: JEQ 0x05E + "110000" & X"05D", -- 0x05D: JMP 0x05D + "000011" & X"000", -- 0x05E: MOV R00, 0x00 + "100110" & X"010", -- 0x05F: COUT (0x01), R00 + "000001" & X"000", -- 0x060: HALT + "001010" & X"0C0", -- 0x061: MOVC R00, (0x0C) + "010101" & X"010", -- 0x062: DEC R00 + "001101" & X"0C0", -- 0x063: MOVC (0x0C), R00 + "110010" & X"060", -- 0x064: JNZ 0x060 + "000011" & X"647", -- 0x065: MOV R07, 0x64 + "001010" & X"041", -- 0x066: MOVC R01, (0x04) + "001010" & X"052", -- 0x067: MOVC R02, (0x05) + "101010" & X"001", -- 0x068: SWAP R01 + "011100" & X"021", -- 0x069: XOR R01, R02 + "011001" & X"021", -- 0x06A: AND R01, 0x02 + "110010" & X"06F", -- 0x06B: JNZ 0x06F + "010101" & X"017", -- 0x06C: DEC R07 + "000011" & X"2D0", -- 0x06D: MOV R00, 0x2D + "110000" & X"071", -- 0x06E: JMP 0x071 + "010001" & X"017", -- 0x06F: INC R07 + "000011" & X"2B0", -- 0x070: MOV R00, 0x2B + "001101" & X"0C7", -- 0x071: MOVC (0x0C), R07 + "111011" & X"0BA", -- 0x072: CALL 0x0BA + "001010" & X"0D0", -- 0x073: MOVC R00, (0x0D) + "100000" & X"000", -- 0x074: ROL R00 + "001101" & X"0D0", -- 0x075: MOVC (0x0D), R00 + "100100" & X"010", -- 0x076: XOUT (0x01), R00 + "001010" & X"1F0", -- 0x077: MOVC R00, (0x1F) + "000011" & X"001", -- 0x078: MOV R01, 0x00 + "001101" & X"1F1", -- 0x079: MOVC (0x1F), R01 + "001111" & X"000", -- 0x07A: TST R00 + "110001" & X"082", -- 0x07B: JZ 0x082 + "000011" & X"0E1", -- 0x07C: MOV R01, 0x0E + "001001" & X"010", -- 0x07D: MOVC R00, (R01) + "111011" & X"0FC", -- 0x07E: CALL 0x0FC + "010001" & X"011", -- 0x07F: INC R01 + "001111" & X"1D1", -- 0x080: CMP R01, 0x1D + "110111" & X"07D", -- 0x081: JLE 0x07D + "111011" & X"0A2", -- 0x082: CALL 0x0A2 + "000011" & X"C00", -- 0x083: MOV R00, 0xC0 + "111011" & X"0E5", -- 0x084: CALL 0x0E5 + "000011" & X"0B1", -- 0x085: MOV R01, 0x0B + "001001" & X"010", -- 0x086: MOVC R00, (R01) + "111011" & X"0BA", -- 0x087: CALL 0x0BA + "111011" & X"0FC", -- 0x088: CALL 0x0FC + "001111" & X"041", -- 0x089: CMP R01, 0x04 + "111001" & X"08D", -- 0x08A: JEQ 0x08D + "010101" & X"011", -- 0x08B: DEC R01 + "110000" & X"086", -- 0x08C: JMP 0x086 + "000011" & X"0D0", -- 0x08D: MOV R00, 0x0D + "111011" & X"0BA", -- 0x08E: CALL 0x0BA + "000011" & X"0A0", -- 0x08F: MOV R00, 0x0A + "111011" & X"0BA", -- 0x090: CALL 0x0BA + "110000" & X"060", -- 0x091: JMP 0x060 + "000011" & X"000", -- 0x092: MOV R00, 0x00 + "001101" & X"000", -- 0x093: MOVC (0x00), R00 + "001101" & X"010", -- 0x094: MOVC (0x01), R00 + "001101" & X"020", -- 0x095: MOVC (0x02), R00 + "001101" & X"030", -- 0x096: MOVC (0x03), R00 + "111110" & X"000", -- 0x097: RET + "000011" & X"000", -- 0x098: MOV R00, 0x00 + "001001" & X"001", -- 0x099: MOVC R01, (R00) + "010001" & X"011", -- 0x09A: INC R01 + "001011" & X"001", -- 0x09B: MOVC (R01), R00 + "110100" & X"0A1", -- 0x09C: JNC 0x0A1 + "001111" & X"030", -- 0x09D: CMP R00, 0x03 + "111001" & X"0A1", -- 0x09E: JEQ 0x0A1 + "010001" & X"010", -- 0x09F: INC R00 + "110000" & X"099", -- 0x0A0: JMP 0x099 + "111110" & X"000", -- 0x0A1: RET + "000011" & X"042", -- 0x0A2: MOV R02, 0x04 + "000011" & X"000", -- 0x0A3: MOV R00, 0x00 + "001001" & X"001", -- 0x0A4: MOVC R01, (R00) + "011001" & X"0F1", -- 0x0A5: AND R01, 0x0F + "001111" & X"0A1", -- 0x0A6: CMP R01, 0x0A + "110101" & X"0A9", -- 0x0A7: JLT 0x0A9 + "010001" & X"071", -- 0x0A8: ADD R01, 0x07 + "010001" & X"301", -- 0x0A9: ADD R01, 0x30 + "001011" & X"021", -- 0x0AA: MOVC (R01), R02 + "010001" & X"012", -- 0x0AB: INC R02 + "001001" & X"001", -- 0x0AC: MOVC R01, (R00) + "101010" & X"001", -- 0x0AD: SWAP R01 + "011001" & X"0F1", -- 0x0AE: AND R01, 0x0F + "001111" & X"0A1", -- 0x0AF: CMP R01, 0x0A + "110101" & X"0B2", -- 0x0B0: JLT 0x0B2 + "010001" & X"071", -- 0x0B1: ADD R01, 0x07 + "010001" & X"301", -- 0x0B2: ADD R01, 0x30 + "001011" & X"021", -- 0x0B3: MOVC (R01), R02 + "001111" & X"030", -- 0x0B4: CMP R00, 0x03 + "111001" & X"0B9", -- 0x0B5: JEQ 0x0B9 + "010001" & X"010", -- 0x0B6: INC R00 + "010001" & X"012", -- 0x0B7: INC R02 + "110000" & X"0A4", -- 0x0B8: JMP 0x0A4 + "111110" & X"000", -- 0x0B9: RET + "111100" & X"001", -- 0x0BA: PUSH R01 + "101000" & X"061", -- 0x0BB: XIN R01, (0x06) + "011001" & X"021", -- 0x0BC: AND R01, 0x02 + "110010" & X"0BB", -- 0x0BD: JNZ 0x0BB + "100100" & X"020", -- 0x0BE: XOUT (0x02), R00 + "111101" & X"001", -- 0x0BF: POP R01 + "111110" & X"000", -- 0x0C0: RET + "111100" & X"001", -- 0x0C1: PUSH R01 + "101000" & X"061", -- 0x0C2: XIN R01, (0x06) + "011001" & X"101", -- 0x0C3: AND R01, 0x10 + "110010" & X"0C2", -- 0x0C4: JNZ 0x0C2 + "101000" & X"020", -- 0x0C5: XIN R00, (0x02) + "111101" & X"001", -- 0x0C6: POP R01 + "111110" & X"000", -- 0x0C7: RET + "000011" & X"002", -- 0x0C8: MOV R02, 0x00 + "000011" & X"030", -- 0x0C9: MOV R00, 0x03 + "111011" & X"114", -- 0x0CA: CALL 0x114 + "111011" & X"147", -- 0x0CB: CALL 0x147 + "000011" & X"002", -- 0x0CC: MOV R02, 0x00 + "000011" & X"030", -- 0x0CD: MOV R00, 0x03 + "111011" & X"114", -- 0x0CE: CALL 0x114 + "111011" & X"147", -- 0x0CF: CALL 0x147 + "000011" & X"002", -- 0x0D0: MOV R02, 0x00 + "000011" & X"020", -- 0x0D1: MOV R00, 0x02 + "111011" & X"114", -- 0x0D2: CALL 0x114 + "111011" & X"14E", -- 0x0D3: CALL 0x14E + "000011" & X"280", -- 0x0D4: MOV R00, 0x28 + "111011" & X"0E5", -- 0x0D5: CALL 0x0E5 + "000011" & X"0C0", -- 0x0D6: MOV R00, 0x0C + "111011" & X"0E5", -- 0x0D7: CALL 0x0E5 + "000011" & X"060", -- 0x0D8: MOV R00, 0x06 + "111011" & X"0E5", -- 0x0D9: CALL 0x0E5 + "000011" & X"010", -- 0x0DA: MOV R00, 0x01 + "111011" & X"0E5", -- 0x0DB: CALL 0x0E5 + "111110" & X"000", -- 0x0DC: RET + "111100" & X"000", -- 0x0DD: PUSH R00 + "111011" & X"108", -- 0x0DE: CALL 0x108 + "011001" & X"800", -- 0x0DF: AND R00, 0x80 + "110001" & X"0E3", -- 0x0E0: JZ 0x0E3 + "111011" & X"165", -- 0x0E1: CALL 0x165 + "110000" & X"0DE", -- 0x0E2: JMP 0x0DE + "111101" & X"000", -- 0x0E3: POP R00 + "111110" & X"000", -- 0x0E4: RET + "111100" & X"002", -- 0x0E5: PUSH R02 + "000011" & X"002", -- 0x0E6: MOV R02, 0x00 + "111011" & X"101", -- 0x0E7: CALL 0x101 + "111101" & X"002", -- 0x0E8: POP R02 + "111110" & X"000", -- 0x0E9: RET + "111100" & X"000", -- 0x0EA: PUSH R00 + "000100" & X"010", -- 0x0EB: MOVX R00, (R01) + "010001" & X"011", -- 0x0EC: INC R01 + "001111" & X"000", -- 0x0ED: TST R00 + "110001" & X"0F1", -- 0x0EE: JZ 0x0F1 + "111011" & X"0FC", -- 0x0EF: CALL 0x0FC + "110000" & X"0EB", -- 0x0F0: JMP 0x0EB + "111101" & X"000", -- 0x0F1: POP R00 + "111110" & X"000", -- 0x0F2: RET + "111100" & X"000", -- 0x0F3: PUSH R00 + "001001" & X"010", -- 0x0F4: MOVC R00, (R01) + "010001" & X"011", -- 0x0F5: INC R01 + "001111" & X"000", -- 0x0F6: TST R00 + "110001" & X"0FA", -- 0x0F7: JZ 0x0FA + "111011" & X"0FC", -- 0x0F8: CALL 0x0FC + "110000" & X"0F4", -- 0x0F9: JMP 0x0F4 + "111101" & X"000", -- 0x0FA: POP R00 + "111110" & X"000", -- 0x0FB: RET + "111100" & X"002", -- 0x0FC: PUSH R02 + "000011" & X"402", -- 0x0FD: MOV R02, 0x40 + "111011" & X"101", -- 0x0FE: CALL 0x101 + "111101" & X"002", -- 0x0FF: POP R02 + "111110" & X"000", -- 0x100: RET + "111011" & X"0DD", -- 0x101: CALL 0x0DD + "111100" & X"000", -- 0x102: PUSH R00 + "101010" & X"000", -- 0x103: SWAP R00 + "111011" & X"114", -- 0x104: CALL 0x114 + "111101" & X"000", -- 0x105: POP R00 + "111011" & X"114", -- 0x106: CALL 0x114 + "111110" & X"000", -- 0x107: RET + "111100" & X"002", -- 0x108: PUSH R02 + "000011" & X"002", -- 0x109: MOV R02, 0x00 + "111011" & X"10D", -- 0x10A: CALL 0x10D + "111101" & X"002", -- 0x10B: POP R02 + "111110" & X"000", -- 0x10C: RET + "111011" & X"127", -- 0x10D: CALL 0x127 + "101010" & X"000", -- 0x10E: SWAP R00 + "111100" & X"000", -- 0x10F: PUSH R00 + "111011" & X"127", -- 0x110: CALL 0x127 + "111101" & X"002", -- 0x111: POP R02 + "011010" & X"020", -- 0x112: OR R00, R02 + "111110" & X"000", -- 0x113: RET + "111100" & X"001", -- 0x114: PUSH R01 + "011001" & X"0F0", -- 0x115: AND R00, 0x0F + "000010" & X"001", -- 0x116: MOV R01, R00 + "011010" & X"021", -- 0x117: OR R01, R02 + "100100" & X"031", -- 0x118: XOUT (0x03), R01 + "111011" & X"165", -- 0x119: CALL 0x165 + "000010" & X"001", -- 0x11A: MOV R01, R00 + "011010" & X"021", -- 0x11B: OR R01, R02 + "011011" & X"801", -- 0x11C: OR R01, 0x80 + "100100" & X"031", -- 0x11D: XOUT (0x03), R01 + "111011" & X"165", -- 0x11E: CALL 0x165 + "000010" & X"001", -- 0x11F: MOV R01, R00 + "011010" & X"021", -- 0x120: OR R01, R02 + "100100" & X"031", -- 0x121: XOUT (0x03), R01 + "111011" & X"165", -- 0x122: CALL 0x165 + "011011" & X"201", -- 0x123: OR R01, 0x20 + "100100" & X"031", -- 0x124: XOUT (0x03), R01 + "111101" & X"001", -- 0x125: POP R01 + "111110" & X"000", -- 0x126: RET + "111100" & X"001", -- 0x127: PUSH R01 + "000011" & X"201", -- 0x128: MOV R01, 0x20 + "011010" & X"021", -- 0x129: OR R01, R02 + "100100" & X"031", -- 0x12A: XOUT (0x03), R01 + "111011" & X"165", -- 0x12B: CALL 0x165 + "000011" & X"201", -- 0x12C: MOV R01, 0x20 + "011010" & X"021", -- 0x12D: OR R01, R02 + "011011" & X"801", -- 0x12E: OR R01, 0x80 + "100100" & X"031", -- 0x12F: XOUT (0x03), R01 + "111011" & X"165", -- 0x130: CALL 0x165 + "101000" & X"030", -- 0x131: XIN R00, (0x03) + "011001" & X"0F0", -- 0x132: AND R00, 0x0F + "000011" & X"201", -- 0x133: MOV R01, 0x20 + "011010" & X"021", -- 0x134: OR R01, R02 + "100100" & X"031", -- 0x135: XOUT (0x03), R01 + "111011" & X"165", -- 0x136: CALL 0x165 + "111101" & X"001", -- 0x137: POP R01 + "111110" & X"000", -- 0x138: RET + "111100" & X"00F", -- 0x139: PUSH R15 + "000011" & X"0AF", -- 0x13A: MOV R15, 0x0A + "111011" & X"140", -- 0x13B: CALL 0x140 + "010101" & X"01F", -- 0x13C: DEC R15 + "110010" & X"13B", -- 0x13D: JNZ 0x13B + "111101" & X"00F", -- 0x13E: POP R15 + "111110" & X"000", -- 0x13F: RET + "111100" & X"00F", -- 0x140: PUSH R15 + "000011" & X"0AF", -- 0x141: MOV R15, 0x0A + "111011" & X"147", -- 0x142: CALL 0x147 + "010101" & X"01F", -- 0x143: DEC R15 + "110010" & X"142", -- 0x144: JNZ 0x142 + "111101" & X"00F", -- 0x145: POP R15 + "111110" & X"000", -- 0x146: RET + "111100" & X"00F", -- 0x147: PUSH R15 + "000011" & X"0AF", -- 0x148: MOV R15, 0x0A + "111011" & X"14E", -- 0x149: CALL 0x14E + "010101" & X"01F", -- 0x14A: DEC R15 + "110010" & X"149", -- 0x14B: JNZ 0x149 + "111101" & X"00F", -- 0x14C: POP R15 + "111110" & X"000", -- 0x14D: RET + "111100" & X"00F", -- 0x14E: PUSH R15 + "000011" & X"0AF", -- 0x14F: MOV R15, 0x0A + "111011" & X"155", -- 0x150: CALL 0x155 + "010101" & X"01F", -- 0x151: DEC R15 + "110010" & X"150", -- 0x152: JNZ 0x150 + "111101" & X"00F", -- 0x153: POP R15 + "111110" & X"000", -- 0x154: RET + "111100" & X"00F", -- 0x155: PUSH R15 + "000011" & X"0AF", -- 0x156: MOV R15, 0x0A + "111011" & X"15C", -- 0x157: CALL 0x15C + "010101" & X"01F", -- 0x158: DEC R15 + "110010" & X"157", -- 0x159: JNZ 0x157 + "111101" & X"00F", -- 0x15A: POP R15 + "111110" & X"000", -- 0x15B: RET + "111100" & X"00F", -- 0x15C: PUSH R15 + "000011" & X"63F", -- 0x15D: MOV R15, 0x63 + "000000" & X"000", -- 0x15E: NOP + "000000" & X"000", -- 0x15F: NOP + "000000" & X"000", -- 0x160: NOP + "010101" & X"01F", -- 0x161: DEC R15 + "110010" & X"15E", -- 0x162: JNZ 0x15E + "111101" & X"00F", -- 0x163: POP R15 + "111110" & X"000", -- 0x164: RET + "111100" & X"00F", -- 0x165: PUSH R15 + "000011" & X"09F", -- 0x166: MOV R15, 0x09 + "000000" & X"000", -- 0x167: NOP + "000000" & X"000", -- 0x168: NOP + "000000" & X"000", -- 0x169: NOP + "010101" & X"01F", -- 0x16A: DEC R15 + "110010" & X"167", -- 0x16B: JNZ 0x167 + "111101" & X"00F", -- 0x16C: POP R15 + "111110" & X"000", -- 0x16D: RET + "000000" & X"000", -- 0x16E: + "000000" & X"000", -- 0x16F: + "000000" & X"000", -- 0x170: + "000000" & X"000", -- 0x171: + "000000" & X"000", -- 0x172: + "000000" & X"000", -- 0x173: + "000000" & X"000", -- 0x174: + "000000" & X"000", -- 0x175: + "000000" & X"000", -- 0x176: + "000000" & X"000", -- 0x177: + "000000" & X"000", -- 0x178: + "000000" & X"000", -- 0x179: + "000000" & X"000", -- 0x17A: + "000000" & X"000", -- 0x17B: + "000000" & X"000", -- 0x17C: + "000000" & X"000", -- 0x17D: + "000000" & X"000", -- 0x17E: + "000000" & X"000", -- 0x17F: + "000000" & X"000", -- 0x180: + "000000" & X"000", -- 0x181: + "000000" & X"000", -- 0x182: + "000000" & X"000", -- 0x183: + "000000" & X"000", -- 0x184: + "000000" & X"000", -- 0x185: + "000000" & X"000", -- 0x186: + "000000" & X"000", -- 0x187: + "000000" & X"000", -- 0x188: + "000000" & X"000", -- 0x189: + "000000" & X"000", -- 0x18A: + "000000" & X"000", -- 0x18B: + "000000" & X"000", -- 0x18C: + "000000" & X"000", -- 0x18D: + "000000" & X"000", -- 0x18E: + "000000" & X"000", -- 0x18F: + "000000" & X"000", -- 0x190: + "000000" & X"000", -- 0x191: + "000000" & X"000", -- 0x192: + "000000" & X"000", -- 0x193: + "000000" & X"000", -- 0x194: + "000000" & X"000", -- 0x195: + "000000" & X"000", -- 0x196: + "000000" & X"000", -- 0x197: + "000000" & X"000", -- 0x198: + "000000" & X"000", -- 0x199: + "000000" & X"000", -- 0x19A: + "000000" & X"000", -- 0x19B: + "000000" & X"000", -- 0x19C: + "000000" & X"000", -- 0x19D: + "000000" & X"000", -- 0x19E: + "000000" & X"000", -- 0x19F: + "000000" & X"000", -- 0x1A0: + "000000" & X"000", -- 0x1A1: + "000000" & X"000", -- 0x1A2: + "000000" & X"000", -- 0x1A3: + "000000" & X"000", -- 0x1A4: + "000000" & X"000", -- 0x1A5: + "000000" & X"000", -- 0x1A6: + "000000" & X"000", -- 0x1A7: + "000000" & X"000", -- 0x1A8: + "000000" & X"000", -- 0x1A9: + "000000" & X"000", -- 0x1AA: + "000000" & X"000", -- 0x1AB: + "000000" & X"000", -- 0x1AC: + "000000" & X"000", -- 0x1AD: + "000000" & X"000", -- 0x1AE: + "000000" & X"000", -- 0x1AF: + "000000" & X"000", -- 0x1B0: + "000000" & X"000", -- 0x1B1: + "000000" & X"000", -- 0x1B2: + "000000" & X"000", -- 0x1B3: + "000000" & X"000", -- 0x1B4: + "000000" & X"000", -- 0x1B5: + "000000" & X"000", -- 0x1B6: + "000000" & X"000", -- 0x1B7: + "000000" & X"000", -- 0x1B8: + "000000" & X"000", -- 0x1B9: + "000000" & X"000", -- 0x1BA: + "000000" & X"000", -- 0x1BB: + "000000" & X"000", -- 0x1BC: + "000000" & X"000", -- 0x1BD: + "000000" & X"000", -- 0x1BE: + "000000" & X"000", -- 0x1BF: + "000000" & X"000", -- 0x1C0: + "000000" & X"000", -- 0x1C1: + "000000" & X"000", -- 0x1C2: + "000000" & X"000", -- 0x1C3: + "000000" & X"000", -- 0x1C4: + "000000" & X"000", -- 0x1C5: + "000000" & X"000", -- 0x1C6: + "000000" & X"000", -- 0x1C7: + "000000" & X"000", -- 0x1C8: + "000000" & X"000", -- 0x1C9: + "000000" & X"000", -- 0x1CA: + "000000" & X"000", -- 0x1CB: + "000000" & X"000", -- 0x1CC: + "000000" & X"000", -- 0x1CD: + "000000" & X"000", -- 0x1CE: + "000000" & X"000", -- 0x1CF: + "000000" & X"000", -- 0x1D0: + "000000" & X"000", -- 0x1D1: + "000000" & X"000", -- 0x1D2: + "000000" & X"000", -- 0x1D3: + "000000" & X"000", -- 0x1D4: + "000000" & X"000", -- 0x1D5: + "000000" & X"000", -- 0x1D6: + "000000" & X"000", -- 0x1D7: + "000000" & X"000", -- 0x1D8: + "000000" & X"000", -- 0x1D9: + "000000" & X"000", -- 0x1DA: + "000000" & X"000", -- 0x1DB: + "000000" & X"000", -- 0x1DC: + "000000" & X"000", -- 0x1DD: + "000000" & X"000", -- 0x1DE: + "000000" & X"000", -- 0x1DF: + "000000" & X"000", -- 0x1E0: + "000000" & X"000", -- 0x1E1: + "000000" & X"000", -- 0x1E2: + "000000" & X"000", -- 0x1E3: + "000000" & X"000", -- 0x1E4: + "000000" & X"000", -- 0x1E5: + "000000" & X"000", -- 0x1E6: + "000000" & X"000", -- 0x1E7: + "000000" & X"000", -- 0x1E8: + "000000" & X"000", -- 0x1E9: + "000000" & X"000", -- 0x1EA: + "000000" & X"000", -- 0x1EB: + "000000" & X"000", -- 0x1EC: + "000000" & X"000", -- 0x1ED: + "000000" & X"000", -- 0x1EE: + "000000" & X"000", -- 0x1EF: + "000000" & X"000", -- 0x1F0: + "000000" & X"000", -- 0x1F1: + "000000" & X"000", -- 0x1F2: + "000000" & X"000", -- 0x1F3: + "000000" & X"000", -- 0x1F4: + "000000" & X"000", -- 0x1F5: + "000000" & X"000", -- 0x1F6: + "000000" & X"000", -- 0x1F7: + "000000" & X"000", -- 0x1F8: + "000000" & X"000", -- 0x1F9: + "000000" & X"000", -- 0x1FA: + "000000" & X"000", -- 0x1FB: + "000000" & X"000", -- 0x1FC: + "000000" & X"000", -- 0x1FD: + "000000" & X"000", -- 0x1FE: + "000000" & X"000", -- 0x1FF: + "000000" & X"000", -- 0x200: + "000000" & X"000", -- 0x201: + "000000" & X"000", -- 0x202: + "000000" & X"000", -- 0x203: + "000000" & X"000", -- 0x204: + "000000" & X"000", -- 0x205: + "000000" & X"000", -- 0x206: + "000000" & X"000", -- 0x207: + "000000" & X"000", -- 0x208: + "000000" & X"000", -- 0x209: + "000000" & X"000", -- 0x20A: + "000000" & X"000", -- 0x20B: + "000000" & X"000", -- 0x20C: + "000000" & X"000", -- 0x20D: + "000000" & X"000", -- 0x20E: + "000000" & X"000", -- 0x20F: + "000000" & X"000", -- 0x210: + "000000" & X"000", -- 0x211: + "000000" & X"000", -- 0x212: + "000000" & X"000", -- 0x213: + "000000" & X"000", -- 0x214: + "000000" & X"000", -- 0x215: + "000000" & X"000", -- 0x216: + "000000" & X"000", -- 0x217: + "000000" & X"000", -- 0x218: + "000000" & X"000", -- 0x219: + "000000" & X"000", -- 0x21A: + "000000" & X"000", -- 0x21B: + "000000" & X"000", -- 0x21C: + "000000" & X"000", -- 0x21D: + "000000" & X"000", -- 0x21E: + "000000" & X"000", -- 0x21F: + "000000" & X"000", -- 0x220: + "000000" & X"000", -- 0x221: + "000000" & X"000", -- 0x222: + "000000" & X"000", -- 0x223: + "000000" & X"000", -- 0x224: + "000000" & X"000", -- 0x225: + "000000" & X"000", -- 0x226: + "000000" & X"000", -- 0x227: + "000000" & X"000", -- 0x228: + "000000" & X"000", -- 0x229: + "000000" & X"000", -- 0x22A: + "000000" & X"000", -- 0x22B: + "000000" & X"000", -- 0x22C: + "000000" & X"000", -- 0x22D: + "000000" & X"000", -- 0x22E: + "000000" & X"000", -- 0x22F: + "000000" & X"000", -- 0x230: + "000000" & X"000", -- 0x231: + "000000" & X"000", -- 0x232: + "000000" & X"000", -- 0x233: + "000000" & X"000", -- 0x234: + "000000" & X"000", -- 0x235: + "000000" & X"000", -- 0x236: + "000000" & X"000", -- 0x237: + "000000" & X"000", -- 0x238: + "000000" & X"000", -- 0x239: + "000000" & X"000", -- 0x23A: + "000000" & X"000", -- 0x23B: + "000000" & X"000", -- 0x23C: + "000000" & X"000", -- 0x23D: + "000000" & X"000", -- 0x23E: + "000000" & X"000", -- 0x23F: + "000000" & X"000", -- 0x240: + "000000" & X"000", -- 0x241: + "000000" & X"000", -- 0x242: + "000000" & X"000", -- 0x243: + "000000" & X"000", -- 0x244: + "000000" & X"000", -- 0x245: + "000000" & X"000", -- 0x246: + "000000" & X"000", -- 0x247: + "000000" & X"000", -- 0x248: + "000000" & X"000", -- 0x249: + "000000" & X"000", -- 0x24A: + "000000" & X"000", -- 0x24B: + "000000" & X"000", -- 0x24C: + "000000" & X"000", -- 0x24D: + "000000" & X"000", -- 0x24E: + "000000" & X"000", -- 0x24F: + "000000" & X"000", -- 0x250: + "000000" & X"000", -- 0x251: + "000000" & X"000", -- 0x252: + "000000" & X"000", -- 0x253: + "000000" & X"000", -- 0x254: + "000000" & X"000", -- 0x255: + "000000" & X"000", -- 0x256: + "000000" & X"000", -- 0x257: + "000000" & X"000", -- 0x258: + "000000" & X"000", -- 0x259: + "000000" & X"000", -- 0x25A: + "000000" & X"000", -- 0x25B: + "000000" & X"000", -- 0x25C: + "000000" & X"000", -- 0x25D: + "000000" & X"000", -- 0x25E: + "000000" & X"000", -- 0x25F: + "000000" & X"000", -- 0x260: + "000000" & X"000", -- 0x261: + "000000" & X"000", -- 0x262: + "000000" & X"000", -- 0x263: + "000000" & X"000", -- 0x264: + "000000" & X"000", -- 0x265: + "000000" & X"000", -- 0x266: + "000000" & X"000", -- 0x267: + "000000" & X"000", -- 0x268: + "000000" & X"000", -- 0x269: + "000000" & X"000", -- 0x26A: + "000000" & X"000", -- 0x26B: + "000000" & X"000", -- 0x26C: + "000000" & X"000", -- 0x26D: + "000000" & X"000", -- 0x26E: + "000000" & X"000", -- 0x26F: + "000000" & X"000", -- 0x270: + "000000" & X"000", -- 0x271: + "000000" & X"000", -- 0x272: + "000000" & X"000", -- 0x273: + "000000" & X"000", -- 0x274: + "000000" & X"000", -- 0x275: + "000000" & X"000", -- 0x276: + "000000" & X"000", -- 0x277: + "000000" & X"000", -- 0x278: + "000000" & X"000", -- 0x279: + "000000" & X"000", -- 0x27A: + "000000" & X"000", -- 0x27B: + "000000" & X"000", -- 0x27C: + "000000" & X"000", -- 0x27D: + "000000" & X"000", -- 0x27E: + "000000" & X"000", -- 0x27F: + "000000" & X"000", -- 0x280: + "000000" & X"000", -- 0x281: + "000000" & X"000", -- 0x282: + "000000" & X"000", -- 0x283: + "000000" & X"000", -- 0x284: + "000000" & X"000", -- 0x285: + "000000" & X"000", -- 0x286: + "000000" & X"000", -- 0x287: + "000000" & X"000", -- 0x288: + "000000" & X"000", -- 0x289: + "000000" & X"000", -- 0x28A: + "000000" & X"000", -- 0x28B: + "000000" & X"000", -- 0x28C: + "000000" & X"000", -- 0x28D: + "000000" & X"000", -- 0x28E: + "000000" & X"000", -- 0x28F: + "000000" & X"000", -- 0x290: + "000000" & X"000", -- 0x291: + "000000" & X"000", -- 0x292: + "000000" & X"000", -- 0x293: + "000000" & X"000", -- 0x294: + "000000" & X"000", -- 0x295: + "000000" & X"000", -- 0x296: + "000000" & X"000", -- 0x297: + "000000" & X"000", -- 0x298: + "000000" & X"000", -- 0x299: + "000000" & X"000", -- 0x29A: + "000000" & X"000", -- 0x29B: + "000000" & X"000", -- 0x29C: + "000000" & X"000", -- 0x29D: + "000000" & X"000", -- 0x29E: + "000000" & X"000", -- 0x29F: + "000000" & X"000", -- 0x2A0: + "000000" & X"000", -- 0x2A1: + "000000" & X"000", -- 0x2A2: + "000000" & X"000", -- 0x2A3: + "000000" & X"000", -- 0x2A4: + "000000" & X"000", -- 0x2A5: + "000000" & X"000", -- 0x2A6: + "000000" & X"000", -- 0x2A7: + "000000" & X"000", -- 0x2A8: + "000000" & X"000", -- 0x2A9: + "000000" & X"000", -- 0x2AA: + "000000" & X"000", -- 0x2AB: + "000000" & X"000", -- 0x2AC: + "000000" & X"000", -- 0x2AD: + "000000" & X"000", -- 0x2AE: + "000000" & X"000", -- 0x2AF: + "000000" & X"000", -- 0x2B0: + "000000" & X"000", -- 0x2B1: + "000000" & X"000", -- 0x2B2: + "000000" & X"000", -- 0x2B3: + "000000" & X"000", -- 0x2B4: + "000000" & X"000", -- 0x2B5: + "000000" & X"000", -- 0x2B6: + "000000" & X"000", -- 0x2B7: + "000000" & X"000", -- 0x2B8: + "000000" & X"000", -- 0x2B9: + "000000" & X"000", -- 0x2BA: + "000000" & X"000", -- 0x2BB: + "000000" & X"000", -- 0x2BC: + "000000" & X"000", -- 0x2BD: + "000000" & X"000", -- 0x2BE: + "000000" & X"000", -- 0x2BF: + "000000" & X"000", -- 0x2C0: + "000000" & X"000", -- 0x2C1: + "000000" & X"000", -- 0x2C2: + "000000" & X"000", -- 0x2C3: + "000000" & X"000", -- 0x2C4: + "000000" & X"000", -- 0x2C5: + "000000" & X"000", -- 0x2C6: + "000000" & X"000", -- 0x2C7: + "000000" & X"000", -- 0x2C8: + "000000" & X"000", -- 0x2C9: + "000000" & X"000", -- 0x2CA: + "000000" & X"000", -- 0x2CB: + "000000" & X"000", -- 0x2CC: + "000000" & X"000", -- 0x2CD: + "000000" & X"000", -- 0x2CE: + "000000" & X"000", -- 0x2CF: + "000000" & X"000", -- 0x2D0: + "000000" & X"000", -- 0x2D1: + "000000" & X"000", -- 0x2D2: + "000000" & X"000", -- 0x2D3: + "000000" & X"000", -- 0x2D4: + "000000" & X"000", -- 0x2D5: + "000000" & X"000", -- 0x2D6: + "000000" & X"000", -- 0x2D7: + "000000" & X"000", -- 0x2D8: + "000000" & X"000", -- 0x2D9: + "000000" & X"000", -- 0x2DA: + "000000" & X"000", -- 0x2DB: + "000000" & X"000", -- 0x2DC: + "000000" & X"000", -- 0x2DD: + "000000" & X"000", -- 0x2DE: + "000000" & X"000", -- 0x2DF: + "000000" & X"000", -- 0x2E0: + "000000" & X"000", -- 0x2E1: + "000000" & X"000", -- 0x2E2: + "000000" & X"000", -- 0x2E3: + "000000" & X"000", -- 0x2E4: + "000000" & X"000", -- 0x2E5: + "000000" & X"000", -- 0x2E6: + "000000" & X"000", -- 0x2E7: + "000000" & X"000", -- 0x2E8: + "000000" & X"000", -- 0x2E9: + "000000" & X"000", -- 0x2EA: + "000000" & X"000", -- 0x2EB: + "000000" & X"000", -- 0x2EC: + "000000" & X"000", -- 0x2ED: + "000000" & X"000", -- 0x2EE: + "000000" & X"000", -- 0x2EF: + "000000" & X"000", -- 0x2F0: + "000000" & X"000", -- 0x2F1: + "000000" & X"000", -- 0x2F2: + "000000" & X"000", -- 0x2F3: + "000000" & X"000", -- 0x2F4: + "000000" & X"000", -- 0x2F5: + "000000" & X"000", -- 0x2F6: + "000000" & X"000", -- 0x2F7: + "000000" & X"000", -- 0x2F8: + "000000" & X"000", -- 0x2F9: + "000000" & X"000", -- 0x2FA: + "000000" & X"000", -- 0x2FB: + "000000" & X"000", -- 0x2FC: + "000000" & X"000", -- 0x2FD: + "000000" & X"000", -- 0x2FE: + "000000" & X"000", -- 0x2FF: + "000000" & X"000", -- 0x300: + "000000" & X"000", -- 0x301: + "000000" & X"000", -- 0x302: + "000000" & X"000", -- 0x303: + "000000" & X"000", -- 0x304: + "000000" & X"000", -- 0x305: + "000000" & X"000", -- 0x306: + "000000" & X"000", -- 0x307: + "000000" & X"000", -- 0x308: + "000000" & X"000", -- 0x309: + "000000" & X"000", -- 0x30A: + "000000" & X"000", -- 0x30B: + "000000" & X"000", -- 0x30C: + "000000" & X"000", -- 0x30D: + "000000" & X"000", -- 0x30E: + "000000" & X"000", -- 0x30F: + "000000" & X"000", -- 0x310: + "000000" & X"000", -- 0x311: + "000000" & X"000", -- 0x312: + "000000" & X"000", -- 0x313: + "000000" & X"000", -- 0x314: + "000000" & X"000", -- 0x315: + "000000" & X"000", -- 0x316: + "000000" & X"000", -- 0x317: + "000000" & X"000", -- 0x318: + "000000" & X"000", -- 0x319: + "000000" & X"000", -- 0x31A: + "000000" & X"000", -- 0x31B: + "000000" & X"000", -- 0x31C: + "000000" & X"000", -- 0x31D: + "000000" & X"000", -- 0x31E: + "000000" & X"000", -- 0x31F: + "000000" & X"000", -- 0x320: + "000000" & X"000", -- 0x321: + "000000" & X"000", -- 0x322: + "000000" & X"000", -- 0x323: + "000000" & X"000", -- 0x324: + "000000" & X"000", -- 0x325: + "000000" & X"000", -- 0x326: + "000000" & X"000", -- 0x327: + "000000" & X"000", -- 0x328: + "000000" & X"000", -- 0x329: + "000000" & X"000", -- 0x32A: + "000000" & X"000", -- 0x32B: + "000000" & X"000", -- 0x32C: + "000000" & X"000", -- 0x32D: + "000000" & X"000", -- 0x32E: + "000000" & X"000", -- 0x32F: + "000000" & X"000", -- 0x330: + "000000" & X"000", -- 0x331: + "000000" & X"000", -- 0x332: + "000000" & X"000", -- 0x333: + "000000" & X"000", -- 0x334: + "000000" & X"000", -- 0x335: + "000000" & X"000", -- 0x336: + "000000" & X"000", -- 0x337: + "000000" & X"000", -- 0x338: + "000000" & X"000", -- 0x339: + "000000" & X"000", -- 0x33A: + "000000" & X"000", -- 0x33B: + "000000" & X"000", -- 0x33C: + "000000" & X"000", -- 0x33D: + "000000" & X"000", -- 0x33E: + "000000" & X"000", -- 0x33F: + "000000" & X"000", -- 0x340: + "000000" & X"000", -- 0x341: + "000000" & X"000", -- 0x342: + "000000" & X"000", -- 0x343: + "000000" & X"000", -- 0x344: + "000000" & X"000", -- 0x345: + "000000" & X"000", -- 0x346: + "000000" & X"000", -- 0x347: + "000000" & X"000", -- 0x348: + "000000" & X"000", -- 0x349: + "000000" & X"000", -- 0x34A: + "000000" & X"000", -- 0x34B: + "000000" & X"000", -- 0x34C: + "000000" & X"000", -- 0x34D: + "000000" & X"000", -- 0x34E: + "000000" & X"000", -- 0x34F: + "000000" & X"000", -- 0x350: + "000000" & X"000", -- 0x351: + "000000" & X"000", -- 0x352: + "000000" & X"000", -- 0x353: + "000000" & X"000", -- 0x354: + "000000" & X"000", -- 0x355: + "000000" & X"000", -- 0x356: + "000000" & X"000", -- 0x357: + "000000" & X"000", -- 0x358: + "000000" & X"000", -- 0x359: + "000000" & X"000", -- 0x35A: + "000000" & X"000", -- 0x35B: + "000000" & X"000", -- 0x35C: + "000000" & X"000", -- 0x35D: + "000000" & X"000", -- 0x35E: + "000000" & X"000", -- 0x35F: + "000000" & X"000", -- 0x360: + "000000" & X"000", -- 0x361: + "000000" & X"000", -- 0x362: + "000000" & X"000", -- 0x363: + "000000" & X"000", -- 0x364: + "000000" & X"000", -- 0x365: + "000000" & X"000", -- 0x366: + "000000" & X"000", -- 0x367: + "000000" & X"000", -- 0x368: + "000000" & X"000", -- 0x369: + "000000" & X"000", -- 0x36A: + "000000" & X"000", -- 0x36B: + "000000" & X"000", -- 0x36C: + "000000" & X"000", -- 0x36D: + "000000" & X"000", -- 0x36E: + "000000" & X"000", -- 0x36F: + "000000" & X"000", -- 0x370: + "000000" & X"000", -- 0x371: + "000000" & X"000", -- 0x372: + "000000" & X"000", -- 0x373: + "000000" & X"000", -- 0x374: + "000000" & X"000", -- 0x375: + "000000" & X"000", -- 0x376: + "000000" & X"000", -- 0x377: + "000000" & X"000", -- 0x378: + "000000" & X"000", -- 0x379: + "000000" & X"000", -- 0x37A: + "000000" & X"000", -- 0x37B: + "000000" & X"000", -- 0x37C: + "000000" & X"000", -- 0x37D: + "000000" & X"000", -- 0x37E: + "000000" & X"000", -- 0x37F: + "000000" & X"000", -- 0x380: + "000000" & X"000", -- 0x381: + "000000" & X"000", -- 0x382: + "000000" & X"000", -- 0x383: + "000000" & X"000", -- 0x384: + "000000" & X"000", -- 0x385: + "000000" & X"000", -- 0x386: + "000000" & X"000", -- 0x387: + "000000" & X"000", -- 0x388: + "000000" & X"000", -- 0x389: + "000000" & X"000", -- 0x38A: + "000000" & X"000", -- 0x38B: + "000000" & X"000", -- 0x38C: + "000000" & X"000", -- 0x38D: + "000000" & X"000", -- 0x38E: + "000000" & X"000", -- 0x38F: + "000000" & X"000", -- 0x390: + "000000" & X"000", -- 0x391: + "000000" & X"000", -- 0x392: + "000000" & X"000", -- 0x393: + "000000" & X"000", -- 0x394: + "000000" & X"000", -- 0x395: + "000000" & X"000", -- 0x396: + "000000" & X"000", -- 0x397: + "000000" & X"000", -- 0x398: + "000000" & X"000", -- 0x399: + "000000" & X"000", -- 0x39A: + "000000" & X"000", -- 0x39B: + "000000" & X"000", -- 0x39C: + "000000" & X"000", -- 0x39D: + "000000" & X"000", -- 0x39E: + "000000" & X"000", -- 0x39F: + "000000" & X"000", -- 0x3A0: + "000000" & X"000", -- 0x3A1: + "000000" & X"000", -- 0x3A2: + "000000" & X"000", -- 0x3A3: + "000000" & X"000", -- 0x3A4: + "000000" & X"000", -- 0x3A5: + "000000" & X"000", -- 0x3A6: + "000000" & X"000", -- 0x3A7: + "000000" & X"000", -- 0x3A8: + "000000" & X"000", -- 0x3A9: + "000000" & X"000", -- 0x3AA: + "000000" & X"000", -- 0x3AB: + "000000" & X"000", -- 0x3AC: + "000000" & X"000", -- 0x3AD: + "000000" & X"000", -- 0x3AE: + "000000" & X"000", -- 0x3AF: + "000000" & X"000", -- 0x3B0: + "000000" & X"000", -- 0x3B1: + "000000" & X"000", -- 0x3B2: + "000000" & X"000", -- 0x3B3: + "000000" & X"000", -- 0x3B4: + "000000" & X"000", -- 0x3B5: + "000000" & X"000", -- 0x3B6: + "000000" & X"000", -- 0x3B7: + "000000" & X"000", -- 0x3B8: + "000000" & X"000", -- 0x3B9: + "000000" & X"000", -- 0x3BA: + "000000" & X"000", -- 0x3BB: + "000000" & X"000", -- 0x3BC: + "000000" & X"000", -- 0x3BD: + "000000" & X"000", -- 0x3BE: + "000000" & X"000", -- 0x3BF: + "000000" & X"000", -- 0x3C0: + "000000" & X"000", -- 0x3C1: + "000000" & X"000", -- 0x3C2: + "000000" & X"000", -- 0x3C3: + "000000" & X"000", -- 0x3C4: + "000000" & X"000", -- 0x3C5: + "000000" & X"000", -- 0x3C6: + "000000" & X"000", -- 0x3C7: + "000000" & X"000", -- 0x3C8: + "000000" & X"000", -- 0x3C9: + "000000" & X"000", -- 0x3CA: + "000000" & X"000", -- 0x3CB: + "000000" & X"000", -- 0x3CC: + "000000" & X"000", -- 0x3CD: + "000000" & X"000", -- 0x3CE: + "000000" & X"000", -- 0x3CF: + "000000" & X"000", -- 0x3D0: + "000000" & X"000", -- 0x3D1: + "000000" & X"000", -- 0x3D2: + "000000" & X"000", -- 0x3D3: + "000000" & X"000", -- 0x3D4: + "000000" & X"000", -- 0x3D5: + "000000" & X"000", -- 0x3D6: + "000000" & X"000", -- 0x3D7: + "000000" & X"000", -- 0x3D8: + "000000" & X"000", -- 0x3D9: + "000000" & X"000", -- 0x3DA: + "000000" & X"000", -- 0x3DB: + "000000" & X"000", -- 0x3DC: + "000000" & X"000", -- 0x3DD: + "000000" & X"000", -- 0x3DE: + "000000" & X"000", -- 0x3DF: + "000000" & X"000", -- 0x3E0: + "000000" & X"000", -- 0x3E1: + "000000" & X"000", -- 0x3E2: + "000000" & X"000", -- 0x3E3: + "000000" & X"000", -- 0x3E4: + "000000" & X"000", -- 0x3E5: + "000000" & X"000", -- 0x3E6: + "000000" & X"000", -- 0x3E7: + "000000" & X"000", -- 0x3E8: + "000000" & X"000", -- 0x3E9: + "000000" & X"000", -- 0x3EA: + "000000" & X"000", -- 0x3EB: + "000000" & X"000", -- 0x3EC: + "000000" & X"000", -- 0x3ED: + "000000" & X"000", -- 0x3EE: + "000000" & X"000", -- 0x3EF: + "000000" & X"000", -- 0x3F0: + "000000" & X"000", -- 0x3F1: + "000000" & X"000", -- 0x3F2: + "000000" & X"000", -- 0x3F3: + "000000" & X"000", -- 0x3F4: + "000000" & X"000", -- 0x3F5: + "000000" & X"000", -- 0x3F6: + "000000" & X"000", -- 0x3F7: + "000000" & X"000", -- 0x3F8: + "000000" & X"000", -- 0x3F9: + "000000" & X"000", -- 0x3FA: + "000000" & X"000", -- 0x3FB: + "000000" & X"000", -- 0x3FC: + "000000" & X"000", -- 0x3FD: + "000000" & X"000", -- 0x3FE: + "110000" & X"032" -- 0x3FF: JMP 0x032 + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : inst_addr_t; + signal jtag_ld_dout : inst_t; + signal jtag_ld_din : inst_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (31 downto 0); + constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); + jtag_ld_din <= user_regi(inst_t'length-1 downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/counter_xrom.vhdl b/projects/cpu/src/systest/counter_xrom.vhdl new file mode 100644 index 0000000..d12f063 --- /dev/null +++ b/projects/cpu/src/systest/counter_xrom.vhdl @@ -0,0 +1,318 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); +END xrom; + +ARCHITECTURE counter OF xrom IS + + type xmem_rom_t is array (0 to 255) of dmem_data_t; + + -- Assembled from counter.jsm + constant xmem_rom : xmem_rom_t := + ( + X"4A", -- 0x00 + X"2D", -- 0x01 + X"43", -- 0x02 + X"50", -- 0x03 + X"55", -- 0x04 + X"20", -- 0x05 + X"56", -- 0x06 + X"31", -- 0x07 + X"2E", -- 0x08 + X"00", -- 0x09 + X"00", -- 0x0A + X"00", -- 0x0B + X"00", -- 0x0C + X"00", -- 0x0D + X"00", -- 0x0E + X"00", -- 0x0F + X"00", -- 0x10 + X"00", -- 0x11 + X"00", -- 0x12 + X"00", -- 0x13 + X"00", -- 0x14 + X"00", -- 0x15 + X"00", -- 0x16 + X"00", -- 0x17 + X"00", -- 0x18 + X"00", -- 0x19 + X"00", -- 0x1A + X"00", -- 0x1B + X"00", -- 0x1C + X"00", -- 0x1D + X"00", -- 0x1E + X"00", -- 0x1F + X"00", -- 0x20 + X"00", -- 0x21 + X"00", -- 0x22 + X"00", -- 0x23 + X"00", -- 0x24 + X"00", -- 0x25 + X"00", -- 0x26 + X"00", -- 0x27 + X"00", -- 0x28 + X"00", -- 0x29 + X"00", -- 0x2A + X"00", -- 0x2B + X"00", -- 0x2C + X"00", -- 0x2D + X"00", -- 0x2E + X"00", -- 0x2F + X"00", -- 0x30 + X"00", -- 0x31 + X"00", -- 0x32 + X"00", -- 0x33 + X"00", -- 0x34 + X"00", -- 0x35 + X"00", -- 0x36 + X"00", -- 0x37 + X"00", -- 0x38 + X"00", -- 0x39 + X"00", -- 0x3A + X"00", -- 0x3B + X"00", -- 0x3C + X"00", -- 0x3D + X"00", -- 0x3E + X"00", -- 0x3F + X"00", -- 0x40 + X"00", -- 0x41 + X"00", -- 0x42 + X"00", -- 0x43 + X"00", -- 0x44 + X"00", -- 0x45 + X"00", -- 0x46 + X"00", -- 0x47 + X"00", -- 0x48 + X"00", -- 0x49 + X"00", -- 0x4A + X"00", -- 0x4B + X"00", -- 0x4C + X"00", -- 0x4D + X"00", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +end counter; + diff --git a/projects/cpu/src/systest/counter_xrom_ld.vhdl b/projects/cpu/src/systest/counter_xrom_ld.vhdl new file mode 100644 index 0000000..d59488d --- /dev/null +++ b/projects/cpu/src/systest/counter_xrom_ld.vhdl @@ -0,0 +1,414 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + +END xrom; + +ARCHITECTURE loadable OF xrom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from counter.jsm + type xmem_rom_t is array (0 to 255) of dmem_data_t; + signal xmem_rom : xmem_rom_t := + ( + X"4A", -- 0x00 + X"2D", -- 0x01 + X"43", -- 0x02 + X"50", -- 0x03 + X"55", -- 0x04 + X"20", -- 0x05 + X"56", -- 0x06 + X"31", -- 0x07 + X"2E", -- 0x08 + X"00", -- 0x09 + X"00", -- 0x0A + X"00", -- 0x0B + X"00", -- 0x0C + X"00", -- 0x0D + X"00", -- 0x0E + X"00", -- 0x0F + X"00", -- 0x10 + X"00", -- 0x11 + X"00", -- 0x12 + X"00", -- 0x13 + X"00", -- 0x14 + X"00", -- 0x15 + X"00", -- 0x16 + X"00", -- 0x17 + X"00", -- 0x18 + X"00", -- 0x19 + X"00", -- 0x1A + X"00", -- 0x1B + X"00", -- 0x1C + X"00", -- 0x1D + X"00", -- 0x1E + X"00", -- 0x1F + X"00", -- 0x20 + X"00", -- 0x21 + X"00", -- 0x22 + X"00", -- 0x23 + X"00", -- 0x24 + X"00", -- 0x25 + X"00", -- 0x26 + X"00", -- 0x27 + X"00", -- 0x28 + X"00", -- 0x29 + X"00", -- 0x2A + X"00", -- 0x2B + X"00", -- 0x2C + X"00", -- 0x2D + X"00", -- 0x2E + X"00", -- 0x2F + X"00", -- 0x30 + X"00", -- 0x31 + X"00", -- 0x32 + X"00", -- 0x33 + X"00", -- 0x34 + X"00", -- 0x35 + X"00", -- 0x36 + X"00", -- 0x37 + X"00", -- 0x38 + X"00", -- 0x39 + X"00", -- 0x3A + X"00", -- 0x3B + X"00", -- 0x3C + X"00", -- 0x3D + X"00", -- 0x3E + X"00", -- 0x3F + X"00", -- 0x40 + X"00", -- 0x41 + X"00", -- 0x42 + X"00", -- 0x43 + X"00", -- 0x44 + X"00", -- 0x45 + X"00", -- 0x46 + X"00", -- 0x47 + X"00", -- 0x48 + X"00", -- 0x49 + X"00", -- 0x4A + X"00", -- 0x4B + X"00", -- 0x4C + X"00", -- 0x4D + X"00", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : dmem_addr_t; + signal jtag_ld_dout : dmem_data_t; + signal jtag_ld_din : dmem_data_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (15 downto 0); + constant id : unsigned (15 downto 0) := X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); + jtag_ld_din <= user_regi(dmem_data_t'left downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/cpu_embedded.vhd b/projects/cpu/src/systest/cpu_embedded.vhd new file mode 100644 index 0000000..03bed0b --- /dev/null +++ b/projects/cpu/src/systest/cpu_embedded.vhd @@ -0,0 +1,107 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: cpu_embedded using cpu_core and rom + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; +use IEEE.numeric_std.ALL; + +use work.cpu_pkg.all; + +entity cpu_embedded is + Port ( + rst : in STD_LOGIC; + clk : in STD_LOGIC; + ce : in STD_LOGIC; + int_in : in STD_LOGIC; + int_ack : out STD_LOGIC; + xmem_we : out STD_LOGIC; + xmem_re : out STD_LOGIC; + xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_addr : out unsigned (DMEM_ADDR_WIDTH-1 downto 0); + io_sel : out STD_LOGIC + ); +end cpu_embedded; + +architecture rtl of cpu_embedded is + + signal rom_data : unsigned (IMEM_DATA_WIDTH-1 downto 0); + signal rom_addr : unsigned (IMEM_ADDR_WIDTH-1 downto 0); + + COMPONENT cpu + Port ( + rst : in STD_LOGIC; + clk : in STD_LOGIC; + ce : in STD_LOGIC; + int_in : in STD_LOGIC; + int_ack : out STD_LOGIC; + xmem_we : out STD_LOGIC; + xmem_re : out STD_LOGIC; + instr_din : in unsigned (IMEM_DATA_WIDTH-1 downto 0); + instr_addr : out unsigned (IMEM_ADDR_WIDTH-1 downto 0); + xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_addr : out unsigned (DMEM_DATA_WIDTH-1 downto 0); + io_sel : out STD_LOGIC + ); + END COMPONENT; + + + COMPONENT irom + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + END COMPONENT; + +begin + +inst_cpu: cpu + PORT MAP( + rst => rst, + clk => clk, + ce => ce, + int_in => int_in, + int_ack => int_ack, + xmem_we => xmem_we, + xmem_re => xmem_re, + instr_din => rom_data, + instr_addr => rom_addr, + xmem_din => xmem_din, + xmem_dout => xmem_dout, + xmem_addr => xmem_addr, + io_sel => io_sel + ); + +inst_irom: irom + PORT MAP( + clk => clk, + ce => ce, + addr => rom_addr, + dout => rom_data + ); + +end rtl; diff --git a/projects/cpu/src/systest/sdr_test_irom.vhdl b/projects/cpu/src/systest/sdr_test_irom.vhdl new file mode 100644 index 0000000..04b0f9c --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_irom.vhdl @@ -0,0 +1,405 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); +END irom; + +ARCHITECTURE sdr_test OF irom IS + + type imem_rom_t is array (0 to 342) of inst_t; + + -- Assembled from sdr_test.jsm + constant imem_rom : imem_rom_t := + ( + "110000" & X"002", -- 0x000: JMP 0x002 + "111111" & X"000", -- 0x001: RETI + "111011" & X"0B1", -- 0x002: CALL 0x0B1 + "000011" & X"000", -- 0x003: MOV R00, 0x00 + "100100" & X"010", -- 0x004: XOUT (0x01), R00 + "000011" & X"010", -- 0x005: MOV R00, 0x01 + "111011" & X"0CE", -- 0x006: CALL 0x0CE + "101000" & X"070", -- 0x007: XIN R00, (0x07) + "100100" & X"010", -- 0x008: XOUT (0x01), R00 + "011001" & X"800", -- 0x009: AND R00, 0x80 + "110010" & X"007", -- 0x00A: JNZ 0x007 + "000011" & X"001", -- 0x00B: MOV R01, 0x00 + "111011" & X"0D3", -- 0x00C: CALL 0x0D3 + "101000" & X"040", -- 0x00D: XIN R00, (0x04) + "011011" & X"100", -- 0x00E: OR R00, 0x10 + "100100" & X"040", -- 0x00F: XOUT (0x04), R00 + "111011" & X"129", -- 0x010: CALL 0x129 + "011011" & X"200", -- 0x011: OR R00, 0x20 + "100100" & X"040", -- 0x012: XOUT (0x04), R00 + "111011" & X"129", -- 0x013: CALL 0x129 + "011001" & X"EF0", -- 0x014: AND R00, 0xEF + "100100" & X"040", -- 0x015: XOUT (0x04), R00 + "111011" & X"129", -- 0x016: CALL 0x129 + "011001" & X"CF0", -- 0x017: AND R00, 0xCF + "100100" & X"040", -- 0x018: XOUT (0x04), R00 + "110000" & X"01A", -- 0x019: JMP 0x01A + "000011" & X"010", -- 0x01A: MOV R00, 0x01 + "111011" & X"0CE", -- 0x01B: CALL 0x0CE + "000011" & X"0B1", -- 0x01C: MOV R01, 0x0B + "111011" & X"0D3", -- 0x01D: CALL 0x0D3 + "111011" & X"07F", -- 0x01E: CALL 0x07F + "000011" & X"800", -- 0x01F: MOV R00, 0x80 + "000011" & X"08F", -- 0x020: MOV R15, 0x08 + "000111" & X"000", -- 0x021: MOVX (R00), 0x00 + "010001" & X"010", -- 0x022: INC R00 + "010101" & X"01F", -- 0x023: DEC R15 + "110010" & X"021", -- 0x024: JNZ 0x021 + "101000" & X"0A0", -- 0x025: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x026: CMP R00, 0xFF + "111001" & X"031", -- 0x027: JEQ 0x031 + "101000" & X"070", -- 0x028: XIN R00, (0x07) + "100100" & X"010", -- 0x029: XOUT (0x01), R00 + "011001" & X"020", -- 0x02A: AND R00, 0x02 + "110010" & X"028", -- 0x02B: JNZ 0x028 + "000011" & X"070", -- 0x02C: MOV R00, 0x07 + "100101" & X"020", -- 0x02D: XOUT (R00), 0x02 + "000011" & X"020", -- 0x02E: MOV R00, 0x02 + "111011" & X"086", -- 0x02F: CALL 0x086 + "110000" & X"025", -- 0x030: JMP 0x025 + "111011" & X"096", -- 0x031: CALL 0x096 + "111011" & X"122", -- 0x032: CALL 0x122 + "000011" & X"010", -- 0x033: MOV R00, 0x01 + "111011" & X"0CE", -- 0x034: CALL 0x0CE + "000011" & X"1A1", -- 0x035: MOV R01, 0x1A + "111011" & X"0D3", -- 0x036: CALL 0x0D3 + "111011" & X"07F", -- 0x037: CALL 0x07F + "000011" & X"000", -- 0x038: MOV R00, 0x00 + "001101" & X"000", -- 0x039: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x03A: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x03B: CMP R00, 0xFF + "111001" & X"051", -- 0x03C: JEQ 0x051 + "001010" & X"001", -- 0x03D: MOVC R01, (0x00) + "000011" & X"800", -- 0x03E: MOV R00, 0x80 + "000011" & X"08F", -- 0x03F: MOV R15, 0x08 + "000110" & X"001", -- 0x040: MOVX (R01), R00 + "010001" & X"010", -- 0x041: INC R00 + "010001" & X"011", -- 0x042: INC R01 + "010101" & X"01F", -- 0x043: DEC R15 + "110010" & X"040", -- 0x044: JNZ 0x040 + "101000" & X"070", -- 0x045: XIN R00, (0x07) + "100100" & X"010", -- 0x046: XOUT (0x01), R00 + "011001" & X"020", -- 0x047: AND R00, 0x02 + "110010" & X"045", -- 0x048: JNZ 0x045 + "000011" & X"070", -- 0x049: MOV R00, 0x07 + "100101" & X"020", -- 0x04A: XOUT (R00), 0x02 + "000011" & X"020", -- 0x04B: MOV R00, 0x02 + "111011" & X"086", -- 0x04C: CALL 0x086 + "001010" & X"000", -- 0x04D: MOVC R00, (0x00) + "010001" & X"010", -- 0x04E: INC R00 + "001101" & X"000", -- 0x04F: MOVC (0x00), R00 + "110000" & X"03A", -- 0x050: JMP 0x03A + "111011" & X"096", -- 0x051: CALL 0x096 + "111011" & X"122", -- 0x052: CALL 0x122 + "000011" & X"010", -- 0x053: MOV R00, 0x01 + "111011" & X"0CE", -- 0x054: CALL 0x0CE + "000011" & X"281", -- 0x055: MOV R01, 0x28 + "111011" & X"0D3", -- 0x056: CALL 0x0D3 + "111011" & X"07F", -- 0x057: CALL 0x07F + "000011" & X"000", -- 0x058: MOV R00, 0x00 + "001101" & X"000", -- 0x059: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x05A: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x05B: CMP R00, 0xFF + "111001" & X"073", -- 0x05C: JEQ 0x073 + "000011" & X"070", -- 0x05D: MOV R00, 0x07 + "100101" & X"010", -- 0x05E: XOUT (R00), 0x01 + "101000" & X"070", -- 0x05F: XIN R00, (0x07) + "100100" & X"010", -- 0x060: XOUT (0x01), R00 + "011001" & X"010", -- 0x061: AND R00, 0x01 + "110010" & X"05F", -- 0x062: JNZ 0x05F + "001010" & X"001", -- 0x063: MOVC R01, (0x00) + "000011" & X"800", -- 0x064: MOV R00, 0x80 + "000011" & X"08F", -- 0x065: MOV R15, 0x08 + "000100" & X"002", -- 0x066: MOVX R02, (R00) + "001110" & X"012", -- 0x067: CMP R02, R01 + "111010" & X"078", -- 0x068: JNE 0x078 + "010001" & X"010", -- 0x069: INC R00 + "010001" & X"011", -- 0x06A: INC R01 + "010101" & X"01F", -- 0x06B: DEC R15 + "110010" & X"066", -- 0x06C: JNZ 0x066 + "000011" & X"020", -- 0x06D: MOV R00, 0x02 + "111011" & X"086", -- 0x06E: CALL 0x086 + "001010" & X"000", -- 0x06F: MOVC R00, (0x00) + "010001" & X"010", -- 0x070: INC R00 + "001101" & X"000", -- 0x071: MOVC (0x00), R00 + "110000" & X"05A", -- 0x072: JMP 0x05A + "000011" & X"C00", -- 0x073: MOV R00, 0xC0 + "111011" & X"0CE", -- 0x074: CALL 0x0CE + "000011" & X"361", -- 0x075: MOV R01, 0x36 + "111011" & X"0D3", -- 0x076: CALL 0x0D3 + "110000" & X"07D", -- 0x077: JMP 0x07D + "000011" & X"C00", -- 0x078: MOV R00, 0xC0 + "111011" & X"0CE", -- 0x079: CALL 0x0CE + "000011" & X"401", -- 0x07A: MOV R01, 0x40 + "111011" & X"0D3", -- 0x07B: CALL 0x0D3 + "110000" & X"07D", -- 0x07C: JMP 0x07D + "111011" & X"122", -- 0x07D: CALL 0x122 + "110000" & X"01A", -- 0x07E: JMP 0x01A + "111100" & X"000", -- 0x07F: PUSH R00 + "000011" & X"000", -- 0x080: MOV R00, 0x00 + "100100" & X"080", -- 0x081: XOUT (0x08), R00 + "100100" & X"090", -- 0x082: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x083: XOUT (0x0A), R00 + "111101" & X"000", -- 0x084: POP R00 + "111110" & X"000", -- 0x085: RET + "111100" & X"001", -- 0x086: PUSH R01 + "111100" & X"002", -- 0x087: PUSH R02 + "111100" & X"003", -- 0x088: PUSH R03 + "101000" & X"081", -- 0x089: XIN R01, (0x08) + "101000" & X"092", -- 0x08A: XIN R02, (0x09) + "101000" & X"0A3", -- 0x08B: XIN R03, (0x0A) + "010000" & X"001", -- 0x08C: ADD R01, R00 + "010011" & X"002", -- 0x08D: ADDC R02, 0x00 + "010011" & X"003", -- 0x08E: ADDC R03, 0x00 + "100100" & X"081", -- 0x08F: XOUT (0x08), R01 + "100100" & X"092", -- 0x090: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x091: XOUT (0x0A), R03 + "111101" & X"003", -- 0x092: POP R03 + "111101" & X"002", -- 0x093: POP R02 + "111101" & X"001", -- 0x094: POP R01 + "111110" & X"000", -- 0x095: RET + "000011" & X"C00", -- 0x096: MOV R00, 0xC0 + "111011" & X"0CE", -- 0x097: CALL 0x0CE + "101000" & X"0A0", -- 0x098: XIN R00, (0x0A) + "111011" & X"09F", -- 0x099: CALL 0x09F + "101000" & X"090", -- 0x09A: XIN R00, (0x09) + "111011" & X"09F", -- 0x09B: CALL 0x09F + "101000" & X"080", -- 0x09C: XIN R00, (0x08) + "111011" & X"09F", -- 0x09D: CALL 0x09F + "111110" & X"000", -- 0x09E: RET + "111011" & X"0AA", -- 0x09F: CALL 0x0AA + "111011" & X"0E5", -- 0x0A0: CALL 0x0E5 + "000010" & X"010", -- 0x0A1: MOV R00, R01 + "111011" & X"0E5", -- 0x0A2: CALL 0x0E5 + "111110" & X"000", -- 0x0A3: RET + "011001" & X"0F0", -- 0x0A4: AND R00, 0x0F + "001111" & X"0A0", -- 0x0A5: CMP R00, 0x0A + "110101" & X"0A8", -- 0x0A6: JLT 0x0A8 + "010001" & X"070", -- 0x0A7: ADD R00, 0x07 + "010001" & X"300", -- 0x0A8: ADD R00, 0x30 + "111110" & X"000", -- 0x0A9: RET + "111100" & X"000", -- 0x0AA: PUSH R00 + "111011" & X"0A4", -- 0x0AB: CALL 0x0A4 + "000010" & X"001", -- 0x0AC: MOV R01, R00 + "111101" & X"000", -- 0x0AD: POP R00 + "101010" & X"000", -- 0x0AE: SWAP R00 + "111011" & X"0A4", -- 0x0AF: CALL 0x0A4 + "111110" & X"000", -- 0x0B0: RET + "000011" & X"002", -- 0x0B1: MOV R02, 0x00 + "000011" & X"030", -- 0x0B2: MOV R00, 0x03 + "111011" & X"0FD", -- 0x0B3: CALL 0x0FD + "111011" & X"130", -- 0x0B4: CALL 0x130 + "000011" & X"002", -- 0x0B5: MOV R02, 0x00 + "000011" & X"030", -- 0x0B6: MOV R00, 0x03 + "111011" & X"0FD", -- 0x0B7: CALL 0x0FD + "111011" & X"130", -- 0x0B8: CALL 0x130 + "000011" & X"002", -- 0x0B9: MOV R02, 0x00 + "000011" & X"020", -- 0x0BA: MOV R00, 0x02 + "111011" & X"0FD", -- 0x0BB: CALL 0x0FD + "111011" & X"137", -- 0x0BC: CALL 0x137 + "000011" & X"280", -- 0x0BD: MOV R00, 0x28 + "111011" & X"0CE", -- 0x0BE: CALL 0x0CE + "000011" & X"0C0", -- 0x0BF: MOV R00, 0x0C + "111011" & X"0CE", -- 0x0C0: CALL 0x0CE + "000011" & X"060", -- 0x0C1: MOV R00, 0x06 + "111011" & X"0CE", -- 0x0C2: CALL 0x0CE + "000011" & X"010", -- 0x0C3: MOV R00, 0x01 + "111011" & X"0CE", -- 0x0C4: CALL 0x0CE + "111110" & X"000", -- 0x0C5: RET + "111100" & X"000", -- 0x0C6: PUSH R00 + "111011" & X"0F1", -- 0x0C7: CALL 0x0F1 + "011001" & X"800", -- 0x0C8: AND R00, 0x80 + "110001" & X"0CC", -- 0x0C9: JZ 0x0CC + "111011" & X"14E", -- 0x0CA: CALL 0x14E + "110000" & X"0C7", -- 0x0CB: JMP 0x0C7 + "111101" & X"000", -- 0x0CC: POP R00 + "111110" & X"000", -- 0x0CD: RET + "111100" & X"002", -- 0x0CE: PUSH R02 + "000011" & X"002", -- 0x0CF: MOV R02, 0x00 + "111011" & X"0EA", -- 0x0D0: CALL 0x0EA + "111101" & X"002", -- 0x0D1: POP R02 + "111110" & X"000", -- 0x0D2: RET + "111100" & X"000", -- 0x0D3: PUSH R00 + "000100" & X"010", -- 0x0D4: MOVX R00, (R01) + "010001" & X"011", -- 0x0D5: INC R01 + "001111" & X"000", -- 0x0D6: TST R00 + "110001" & X"0DA", -- 0x0D7: JZ 0x0DA + "111011" & X"0E5", -- 0x0D8: CALL 0x0E5 + "110000" & X"0D4", -- 0x0D9: JMP 0x0D4 + "111101" & X"000", -- 0x0DA: POP R00 + "111110" & X"000", -- 0x0DB: RET + "111100" & X"000", -- 0x0DC: PUSH R00 + "001001" & X"010", -- 0x0DD: MOVC R00, (R01) + "010001" & X"011", -- 0x0DE: INC R01 + "001111" & X"000", -- 0x0DF: TST R00 + "110001" & X"0E3", -- 0x0E0: JZ 0x0E3 + "111011" & X"0E5", -- 0x0E1: CALL 0x0E5 + "110000" & X"0DD", -- 0x0E2: JMP 0x0DD + "111101" & X"000", -- 0x0E3: POP R00 + "111110" & X"000", -- 0x0E4: RET + "111100" & X"002", -- 0x0E5: PUSH R02 + "000011" & X"402", -- 0x0E6: MOV R02, 0x40 + "111011" & X"0EA", -- 0x0E7: CALL 0x0EA + "111101" & X"002", -- 0x0E8: POP R02 + "111110" & X"000", -- 0x0E9: RET + "111011" & X"0C6", -- 0x0EA: CALL 0x0C6 + "111100" & X"000", -- 0x0EB: PUSH R00 + "101010" & X"000", -- 0x0EC: SWAP R00 + "111011" & X"0FD", -- 0x0ED: CALL 0x0FD + "111101" & X"000", -- 0x0EE: POP R00 + "111011" & X"0FD", -- 0x0EF: CALL 0x0FD + "111110" & X"000", -- 0x0F0: RET + "111100" & X"002", -- 0x0F1: PUSH R02 + "000011" & X"002", -- 0x0F2: MOV R02, 0x00 + "111011" & X"0F6", -- 0x0F3: CALL 0x0F6 + "111101" & X"002", -- 0x0F4: POP R02 + "111110" & X"000", -- 0x0F5: RET + "111011" & X"110", -- 0x0F6: CALL 0x110 + "101010" & X"000", -- 0x0F7: SWAP R00 + "111100" & X"000", -- 0x0F8: PUSH R00 + "111011" & X"110", -- 0x0F9: CALL 0x110 + "111101" & X"002", -- 0x0FA: POP R02 + "011010" & X"020", -- 0x0FB: OR R00, R02 + "111110" & X"000", -- 0x0FC: RET + "111100" & X"001", -- 0x0FD: PUSH R01 + "011001" & X"0F0", -- 0x0FE: AND R00, 0x0F + "000010" & X"001", -- 0x0FF: MOV R01, R00 + "011010" & X"021", -- 0x100: OR R01, R02 + "100100" & X"031", -- 0x101: XOUT (0x03), R01 + "111011" & X"14E", -- 0x102: CALL 0x14E + "000010" & X"001", -- 0x103: MOV R01, R00 + "011010" & X"021", -- 0x104: OR R01, R02 + "011011" & X"801", -- 0x105: OR R01, 0x80 + "100100" & X"031", -- 0x106: XOUT (0x03), R01 + "111011" & X"14E", -- 0x107: CALL 0x14E + "000010" & X"001", -- 0x108: MOV R01, R00 + "011010" & X"021", -- 0x109: OR R01, R02 + "100100" & X"031", -- 0x10A: XOUT (0x03), R01 + "111011" & X"14E", -- 0x10B: CALL 0x14E + "011011" & X"201", -- 0x10C: OR R01, 0x20 + "100100" & X"031", -- 0x10D: XOUT (0x03), R01 + "111101" & X"001", -- 0x10E: POP R01 + "111110" & X"000", -- 0x10F: RET + "111100" & X"001", -- 0x110: PUSH R01 + "000011" & X"201", -- 0x111: MOV R01, 0x20 + "011010" & X"021", -- 0x112: OR R01, R02 + "100100" & X"031", -- 0x113: XOUT (0x03), R01 + "111011" & X"14E", -- 0x114: CALL 0x14E + "000011" & X"201", -- 0x115: MOV R01, 0x20 + "011010" & X"021", -- 0x116: OR R01, R02 + "011011" & X"801", -- 0x117: OR R01, 0x80 + "100100" & X"031", -- 0x118: XOUT (0x03), R01 + "111011" & X"14E", -- 0x119: CALL 0x14E + "101000" & X"030", -- 0x11A: XIN R00, (0x03) + "011001" & X"0F0", -- 0x11B: AND R00, 0x0F + "000011" & X"201", -- 0x11C: MOV R01, 0x20 + "011010" & X"021", -- 0x11D: OR R01, R02 + "100100" & X"031", -- 0x11E: XOUT (0x03), R01 + "111011" & X"14E", -- 0x11F: CALL 0x14E + "111101" & X"001", -- 0x120: POP R01 + "111110" & X"000", -- 0x121: RET + "111100" & X"00F", -- 0x122: PUSH R15 + "000011" & X"0AF", -- 0x123: MOV R15, 0x0A + "111011" & X"129", -- 0x124: CALL 0x129 + "010101" & X"01F", -- 0x125: DEC R15 + "110010" & X"124", -- 0x126: JNZ 0x124 + "111101" & X"00F", -- 0x127: POP R15 + "111110" & X"000", -- 0x128: RET + "111100" & X"00F", -- 0x129: PUSH R15 + "000011" & X"0AF", -- 0x12A: MOV R15, 0x0A + "111011" & X"130", -- 0x12B: CALL 0x130 + "010101" & X"01F", -- 0x12C: DEC R15 + "110010" & X"12B", -- 0x12D: JNZ 0x12B + "111101" & X"00F", -- 0x12E: POP R15 + "111110" & X"000", -- 0x12F: RET + "111100" & X"00F", -- 0x130: PUSH R15 + "000011" & X"0AF", -- 0x131: MOV R15, 0x0A + "111011" & X"137", -- 0x132: CALL 0x137 + "010101" & X"01F", -- 0x133: DEC R15 + "110010" & X"132", -- 0x134: JNZ 0x132 + "111101" & X"00F", -- 0x135: POP R15 + "111110" & X"000", -- 0x136: RET + "111100" & X"00F", -- 0x137: PUSH R15 + "000011" & X"0AF", -- 0x138: MOV R15, 0x0A + "111011" & X"13E", -- 0x139: CALL 0x13E + "010101" & X"01F", -- 0x13A: DEC R15 + "110010" & X"139", -- 0x13B: JNZ 0x139 + "111101" & X"00F", -- 0x13C: POP R15 + "111110" & X"000", -- 0x13D: RET + "111100" & X"00F", -- 0x13E: PUSH R15 + "000011" & X"0AF", -- 0x13F: MOV R15, 0x0A + "111011" & X"145", -- 0x140: CALL 0x145 + "010101" & X"01F", -- 0x141: DEC R15 + "110010" & X"140", -- 0x142: JNZ 0x140 + "111101" & X"00F", -- 0x143: POP R15 + "111110" & X"000", -- 0x144: RET + "111100" & X"00F", -- 0x145: PUSH R15 + "000011" & X"63F", -- 0x146: MOV R15, 0x63 + "000000" & X"000", -- 0x147: NOP + "000000" & X"000", -- 0x148: NOP + "000000" & X"000", -- 0x149: NOP + "010101" & X"01F", -- 0x14A: DEC R15 + "110010" & X"147", -- 0x14B: JNZ 0x147 + "111101" & X"00F", -- 0x14C: POP R15 + "111110" & X"000", -- 0x14D: RET + "111100" & X"00F", -- 0x14E: PUSH R15 + "000011" & X"09F", -- 0x14F: MOV R15, 0x09 + "000000" & X"000", -- 0x150: NOP + "000000" & X"000", -- 0x151: NOP + "000000" & X"000", -- 0x152: NOP + "010101" & X"01F", -- 0x153: DEC R15 + "110010" & X"150", -- 0x154: JNZ 0x150 + "111101" & X"00F", -- 0x155: POP R15 + "111110" & X"000" -- 0x156: RET + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +end sdr_test; + diff --git a/projects/cpu/src/systest/sdr_test_irom_ld.vhdl b/projects/cpu/src/systest/sdr_test_irom_ld.vhdl new file mode 100644 index 0000000..4c5aa99 --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_irom_ld.vhdl @@ -0,0 +1,1182 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + +END irom; + +ARCHITECTURE loadable OF irom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdr_test.jsm + type imem_rom_t is array (0 to 1023) of inst_t; + signal imem_rom : imem_rom_t := + ( + "110000" & X"002", -- 0x000: JMP 0x002 + "111111" & X"000", -- 0x001: RETI + "111011" & X"0B1", -- 0x002: CALL 0x0B1 + "000011" & X"000", -- 0x003: MOV R00, 0x00 + "100100" & X"010", -- 0x004: XOUT (0x01), R00 + "000011" & X"010", -- 0x005: MOV R00, 0x01 + "111011" & X"0CE", -- 0x006: CALL 0x0CE + "101000" & X"070", -- 0x007: XIN R00, (0x07) + "100100" & X"010", -- 0x008: XOUT (0x01), R00 + "011001" & X"800", -- 0x009: AND R00, 0x80 + "110010" & X"007", -- 0x00A: JNZ 0x007 + "000011" & X"001", -- 0x00B: MOV R01, 0x00 + "111011" & X"0D3", -- 0x00C: CALL 0x0D3 + "101000" & X"040", -- 0x00D: XIN R00, (0x04) + "011011" & X"100", -- 0x00E: OR R00, 0x10 + "100100" & X"040", -- 0x00F: XOUT (0x04), R00 + "111011" & X"129", -- 0x010: CALL 0x129 + "011011" & X"200", -- 0x011: OR R00, 0x20 + "100100" & X"040", -- 0x012: XOUT (0x04), R00 + "111011" & X"129", -- 0x013: CALL 0x129 + "011001" & X"EF0", -- 0x014: AND R00, 0xEF + "100100" & X"040", -- 0x015: XOUT (0x04), R00 + "111011" & X"129", -- 0x016: CALL 0x129 + "011001" & X"CF0", -- 0x017: AND R00, 0xCF + "100100" & X"040", -- 0x018: XOUT (0x04), R00 + "110000" & X"01A", -- 0x019: JMP 0x01A + "000011" & X"010", -- 0x01A: MOV R00, 0x01 + "111011" & X"0CE", -- 0x01B: CALL 0x0CE + "000011" & X"0B1", -- 0x01C: MOV R01, 0x0B + "111011" & X"0D3", -- 0x01D: CALL 0x0D3 + "111011" & X"07F", -- 0x01E: CALL 0x07F + "000011" & X"800", -- 0x01F: MOV R00, 0x80 + "000011" & X"08F", -- 0x020: MOV R15, 0x08 + "000111" & X"000", -- 0x021: MOVX (R00), 0x00 + "010001" & X"010", -- 0x022: INC R00 + "010101" & X"01F", -- 0x023: DEC R15 + "110010" & X"021", -- 0x024: JNZ 0x021 + "101000" & X"0A0", -- 0x025: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x026: CMP R00, 0xFF + "111001" & X"031", -- 0x027: JEQ 0x031 + "101000" & X"070", -- 0x028: XIN R00, (0x07) + "100100" & X"010", -- 0x029: XOUT (0x01), R00 + "011001" & X"020", -- 0x02A: AND R00, 0x02 + "110010" & X"028", -- 0x02B: JNZ 0x028 + "000011" & X"070", -- 0x02C: MOV R00, 0x07 + "100101" & X"020", -- 0x02D: XOUT (R00), 0x02 + "000011" & X"020", -- 0x02E: MOV R00, 0x02 + "111011" & X"086", -- 0x02F: CALL 0x086 + "110000" & X"025", -- 0x030: JMP 0x025 + "111011" & X"096", -- 0x031: CALL 0x096 + "111011" & X"122", -- 0x032: CALL 0x122 + "000011" & X"010", -- 0x033: MOV R00, 0x01 + "111011" & X"0CE", -- 0x034: CALL 0x0CE + "000011" & X"1A1", -- 0x035: MOV R01, 0x1A + "111011" & X"0D3", -- 0x036: CALL 0x0D3 + "111011" & X"07F", -- 0x037: CALL 0x07F + "000011" & X"000", -- 0x038: MOV R00, 0x00 + "001101" & X"000", -- 0x039: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x03A: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x03B: CMP R00, 0xFF + "111001" & X"051", -- 0x03C: JEQ 0x051 + "001010" & X"001", -- 0x03D: MOVC R01, (0x00) + "000011" & X"800", -- 0x03E: MOV R00, 0x80 + "000011" & X"08F", -- 0x03F: MOV R15, 0x08 + "000110" & X"001", -- 0x040: MOVX (R01), R00 + "010001" & X"010", -- 0x041: INC R00 + "010001" & X"011", -- 0x042: INC R01 + "010101" & X"01F", -- 0x043: DEC R15 + "110010" & X"040", -- 0x044: JNZ 0x040 + "101000" & X"070", -- 0x045: XIN R00, (0x07) + "100100" & X"010", -- 0x046: XOUT (0x01), R00 + "011001" & X"020", -- 0x047: AND R00, 0x02 + "110010" & X"045", -- 0x048: JNZ 0x045 + "000011" & X"070", -- 0x049: MOV R00, 0x07 + "100101" & X"020", -- 0x04A: XOUT (R00), 0x02 + "000011" & X"020", -- 0x04B: MOV R00, 0x02 + "111011" & X"086", -- 0x04C: CALL 0x086 + "001010" & X"000", -- 0x04D: MOVC R00, (0x00) + "010001" & X"010", -- 0x04E: INC R00 + "001101" & X"000", -- 0x04F: MOVC (0x00), R00 + "110000" & X"03A", -- 0x050: JMP 0x03A + "111011" & X"096", -- 0x051: CALL 0x096 + "111011" & X"122", -- 0x052: CALL 0x122 + "000011" & X"010", -- 0x053: MOV R00, 0x01 + "111011" & X"0CE", -- 0x054: CALL 0x0CE + "000011" & X"281", -- 0x055: MOV R01, 0x28 + "111011" & X"0D3", -- 0x056: CALL 0x0D3 + "111011" & X"07F", -- 0x057: CALL 0x07F + "000011" & X"000", -- 0x058: MOV R00, 0x00 + "001101" & X"000", -- 0x059: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x05A: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x05B: CMP R00, 0xFF + "111001" & X"073", -- 0x05C: JEQ 0x073 + "000011" & X"070", -- 0x05D: MOV R00, 0x07 + "100101" & X"010", -- 0x05E: XOUT (R00), 0x01 + "101000" & X"070", -- 0x05F: XIN R00, (0x07) + "100100" & X"010", -- 0x060: XOUT (0x01), R00 + "011001" & X"010", -- 0x061: AND R00, 0x01 + "110010" & X"05F", -- 0x062: JNZ 0x05F + "001010" & X"001", -- 0x063: MOVC R01, (0x00) + "000011" & X"800", -- 0x064: MOV R00, 0x80 + "000011" & X"08F", -- 0x065: MOV R15, 0x08 + "000100" & X"002", -- 0x066: MOVX R02, (R00) + "001110" & X"012", -- 0x067: CMP R02, R01 + "111010" & X"078", -- 0x068: JNE 0x078 + "010001" & X"010", -- 0x069: INC R00 + "010001" & X"011", -- 0x06A: INC R01 + "010101" & X"01F", -- 0x06B: DEC R15 + "110010" & X"066", -- 0x06C: JNZ 0x066 + "000011" & X"020", -- 0x06D: MOV R00, 0x02 + "111011" & X"086", -- 0x06E: CALL 0x086 + "001010" & X"000", -- 0x06F: MOVC R00, (0x00) + "010001" & X"010", -- 0x070: INC R00 + "001101" & X"000", -- 0x071: MOVC (0x00), R00 + "110000" & X"05A", -- 0x072: JMP 0x05A + "000011" & X"C00", -- 0x073: MOV R00, 0xC0 + "111011" & X"0CE", -- 0x074: CALL 0x0CE + "000011" & X"361", -- 0x075: MOV R01, 0x36 + "111011" & X"0D3", -- 0x076: CALL 0x0D3 + "110000" & X"07D", -- 0x077: JMP 0x07D + "000011" & X"C00", -- 0x078: MOV R00, 0xC0 + "111011" & X"0CE", -- 0x079: CALL 0x0CE + "000011" & X"401", -- 0x07A: MOV R01, 0x40 + "111011" & X"0D3", -- 0x07B: CALL 0x0D3 + "110000" & X"07D", -- 0x07C: JMP 0x07D + "111011" & X"122", -- 0x07D: CALL 0x122 + "110000" & X"01A", -- 0x07E: JMP 0x01A + "111100" & X"000", -- 0x07F: PUSH R00 + "000011" & X"000", -- 0x080: MOV R00, 0x00 + "100100" & X"080", -- 0x081: XOUT (0x08), R00 + "100100" & X"090", -- 0x082: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x083: XOUT (0x0A), R00 + "111101" & X"000", -- 0x084: POP R00 + "111110" & X"000", -- 0x085: RET + "111100" & X"001", -- 0x086: PUSH R01 + "111100" & X"002", -- 0x087: PUSH R02 + "111100" & X"003", -- 0x088: PUSH R03 + "101000" & X"081", -- 0x089: XIN R01, (0x08) + "101000" & X"092", -- 0x08A: XIN R02, (0x09) + "101000" & X"0A3", -- 0x08B: XIN R03, (0x0A) + "010000" & X"001", -- 0x08C: ADD R01, R00 + "010011" & X"002", -- 0x08D: ADDC R02, 0x00 + "010011" & X"003", -- 0x08E: ADDC R03, 0x00 + "100100" & X"081", -- 0x08F: XOUT (0x08), R01 + "100100" & X"092", -- 0x090: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x091: XOUT (0x0A), R03 + "111101" & X"003", -- 0x092: POP R03 + "111101" & X"002", -- 0x093: POP R02 + "111101" & X"001", -- 0x094: POP R01 + "111110" & X"000", -- 0x095: RET + "000011" & X"C00", -- 0x096: MOV R00, 0xC0 + "111011" & X"0CE", -- 0x097: CALL 0x0CE + "101000" & X"0A0", -- 0x098: XIN R00, (0x0A) + "111011" & X"09F", -- 0x099: CALL 0x09F + "101000" & X"090", -- 0x09A: XIN R00, (0x09) + "111011" & X"09F", -- 0x09B: CALL 0x09F + "101000" & X"080", -- 0x09C: XIN R00, (0x08) + "111011" & X"09F", -- 0x09D: CALL 0x09F + "111110" & X"000", -- 0x09E: RET + "111011" & X"0AA", -- 0x09F: CALL 0x0AA + "111011" & X"0E5", -- 0x0A0: CALL 0x0E5 + "000010" & X"010", -- 0x0A1: MOV R00, R01 + "111011" & X"0E5", -- 0x0A2: CALL 0x0E5 + "111110" & X"000", -- 0x0A3: RET + "011001" & X"0F0", -- 0x0A4: AND R00, 0x0F + "001111" & X"0A0", -- 0x0A5: CMP R00, 0x0A + "110101" & X"0A8", -- 0x0A6: JLT 0x0A8 + "010001" & X"070", -- 0x0A7: ADD R00, 0x07 + "010001" & X"300", -- 0x0A8: ADD R00, 0x30 + "111110" & X"000", -- 0x0A9: RET + "111100" & X"000", -- 0x0AA: PUSH R00 + "111011" & X"0A4", -- 0x0AB: CALL 0x0A4 + "000010" & X"001", -- 0x0AC: MOV R01, R00 + "111101" & X"000", -- 0x0AD: POP R00 + "101010" & X"000", -- 0x0AE: SWAP R00 + "111011" & X"0A4", -- 0x0AF: CALL 0x0A4 + "111110" & X"000", -- 0x0B0: RET + "000011" & X"002", -- 0x0B1: MOV R02, 0x00 + "000011" & X"030", -- 0x0B2: MOV R00, 0x03 + "111011" & X"0FD", -- 0x0B3: CALL 0x0FD + "111011" & X"130", -- 0x0B4: CALL 0x130 + "000011" & X"002", -- 0x0B5: MOV R02, 0x00 + "000011" & X"030", -- 0x0B6: MOV R00, 0x03 + "111011" & X"0FD", -- 0x0B7: CALL 0x0FD + "111011" & X"130", -- 0x0B8: CALL 0x130 + "000011" & X"002", -- 0x0B9: MOV R02, 0x00 + "000011" & X"020", -- 0x0BA: MOV R00, 0x02 + "111011" & X"0FD", -- 0x0BB: CALL 0x0FD + "111011" & X"137", -- 0x0BC: CALL 0x137 + "000011" & X"280", -- 0x0BD: MOV R00, 0x28 + "111011" & X"0CE", -- 0x0BE: CALL 0x0CE + "000011" & X"0C0", -- 0x0BF: MOV R00, 0x0C + "111011" & X"0CE", -- 0x0C0: CALL 0x0CE + "000011" & X"060", -- 0x0C1: MOV R00, 0x06 + "111011" & X"0CE", -- 0x0C2: CALL 0x0CE + "000011" & X"010", -- 0x0C3: MOV R00, 0x01 + "111011" & X"0CE", -- 0x0C4: CALL 0x0CE + "111110" & X"000", -- 0x0C5: RET + "111100" & X"000", -- 0x0C6: PUSH R00 + "111011" & X"0F1", -- 0x0C7: CALL 0x0F1 + "011001" & X"800", -- 0x0C8: AND R00, 0x80 + "110001" & X"0CC", -- 0x0C9: JZ 0x0CC + "111011" & X"14E", -- 0x0CA: CALL 0x14E + "110000" & X"0C7", -- 0x0CB: JMP 0x0C7 + "111101" & X"000", -- 0x0CC: POP R00 + "111110" & X"000", -- 0x0CD: RET + "111100" & X"002", -- 0x0CE: PUSH R02 + "000011" & X"002", -- 0x0CF: MOV R02, 0x00 + "111011" & X"0EA", -- 0x0D0: CALL 0x0EA + "111101" & X"002", -- 0x0D1: POP R02 + "111110" & X"000", -- 0x0D2: RET + "111100" & X"000", -- 0x0D3: PUSH R00 + "000100" & X"010", -- 0x0D4: MOVX R00, (R01) + "010001" & X"011", -- 0x0D5: INC R01 + "001111" & X"000", -- 0x0D6: TST R00 + "110001" & X"0DA", -- 0x0D7: JZ 0x0DA + "111011" & X"0E5", -- 0x0D8: CALL 0x0E5 + "110000" & X"0D4", -- 0x0D9: JMP 0x0D4 + "111101" & X"000", -- 0x0DA: POP R00 + "111110" & X"000", -- 0x0DB: RET + "111100" & X"000", -- 0x0DC: PUSH R00 + "001001" & X"010", -- 0x0DD: MOVC R00, (R01) + "010001" & X"011", -- 0x0DE: INC R01 + "001111" & X"000", -- 0x0DF: TST R00 + "110001" & X"0E3", -- 0x0E0: JZ 0x0E3 + "111011" & X"0E5", -- 0x0E1: CALL 0x0E5 + "110000" & X"0DD", -- 0x0E2: JMP 0x0DD + "111101" & X"000", -- 0x0E3: POP R00 + "111110" & X"000", -- 0x0E4: RET + "111100" & X"002", -- 0x0E5: PUSH R02 + "000011" & X"402", -- 0x0E6: MOV R02, 0x40 + "111011" & X"0EA", -- 0x0E7: CALL 0x0EA + "111101" & X"002", -- 0x0E8: POP R02 + "111110" & X"000", -- 0x0E9: RET + "111011" & X"0C6", -- 0x0EA: CALL 0x0C6 + "111100" & X"000", -- 0x0EB: PUSH R00 + "101010" & X"000", -- 0x0EC: SWAP R00 + "111011" & X"0FD", -- 0x0ED: CALL 0x0FD + "111101" & X"000", -- 0x0EE: POP R00 + "111011" & X"0FD", -- 0x0EF: CALL 0x0FD + "111110" & X"000", -- 0x0F0: RET + "111100" & X"002", -- 0x0F1: PUSH R02 + "000011" & X"002", -- 0x0F2: MOV R02, 0x00 + "111011" & X"0F6", -- 0x0F3: CALL 0x0F6 + "111101" & X"002", -- 0x0F4: POP R02 + "111110" & X"000", -- 0x0F5: RET + "111011" & X"110", -- 0x0F6: CALL 0x110 + "101010" & X"000", -- 0x0F7: SWAP R00 + "111100" & X"000", -- 0x0F8: PUSH R00 + "111011" & X"110", -- 0x0F9: CALL 0x110 + "111101" & X"002", -- 0x0FA: POP R02 + "011010" & X"020", -- 0x0FB: OR R00, R02 + "111110" & X"000", -- 0x0FC: RET + "111100" & X"001", -- 0x0FD: PUSH R01 + "011001" & X"0F0", -- 0x0FE: AND R00, 0x0F + "000010" & X"001", -- 0x0FF: MOV R01, R00 + "011010" & X"021", -- 0x100: OR R01, R02 + "100100" & X"031", -- 0x101: XOUT (0x03), R01 + "111011" & X"14E", -- 0x102: CALL 0x14E + "000010" & X"001", -- 0x103: MOV R01, R00 + "011010" & X"021", -- 0x104: OR R01, R02 + "011011" & X"801", -- 0x105: OR R01, 0x80 + "100100" & X"031", -- 0x106: XOUT (0x03), R01 + "111011" & X"14E", -- 0x107: CALL 0x14E + "000010" & X"001", -- 0x108: MOV R01, R00 + "011010" & X"021", -- 0x109: OR R01, R02 + "100100" & X"031", -- 0x10A: XOUT (0x03), R01 + "111011" & X"14E", -- 0x10B: CALL 0x14E + "011011" & X"201", -- 0x10C: OR R01, 0x20 + "100100" & X"031", -- 0x10D: XOUT (0x03), R01 + "111101" & X"001", -- 0x10E: POP R01 + "111110" & X"000", -- 0x10F: RET + "111100" & X"001", -- 0x110: PUSH R01 + "000011" & X"201", -- 0x111: MOV R01, 0x20 + "011010" & X"021", -- 0x112: OR R01, R02 + "100100" & X"031", -- 0x113: XOUT (0x03), R01 + "111011" & X"14E", -- 0x114: CALL 0x14E + "000011" & X"201", -- 0x115: MOV R01, 0x20 + "011010" & X"021", -- 0x116: OR R01, R02 + "011011" & X"801", -- 0x117: OR R01, 0x80 + "100100" & X"031", -- 0x118: XOUT (0x03), R01 + "111011" & X"14E", -- 0x119: CALL 0x14E + "101000" & X"030", -- 0x11A: XIN R00, (0x03) + "011001" & X"0F0", -- 0x11B: AND R00, 0x0F + "000011" & X"201", -- 0x11C: MOV R01, 0x20 + "011010" & X"021", -- 0x11D: OR R01, R02 + "100100" & X"031", -- 0x11E: XOUT (0x03), R01 + "111011" & X"14E", -- 0x11F: CALL 0x14E + "111101" & X"001", -- 0x120: POP R01 + "111110" & X"000", -- 0x121: RET + "111100" & X"00F", -- 0x122: PUSH R15 + "000011" & X"0AF", -- 0x123: MOV R15, 0x0A + "111011" & X"129", -- 0x124: CALL 0x129 + "010101" & X"01F", -- 0x125: DEC R15 + "110010" & X"124", -- 0x126: JNZ 0x124 + "111101" & X"00F", -- 0x127: POP R15 + "111110" & X"000", -- 0x128: RET + "111100" & X"00F", -- 0x129: PUSH R15 + "000011" & X"0AF", -- 0x12A: MOV R15, 0x0A + "111011" & X"130", -- 0x12B: CALL 0x130 + "010101" & X"01F", -- 0x12C: DEC R15 + "110010" & X"12B", -- 0x12D: JNZ 0x12B + "111101" & X"00F", -- 0x12E: POP R15 + "111110" & X"000", -- 0x12F: RET + "111100" & X"00F", -- 0x130: PUSH R15 + "000011" & X"0AF", -- 0x131: MOV R15, 0x0A + "111011" & X"137", -- 0x132: CALL 0x137 + "010101" & X"01F", -- 0x133: DEC R15 + "110010" & X"132", -- 0x134: JNZ 0x132 + "111101" & X"00F", -- 0x135: POP R15 + "111110" & X"000", -- 0x136: RET + "111100" & X"00F", -- 0x137: PUSH R15 + "000011" & X"0AF", -- 0x138: MOV R15, 0x0A + "111011" & X"13E", -- 0x139: CALL 0x13E + "010101" & X"01F", -- 0x13A: DEC R15 + "110010" & X"139", -- 0x13B: JNZ 0x139 + "111101" & X"00F", -- 0x13C: POP R15 + "111110" & X"000", -- 0x13D: RET + "111100" & X"00F", -- 0x13E: PUSH R15 + "000011" & X"0AF", -- 0x13F: MOV R15, 0x0A + "111011" & X"145", -- 0x140: CALL 0x145 + "010101" & X"01F", -- 0x141: DEC R15 + "110010" & X"140", -- 0x142: JNZ 0x140 + "111101" & X"00F", -- 0x143: POP R15 + "111110" & X"000", -- 0x144: RET + "111100" & X"00F", -- 0x145: PUSH R15 + "000011" & X"63F", -- 0x146: MOV R15, 0x63 + "000000" & X"000", -- 0x147: NOP + "000000" & X"000", -- 0x148: NOP + "000000" & X"000", -- 0x149: NOP + "010101" & X"01F", -- 0x14A: DEC R15 + "110010" & X"147", -- 0x14B: JNZ 0x147 + "111101" & X"00F", -- 0x14C: POP R15 + "111110" & X"000", -- 0x14D: RET + "111100" & X"00F", -- 0x14E: PUSH R15 + "000011" & X"09F", -- 0x14F: MOV R15, 0x09 + "000000" & X"000", -- 0x150: NOP + "000000" & X"000", -- 0x151: NOP + "000000" & X"000", -- 0x152: NOP + "010101" & X"01F", -- 0x153: DEC R15 + "110010" & X"150", -- 0x154: JNZ 0x150 + "111101" & X"00F", -- 0x155: POP R15 + "111110" & X"000", -- 0x156: RET + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000" + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : inst_addr_t; + signal jtag_ld_dout : inst_t; + signal jtag_ld_din : inst_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (31 downto 0); + constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); + jtag_ld_din <= user_regi(inst_t'length-1 downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdr_test_short_irom.vhdl b/projects/cpu/src/systest/sdr_test_short_irom.vhdl new file mode 100644 index 0000000..b968343 --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_short_irom.vhdl @@ -0,0 +1,172 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); +END irom; + +ARCHITECTURE sdr_test_short OF irom IS + + type imem_rom_t is array (0 to 110) of inst_t; + + -- Assembled from sdr_test_short.jsm + constant imem_rom : imem_rom_t := + ( + "110000" & X"002", -- 0x000: JMP 0x002 + "111111" & X"000", -- 0x001: RETI + "000011" & X"000", -- 0x002: MOV R00, 0x00 + "100100" & X"010", -- 0x003: XOUT (0x01), R00 + "101000" & X"040", -- 0x004: XIN R00, (0x04) + "011001" & X"CF0", -- 0x005: AND R00, 0xCF + "100100" & X"040", -- 0x006: XOUT (0x04), R00 + "101000" & X"070", -- 0x007: XIN R00, (0x07) + "011001" & X"800", -- 0x008: AND R00, 0x80 + "110010" & X"007", -- 0x009: JNZ 0x007 + "110000" & X"00B", -- 0x00A: JMP 0x00B + "111011" & X"058", -- 0x00B: CALL 0x058 + "000011" & X"800", -- 0x00C: MOV R00, 0x80 + "000011" & X"08F", -- 0x00D: MOV R15, 0x08 + "000111" & X"000", -- 0x00E: MOVX (R00), 0x00 + "010001" & X"010", -- 0x00F: INC R00 + "010101" & X"01F", -- 0x010: DEC R15 + "110010" & X"00E", -- 0x011: JNZ 0x00E + "101000" & X"080", -- 0x012: XIN R00, (0x08) + "001111" & X"080", -- 0x013: CMP R00, 0x08 + "111001" & X"01D", -- 0x014: JEQ 0x01D + "101000" & X"070", -- 0x015: XIN R00, (0x07) + "011001" & X"020", -- 0x016: AND R00, 0x02 + "110010" & X"015", -- 0x017: JNZ 0x015 + "000011" & X"070", -- 0x018: MOV R00, 0x07 + "100101" & X"020", -- 0x019: XOUT (R00), 0x02 + "000011" & X"020", -- 0x01A: MOV R00, 0x02 + "111011" & X"05F", -- 0x01B: CALL 0x05F + "110000" & X"012", -- 0x01C: JMP 0x012 + "111011" & X"058", -- 0x01D: CALL 0x058 + "000011" & X"000", -- 0x01E: MOV R00, 0x00 + "001101" & X"000", -- 0x01F: MOVC (0x00), R00 + "101000" & X"080", -- 0x020: XIN R00, (0x08) + "001111" & X"080", -- 0x021: CMP R00, 0x08 + "111001" & X"037", -- 0x022: JEQ 0x037 + "001010" & X"001", -- 0x023: MOVC R01, (0x00) + "000011" & X"800", -- 0x024: MOV R00, 0x80 + "000011" & X"08F", -- 0x025: MOV R15, 0x08 + "000110" & X"001", -- 0x026: MOVX (R01), R00 + "010001" & X"010", -- 0x027: INC R00 + "010001" & X"011", -- 0x028: INC R01 + "010101" & X"01F", -- 0x029: DEC R15 + "110010" & X"026", -- 0x02A: JNZ 0x026 + "101000" & X"070", -- 0x02B: XIN R00, (0x07) + "011001" & X"020", -- 0x02C: AND R00, 0x02 + "110010" & X"02B", -- 0x02D: JNZ 0x02B + "000000" & X"000", -- 0x02E: NOP + "000011" & X"070", -- 0x02F: MOV R00, 0x07 + "100101" & X"020", -- 0x030: XOUT (R00), 0x02 + "000011" & X"020", -- 0x031: MOV R00, 0x02 + "111011" & X"05F", -- 0x032: CALL 0x05F + "001010" & X"000", -- 0x033: MOVC R00, (0x00) + "010001" & X"010", -- 0x034: INC R00 + "001101" & X"000", -- 0x035: MOVC (0x00), R00 + "110000" & X"020", -- 0x036: JMP 0x020 + "111011" & X"058", -- 0x037: CALL 0x058 + "000011" & X"000", -- 0x038: MOV R00, 0x00 + "001101" & X"000", -- 0x039: MOVC (0x00), R00 + "101000" & X"080", -- 0x03A: XIN R00, (0x08) + "001111" & X"080", -- 0x03B: CMP R00, 0x08 + "111001" & X"052", -- 0x03C: JEQ 0x052 + "000011" & X"070", -- 0x03D: MOV R00, 0x07 + "100101" & X"010", -- 0x03E: XOUT (R00), 0x01 + "101000" & X"070", -- 0x03F: XIN R00, (0x07) + "011001" & X"010", -- 0x040: AND R00, 0x01 + "110010" & X"03F", -- 0x041: JNZ 0x03F + "001010" & X"001", -- 0x042: MOVC R01, (0x00) + "000011" & X"800", -- 0x043: MOV R00, 0x80 + "000011" & X"08F", -- 0x044: MOV R15, 0x08 + "000100" & X"002", -- 0x045: MOVX R02, (R00) + "001110" & X"012", -- 0x046: CMP R02, R01 + "111010" & X"053", -- 0x047: JNE 0x053 + "010001" & X"010", -- 0x048: INC R00 + "010001" & X"011", -- 0x049: INC R01 + "010101" & X"01F", -- 0x04A: DEC R15 + "110010" & X"045", -- 0x04B: JNZ 0x045 + "000011" & X"020", -- 0x04C: MOV R00, 0x02 + "111011" & X"05F", -- 0x04D: CALL 0x05F + "001010" & X"000", -- 0x04E: MOVC R00, (0x00) + "010001" & X"010", -- 0x04F: INC R00 + "001101" & X"000", -- 0x050: MOVC (0x00), R00 + "110000" & X"03A", -- 0x051: JMP 0x03A + "110000" & X"057", -- 0x052: JMP 0x057 + "101000" & X"040", -- 0x053: XIN R00, (0x04) + "011011" & X"100", -- 0x054: OR R00, 0x10 + "100100" & X"040", -- 0x055: XOUT (0x04), R00 + "110000" & X"057", -- 0x056: JMP 0x057 + "110000" & X"057", -- 0x057: JMP 0x057 + "111100" & X"000", -- 0x058: PUSH R00 + "000011" & X"000", -- 0x059: MOV R00, 0x00 + "100100" & X"080", -- 0x05A: XOUT (0x08), R00 + "100100" & X"090", -- 0x05B: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x05C: XOUT (0x0A), R00 + "111101" & X"000", -- 0x05D: POP R00 + "111110" & X"000", -- 0x05E: RET + "111100" & X"001", -- 0x05F: PUSH R01 + "111100" & X"002", -- 0x060: PUSH R02 + "111100" & X"003", -- 0x061: PUSH R03 + "101000" & X"081", -- 0x062: XIN R01, (0x08) + "101000" & X"092", -- 0x063: XIN R02, (0x09) + "101000" & X"0A3", -- 0x064: XIN R03, (0x0A) + "010000" & X"001", -- 0x065: ADD R01, R00 + "010011" & X"002", -- 0x066: ADDC R02, 0x00 + "010011" & X"003", -- 0x067: ADDC R03, 0x00 + "100100" & X"081", -- 0x068: XOUT (0x08), R01 + "100100" & X"092", -- 0x069: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x06A: XOUT (0x0A), R03 + "111101" & X"003", -- 0x06B: POP R03 + "111101" & X"002", -- 0x06C: POP R02 + "111101" & X"001", -- 0x06D: POP R01 + "111110" & X"000" -- 0x06E: RET + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +end sdr_test_short; + diff --git a/projects/cpu/src/systest/sdr_test_short_irom_ld.vhdl b/projects/cpu/src/systest/sdr_test_short_irom_ld.vhdl new file mode 100644 index 0000000..c07924a --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_short_irom_ld.vhdl @@ -0,0 +1,1181 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + +END irom; + +ARCHITECTURE loadable OF irom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdr_test_short.jsm + type imem_rom_t is array (0 to 1023) of inst_t; + signal imem_rom : imem_rom_t := + ( + "110000" & X"002", -- 0x000: JMP 0x002 + "111111" & X"000", -- 0x001: RETI + "000011" & X"000", -- 0x002: MOV R00, 0x00 + "100100" & X"010", -- 0x003: XOUT (0x01), R00 + "101000" & X"040", -- 0x004: XIN R00, (0x04) + "011001" & X"CF0", -- 0x005: AND R00, 0xCF + "100100" & X"040", -- 0x006: XOUT (0x04), R00 + "101000" & X"070", -- 0x007: XIN R00, (0x07) + "011001" & X"800", -- 0x008: AND R00, 0x80 + "110010" & X"007", -- 0x009: JNZ 0x007 + "110000" & X"00B", -- 0x00A: JMP 0x00B + "111011" & X"058", -- 0x00B: CALL 0x058 + "000011" & X"800", -- 0x00C: MOV R00, 0x80 + "000011" & X"08F", -- 0x00D: MOV R15, 0x08 + "000111" & X"000", -- 0x00E: MOVX (R00), 0x00 + "010001" & X"010", -- 0x00F: INC R00 + "010101" & X"01F", -- 0x010: DEC R15 + "110010" & X"00E", -- 0x011: JNZ 0x00E + "101000" & X"080", -- 0x012: XIN R00, (0x08) + "001111" & X"080", -- 0x013: CMP R00, 0x08 + "111001" & X"01D", -- 0x014: JEQ 0x01D + "101000" & X"070", -- 0x015: XIN R00, (0x07) + "011001" & X"020", -- 0x016: AND R00, 0x02 + "110010" & X"015", -- 0x017: JNZ 0x015 + "000011" & X"070", -- 0x018: MOV R00, 0x07 + "100101" & X"020", -- 0x019: XOUT (R00), 0x02 + "000011" & X"020", -- 0x01A: MOV R00, 0x02 + "111011" & X"05F", -- 0x01B: CALL 0x05F + "110000" & X"012", -- 0x01C: JMP 0x012 + "111011" & X"058", -- 0x01D: CALL 0x058 + "000011" & X"000", -- 0x01E: MOV R00, 0x00 + "001101" & X"000", -- 0x01F: MOVC (0x00), R00 + "101000" & X"080", -- 0x020: XIN R00, (0x08) + "001111" & X"080", -- 0x021: CMP R00, 0x08 + "111001" & X"037", -- 0x022: JEQ 0x037 + "001010" & X"001", -- 0x023: MOVC R01, (0x00) + "000011" & X"800", -- 0x024: MOV R00, 0x80 + "000011" & X"08F", -- 0x025: MOV R15, 0x08 + "000110" & X"001", -- 0x026: MOVX (R01), R00 + "010001" & X"010", -- 0x027: INC R00 + "010001" & X"011", -- 0x028: INC R01 + "010101" & X"01F", -- 0x029: DEC R15 + "110010" & X"026", -- 0x02A: JNZ 0x026 + "101000" & X"070", -- 0x02B: XIN R00, (0x07) + "011001" & X"020", -- 0x02C: AND R00, 0x02 + "110010" & X"02B", -- 0x02D: JNZ 0x02B + "000000" & X"000", -- 0x02E: NOP + "000011" & X"070", -- 0x02F: MOV R00, 0x07 + "100101" & X"020", -- 0x030: XOUT (R00), 0x02 + "000011" & X"020", -- 0x031: MOV R00, 0x02 + "111011" & X"05F", -- 0x032: CALL 0x05F + "001010" & X"000", -- 0x033: MOVC R00, (0x00) + "010001" & X"010", -- 0x034: INC R00 + "001101" & X"000", -- 0x035: MOVC (0x00), R00 + "110000" & X"020", -- 0x036: JMP 0x020 + "111011" & X"058", -- 0x037: CALL 0x058 + "000011" & X"000", -- 0x038: MOV R00, 0x00 + "001101" & X"000", -- 0x039: MOVC (0x00), R00 + "101000" & X"080", -- 0x03A: XIN R00, (0x08) + "001111" & X"080", -- 0x03B: CMP R00, 0x08 + "111001" & X"052", -- 0x03C: JEQ 0x052 + "000011" & X"070", -- 0x03D: MOV R00, 0x07 + "100101" & X"010", -- 0x03E: XOUT (R00), 0x01 + "101000" & X"070", -- 0x03F: XIN R00, (0x07) + "011001" & X"010", -- 0x040: AND R00, 0x01 + "110010" & X"03F", -- 0x041: JNZ 0x03F + "001010" & X"001", -- 0x042: MOVC R01, (0x00) + "000011" & X"800", -- 0x043: MOV R00, 0x80 + "000011" & X"08F", -- 0x044: MOV R15, 0x08 + "000100" & X"002", -- 0x045: MOVX R02, (R00) + "001110" & X"012", -- 0x046: CMP R02, R01 + "111010" & X"053", -- 0x047: JNE 0x053 + "010001" & X"010", -- 0x048: INC R00 + "010001" & X"011", -- 0x049: INC R01 + "010101" & X"01F", -- 0x04A: DEC R15 + "110010" & X"045", -- 0x04B: JNZ 0x045 + "000011" & X"020", -- 0x04C: MOV R00, 0x02 + "111011" & X"05F", -- 0x04D: CALL 0x05F + "001010" & X"000", -- 0x04E: MOVC R00, (0x00) + "010001" & X"010", -- 0x04F: INC R00 + "001101" & X"000", -- 0x050: MOVC (0x00), R00 + "110000" & X"03A", -- 0x051: JMP 0x03A + "110000" & X"057", -- 0x052: JMP 0x057 + "101000" & X"040", -- 0x053: XIN R00, (0x04) + "011011" & X"100", -- 0x054: OR R00, 0x10 + "100100" & X"040", -- 0x055: XOUT (0x04), R00 + "110000" & X"057", -- 0x056: JMP 0x057 + "110000" & X"057", -- 0x057: JMP 0x057 + "111100" & X"000", -- 0x058: PUSH R00 + "000011" & X"000", -- 0x059: MOV R00, 0x00 + "100100" & X"080", -- 0x05A: XOUT (0x08), R00 + "100100" & X"090", -- 0x05B: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x05C: XOUT (0x0A), R00 + "111101" & X"000", -- 0x05D: POP R00 + "111110" & X"000", -- 0x05E: RET + "111100" & X"001", -- 0x05F: PUSH R01 + "111100" & X"002", -- 0x060: PUSH R02 + "111100" & X"003", -- 0x061: PUSH R03 + "101000" & X"081", -- 0x062: XIN R01, (0x08) + "101000" & X"092", -- 0x063: XIN R02, (0x09) + "101000" & X"0A3", -- 0x064: XIN R03, (0x0A) + "010000" & X"001", -- 0x065: ADD R01, R00 + "010011" & X"002", -- 0x066: ADDC R02, 0x00 + "010011" & X"003", -- 0x067: ADDC R03, 0x00 + "100100" & X"081", -- 0x068: XOUT (0x08), R01 + "100100" & X"092", -- 0x069: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x06A: XOUT (0x0A), R03 + "111101" & X"003", -- 0x06B: POP R03 + "111101" & X"002", -- 0x06C: POP R02 + "111101" & X"001", -- 0x06D: POP R01 + "111110" & X"000", -- 0x06E: RET + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000" + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : inst_addr_t; + signal jtag_ld_dout : inst_t; + signal jtag_ld_din : inst_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (31 downto 0); + constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); + jtag_ld_din <= user_regi(inst_t'length-1 downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdr_test_short_xrom.vhdl b/projects/cpu/src/systest/sdr_test_short_xrom.vhdl new file mode 100644 index 0000000..b269fbd --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_short_xrom.vhdl @@ -0,0 +1,317 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); +END xrom; + +ARCHITECTURE sdr_test_short OF xrom IS + + type xmem_rom_t is array (0 to 255) of dmem_data_t; + + -- Assembled from sdr_test_short.jsm + constant xmem_rom : xmem_rom_t := + ( + X"00", -- 0x00 + X"00", -- 0x01 + X"00", -- 0x02 + X"00", -- 0x03 + X"00", -- 0x04 + X"00", -- 0x05 + X"00", -- 0x06 + X"00", -- 0x07 + X"00", -- 0x08 + X"00", -- 0x09 + X"00", -- 0x0A + X"00", -- 0x0B + X"00", -- 0x0C + X"00", -- 0x0D + X"00", -- 0x0E + X"00", -- 0x0F + X"00", -- 0x10 + X"00", -- 0x11 + X"00", -- 0x12 + X"00", -- 0x13 + X"00", -- 0x14 + X"00", -- 0x15 + X"00", -- 0x16 + X"00", -- 0x17 + X"00", -- 0x18 + X"00", -- 0x19 + X"00", -- 0x1A + X"00", -- 0x1B + X"00", -- 0x1C + X"00", -- 0x1D + X"00", -- 0x1E + X"00", -- 0x1F + X"00", -- 0x20 + X"00", -- 0x21 + X"00", -- 0x22 + X"00", -- 0x23 + X"00", -- 0x24 + X"00", -- 0x25 + X"00", -- 0x26 + X"00", -- 0x27 + X"00", -- 0x28 + X"00", -- 0x29 + X"00", -- 0x2A + X"00", -- 0x2B + X"00", -- 0x2C + X"00", -- 0x2D + X"00", -- 0x2E + X"00", -- 0x2F + X"00", -- 0x30 + X"00", -- 0x31 + X"00", -- 0x32 + X"00", -- 0x33 + X"00", -- 0x34 + X"00", -- 0x35 + X"00", -- 0x36 + X"00", -- 0x37 + X"00", -- 0x38 + X"00", -- 0x39 + X"00", -- 0x3A + X"00", -- 0x3B + X"00", -- 0x3C + X"00", -- 0x3D + X"00", -- 0x3E + X"00", -- 0x3F + X"00", -- 0x40 + X"00", -- 0x41 + X"00", -- 0x42 + X"00", -- 0x43 + X"00", -- 0x44 + X"00", -- 0x45 + X"00", -- 0x46 + X"00", -- 0x47 + X"00", -- 0x48 + X"00", -- 0x49 + X"00", -- 0x4A + X"00", -- 0x4B + X"00", -- 0x4C + X"00", -- 0x4D + X"00", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +end sdr_test_short; + diff --git a/projects/cpu/src/systest/sdr_test_short_xrom_ld.vhdl b/projects/cpu/src/systest/sdr_test_short_xrom_ld.vhdl new file mode 100644 index 0000000..b8dcc9e --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_short_xrom_ld.vhdl @@ -0,0 +1,413 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + +END xrom; + +ARCHITECTURE loadable OF xrom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdr_test_short.jsm + type xmem_rom_t is array (0 to 255) of dmem_data_t; + signal xmem_rom : xmem_rom_t := + ( + X"00", -- 0x00 + X"00", -- 0x01 + X"00", -- 0x02 + X"00", -- 0x03 + X"00", -- 0x04 + X"00", -- 0x05 + X"00", -- 0x06 + X"00", -- 0x07 + X"00", -- 0x08 + X"00", -- 0x09 + X"00", -- 0x0A + X"00", -- 0x0B + X"00", -- 0x0C + X"00", -- 0x0D + X"00", -- 0x0E + X"00", -- 0x0F + X"00", -- 0x10 + X"00", -- 0x11 + X"00", -- 0x12 + X"00", -- 0x13 + X"00", -- 0x14 + X"00", -- 0x15 + X"00", -- 0x16 + X"00", -- 0x17 + X"00", -- 0x18 + X"00", -- 0x19 + X"00", -- 0x1A + X"00", -- 0x1B + X"00", -- 0x1C + X"00", -- 0x1D + X"00", -- 0x1E + X"00", -- 0x1F + X"00", -- 0x20 + X"00", -- 0x21 + X"00", -- 0x22 + X"00", -- 0x23 + X"00", -- 0x24 + X"00", -- 0x25 + X"00", -- 0x26 + X"00", -- 0x27 + X"00", -- 0x28 + X"00", -- 0x29 + X"00", -- 0x2A + X"00", -- 0x2B + X"00", -- 0x2C + X"00", -- 0x2D + X"00", -- 0x2E + X"00", -- 0x2F + X"00", -- 0x30 + X"00", -- 0x31 + X"00", -- 0x32 + X"00", -- 0x33 + X"00", -- 0x34 + X"00", -- 0x35 + X"00", -- 0x36 + X"00", -- 0x37 + X"00", -- 0x38 + X"00", -- 0x39 + X"00", -- 0x3A + X"00", -- 0x3B + X"00", -- 0x3C + X"00", -- 0x3D + X"00", -- 0x3E + X"00", -- 0x3F + X"00", -- 0x40 + X"00", -- 0x41 + X"00", -- 0x42 + X"00", -- 0x43 + X"00", -- 0x44 + X"00", -- 0x45 + X"00", -- 0x46 + X"00", -- 0x47 + X"00", -- 0x48 + X"00", -- 0x49 + X"00", -- 0x4A + X"00", -- 0x4B + X"00", -- 0x4C + X"00", -- 0x4D + X"00", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : dmem_addr_t; + signal jtag_ld_dout : dmem_data_t; + signal jtag_ld_din : dmem_data_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (15 downto 0); + constant id : unsigned (15 downto 0) := X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); + jtag_ld_din <= user_regi(dmem_data_t'left downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdr_test_xrom.vhdl b/projects/cpu/src/systest/sdr_test_xrom.vhdl new file mode 100644 index 0000000..9771a4d --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_xrom.vhdl @@ -0,0 +1,318 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); +END xrom; + +ARCHITECTURE sdr_test OF xrom IS + + type xmem_rom_t is array (0 to 255) of dmem_data_t; + + -- Assembled from sdr_test.jsm + constant xmem_rom : xmem_rom_t := + ( + X"53", -- 0x00 + X"44", -- 0x01 + X"52", -- 0x02 + X"41", -- 0x03 + X"4D", -- 0x04 + X"20", -- 0x05 + X"54", -- 0x06 + X"65", -- 0x07 + X"73", -- 0x08 + X"74", -- 0x09 + X"00", -- 0x0A + X"43", -- 0x0B + X"6C", -- 0x0C + X"65", -- 0x0D + X"61", -- 0x0E + X"72", -- 0x0F + X"69", -- 0x10 + X"6E", -- 0x11 + X"67", -- 0x12 + X"20", -- 0x13 + X"53", -- 0x14 + X"44", -- 0x15 + X"52", -- 0x16 + X"41", -- 0x17 + X"4D", -- 0x18 + X"00", -- 0x19 + X"57", -- 0x1A + X"72", -- 0x1B + X"69", -- 0x1C + X"74", -- 0x1D + X"69", -- 0x1E + X"6E", -- 0x1F + X"67", -- 0x20 + X"20", -- 0x21 + X"53", -- 0x22 + X"44", -- 0x23 + X"52", -- 0x24 + X"41", -- 0x25 + X"4D", -- 0x26 + X"00", -- 0x27 + X"52", -- 0x28 + X"65", -- 0x29 + X"61", -- 0x2A + X"64", -- 0x2B + X"69", -- 0x2C + X"6E", -- 0x2D + X"67", -- 0x2E + X"20", -- 0x2F + X"53", -- 0x30 + X"44", -- 0x31 + X"52", -- 0x32 + X"41", -- 0x33 + X"4D", -- 0x34 + X"00", -- 0x35 + X"56", -- 0x36 + X"65", -- 0x37 + X"72", -- 0x38 + X"69", -- 0x39 + X"66", -- 0x3A + X"79", -- 0x3B + X"20", -- 0x3C + X"4F", -- 0x3D + X"4B", -- 0x3E + X"00", -- 0x3F + X"56", -- 0x40 + X"65", -- 0x41 + X"72", -- 0x42 + X"69", -- 0x43 + X"66", -- 0x44 + X"79", -- 0x45 + X"20", -- 0x46 + X"46", -- 0x47 + X"61", -- 0x48 + X"69", -- 0x49 + X"6C", -- 0x4A + X"65", -- 0x4B + X"64", -- 0x4C + X"00", -- 0x4D + X"2E", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +end sdr_test; + diff --git a/projects/cpu/src/systest/sdr_test_xrom_ld.vhdl b/projects/cpu/src/systest/sdr_test_xrom_ld.vhdl new file mode 100644 index 0000000..304897c --- /dev/null +++ b/projects/cpu/src/systest/sdr_test_xrom_ld.vhdl @@ -0,0 +1,414 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + +END xrom; + +ARCHITECTURE loadable OF xrom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdr_test.jsm + type xmem_rom_t is array (0 to 255) of dmem_data_t; + signal xmem_rom : xmem_rom_t := + ( + X"53", -- 0x00 + X"44", -- 0x01 + X"52", -- 0x02 + X"41", -- 0x03 + X"4D", -- 0x04 + X"20", -- 0x05 + X"54", -- 0x06 + X"65", -- 0x07 + X"73", -- 0x08 + X"74", -- 0x09 + X"00", -- 0x0A + X"43", -- 0x0B + X"6C", -- 0x0C + X"65", -- 0x0D + X"61", -- 0x0E + X"72", -- 0x0F + X"69", -- 0x10 + X"6E", -- 0x11 + X"67", -- 0x12 + X"20", -- 0x13 + X"53", -- 0x14 + X"44", -- 0x15 + X"52", -- 0x16 + X"41", -- 0x17 + X"4D", -- 0x18 + X"00", -- 0x19 + X"57", -- 0x1A + X"72", -- 0x1B + X"69", -- 0x1C + X"74", -- 0x1D + X"69", -- 0x1E + X"6E", -- 0x1F + X"67", -- 0x20 + X"20", -- 0x21 + X"53", -- 0x22 + X"44", -- 0x23 + X"52", -- 0x24 + X"41", -- 0x25 + X"4D", -- 0x26 + X"00", -- 0x27 + X"52", -- 0x28 + X"65", -- 0x29 + X"61", -- 0x2A + X"64", -- 0x2B + X"69", -- 0x2C + X"6E", -- 0x2D + X"67", -- 0x2E + X"20", -- 0x2F + X"53", -- 0x30 + X"44", -- 0x31 + X"52", -- 0x32 + X"41", -- 0x33 + X"4D", -- 0x34 + X"00", -- 0x35 + X"56", -- 0x36 + X"65", -- 0x37 + X"72", -- 0x38 + X"69", -- 0x39 + X"66", -- 0x3A + X"79", -- 0x3B + X"20", -- 0x3C + X"4F", -- 0x3D + X"4B", -- 0x3E + X"00", -- 0x3F + X"56", -- 0x40 + X"65", -- 0x41 + X"72", -- 0x42 + X"69", -- 0x43 + X"66", -- 0x44 + X"79", -- 0x45 + X"20", -- 0x46 + X"46", -- 0x47 + X"61", -- 0x48 + X"69", -- 0x49 + X"6C", -- 0x4A + X"65", -- 0x4B + X"64", -- 0x4C + X"00", -- 0x4D + X"2E", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : dmem_addr_t; + signal jtag_ld_dout : dmem_data_t; + signal jtag_ld_din : dmem_data_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (15 downto 0); + constant id : unsigned (15 downto 0) := X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); + jtag_ld_din <= user_regi(dmem_data_t'left downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdr_tst_irom.vhdl b/projects/cpu/src/systest/sdr_tst_irom.vhdl new file mode 100644 index 0000000..e69de29 diff --git a/projects/cpu/src/systest/sdr_tst_irom_ld.vhdl b/projects/cpu/src/systest/sdr_tst_irom_ld.vhdl new file mode 100644 index 0000000..e69de29 diff --git a/projects/cpu/src/systest/sdr_tst_xrom.vhdl b/projects/cpu/src/systest/sdr_tst_xrom.vhdl new file mode 100644 index 0000000..e69de29 diff --git a/projects/cpu/src/systest/sdr_tst_xrom_ld.vhdl b/projects/cpu/src/systest/sdr_tst_xrom_ld.vhdl new file mode 100644 index 0000000..e69de29 diff --git a/projects/cpu/src/systest/sdram_config.vhd b/projects/cpu/src/systest/sdram_config.vhd new file mode 100644 index 0000000..bdb6f09 --- /dev/null +++ b/projects/cpu/src/systest/sdram_config.vhd @@ -0,0 +1,74 @@ +------------------------------------------------------------------------- +-- Project: SDRAM controller +-- This file: User SDRAM component adjustments +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +library IEEE; +USE IEEE.STD_LOGIC_1164.ALL; +USE IEEE.NUMERIC_STD.ALL; + +package sdram_config is + + constant DDR_DATA_WIDTH : positive := 32; -- External DDR-SDRAM Module data bus width + constant DDR_ADDR_WIDTH : positive := 13; -- number of address lines to DDR-SDRAM Device/Module + constant DDR_BANK_WIDTH : positive := 2; -- Number of BANK address lines of external DDR-SDRAM + constant DDR_ROW_ADDR_WIDTH : positive := 13; -- + constant DDR_COL_ADDR_WIDTH : positive := 9; -- + + constant LMR_REG_BASE : natural := 0; + constant LMR_REG_EXTENDED : natural := 1; + constant LMR_OP_NORMAL : natural := 0; + constant LMR_OP_RES_DLL : natural := 2; + constant LMR_BT_SEQ : natural := 0; + constant LMR_BT_ILVD : natural := 1; + constant LMR_BL2 : natural := 1; + constant LMR_BL4 : natural := 2; + constant LMR_BL8 : natural := 3; + constant LMR_CL2 : natural := 2; + constant LMR_CL3 : natural := 3; + constant LMR_CL2_5 : natural := 6; + + -- DDR SDRAM Hardware defined constants + constant BIT_AUTO_PRE : positive := 10; -- bit-position in column address for auto precharge (see Data Sheet) + constant BIT_PRE_ALL : positive := 10; -- bit-position in column address for precharge all (see Data Sheet) + constant ENABLE_PRE_ALL : std_logic := '1'; + constant ENABLE_AUTO_PRE : std_logic := '0'; + + -- DDR-SDR TIMING constants ------------------------------------------------------------------ + -- After REFRESH_CLOCKS a refresh cycle is necessary, 64ms / 8192 = max every 7.8125 us refesh + constant REFRESH_INTERVAL : real := 7.8125; -- us + + -- These values are for your SDRAM part (see datasheet) + constant TCAS : positive := 2; -- CAS latency [clocks] + constant TRP : positive := 2; -- precharge command period + constant TRAS : positive := 5; -- active to precharge delay + constant TRFC : positive := 8; -- auto refresh command period + constant TMRD : positive := 2; -- load mode register command cylce time + constant TRCD : positive := 2; -- active to read or write delay ! + constant TWR : positive := 2; -- write recovery time + + constant PWR_UP_WAIT : natural := 220; -- µs + + subtype user_tag_t is unsigned(3 downto 0); + + ---------------------------------------------------------------------------------------------- + +end sdram_config; diff --git a/projects/cpu/src/systest/sdram_test_irom.vhdl b/projects/cpu/src/systest/sdram_test_irom.vhdl new file mode 100644 index 0000000..6026283 --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_irom.vhdl @@ -0,0 +1,575 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); +END irom; + +ARCHITECTURE sdram_test OF irom IS + + type imem_rom_t is array (0 to 513) of inst_t; + + -- Assembled from sdram_test.jsm + constant imem_rom : imem_rom_t := + ( + "110000" & X"007", -- 0x000: JMP 0x007 + "111100" & X"000", -- 0x001: PUSH R00 + "101000" & X"040", -- 0x002: XIN R00, (0x04) + "011011" & X"100", -- 0x003: OR R00, 0x10 + "100100" & X"040", -- 0x004: XOUT (0x04), R00 + "111101" & X"000", -- 0x005: POP R00 + "111111" & X"000", -- 0x006: RETI + "111011" & X"128", -- 0x007: CALL 0x128 + "000011" & X"000", -- 0x008: MOV R00, 0x00 + "100100" & X"010", -- 0x009: XOUT (0x01), R00 + "000011" & X"040", -- 0x00A: MOV R00, 0x04 + "100100" & X"040", -- 0x00B: XOUT (0x04), R00 + "101001" & X"030", -- 0x00C: CIN R00, (0x03) + "011011" & X"050", -- 0x00D: OR R00, 0x05 + "100110" & X"030", -- 0x00E: COUT (0x03), R00 + "000011" & X"010", -- 0x00F: MOV R00, 0x01 + "111011" & X"145", -- 0x010: CALL 0x145 + "000011" & X"000", -- 0x011: MOV R00, 0x00 + "000011" & X"C01", -- 0x012: MOV R01, 0xC0 + "100100" & X"101", -- 0x013: XOUT (0x10), R01 + "100100" & X"111", -- 0x014: XOUT (0x11), R01 + "100100" & X"121", -- 0x015: XOUT (0x12), R01 + "111011" & X"1B9", -- 0x016: CALL 0x1B9 + "111011" & X"19E", -- 0x017: CALL 0x19E + "000011" & X"031", -- 0x018: MOV R01, 0x03 + "111011" & X"14A", -- 0x019: CALL 0x14A + "000011" & X"031", -- 0x01A: MOV R01, 0x03 + "111011" & X"1AA", -- 0x01B: CALL 0x1AA + "000011" & X"001", -- 0x01C: MOV R01, 0x00 + "111011" & X"1B6", -- 0x01D: CALL 0x1B6 + "101000" & X"040", -- 0x01E: XIN R00, (0x04) + "011011" & X"100", -- 0x01F: OR R00, 0x10 + "100100" & X"040", -- 0x020: XOUT (0x04), R00 + "111011" & X"1C6", -- 0x021: CALL 0x1C6 + "011011" & X"200", -- 0x022: OR R00, 0x20 + "100100" & X"040", -- 0x023: XOUT (0x04), R00 + "111011" & X"1C6", -- 0x024: CALL 0x1C6 + "011001" & X"EF0", -- 0x025: AND R00, 0xEF + "100100" & X"040", -- 0x026: XOUT (0x04), R00 + "111011" & X"1C6", -- 0x027: CALL 0x1C6 + "011001" & X"CF0", -- 0x028: AND R00, 0xCF + "100100" & X"040", -- 0x029: XOUT (0x04), R00 + "000011" & X"010", -- 0x02A: MOV R00, 0x01 + "111011" & X"145", -- 0x02B: CALL 0x145 + "000011" & X"0E1", -- 0x02C: MOV R01, 0x0E + "111011" & X"14A", -- 0x02D: CALL 0x14A + "000011" & X"0E1", -- 0x02E: MOV R01, 0x0E + "111011" & X"1B3", -- 0x02F: CALL 0x1B3 + "000011" & X"001", -- 0x030: MOV R01, 0x00 + "111011" & X"1B6", -- 0x031: CALL 0x1B6 + "111011" & X"0CC", -- 0x032: CALL 0x0CC + "000011" & X"800", -- 0x033: MOV R00, 0x80 + "000011" & X"08F", -- 0x034: MOV R15, 0x08 + "000111" & X"000", -- 0x035: MOVX (R00), 0x00 + "010001" & X"010", -- 0x036: INC R00 + "010101" & X"01F", -- 0x037: DEC R15 + "110010" & X"035", -- 0x038: JNZ 0x035 + "101000" & X"0A0", -- 0x039: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x03A: CMP R00, 0xFF + "111001" & X"04B", -- 0x03B: JEQ 0x04B + "000011" & X"082", -- 0x03C: MOV R02, 0x08 + "101000" & X"070", -- 0x03D: XIN R00, (0x07) + "100100" & X"010", -- 0x03E: XOUT (0x01), R00 + "011001" & X"040", -- 0x03F: AND R00, 0x04 + "110010" & X"03D", -- 0x040: JNZ 0x03D + "000011" & X"100", -- 0x041: MOV R00, 0x10 + "100100" & X"070", -- 0x042: XOUT (0x07), R00 + "010101" & X"022", -- 0x043: SUB R02, 0x02 + "110010" & X"03D", -- 0x044: JNZ 0x03D + "111011" & X"0AB", -- 0x045: CALL 0x0AB + "000011" & X"060", -- 0x046: MOV R00, 0x06 + "100100" & X"070", -- 0x047: XOUT (0x07), R00 + "000011" & X"080", -- 0x048: MOV R00, 0x08 + "111011" & X"0D3", -- 0x049: CALL 0x0D3 + "110000" & X"039", -- 0x04A: JMP 0x039 + "111011" & X"0E3", -- 0x04B: CALL 0x0E3 + "111011" & X"1BF", -- 0x04C: CALL 0x1BF + "110000" & X"04E", -- 0x04D: JMP 0x04E + "000011" & X"010", -- 0x04E: MOV R00, 0x01 + "111011" & X"145", -- 0x04F: CALL 0x145 + "000011" & X"1D1", -- 0x050: MOV R01, 0x1D + "111011" & X"14A", -- 0x051: CALL 0x14A + "000011" & X"1D1", -- 0x052: MOV R01, 0x1D + "111011" & X"1B3", -- 0x053: CALL 0x1B3 + "000011" & X"001", -- 0x054: MOV R01, 0x00 + "111011" & X"1B6", -- 0x055: CALL 0x1B6 + "111011" & X"0CC", -- 0x056: CALL 0x0CC + "000011" & X"000", -- 0x057: MOV R00, 0x00 + "001101" & X"000", -- 0x058: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x059: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x05A: CMP R00, 0xFF + "111001" & X"076", -- 0x05B: JEQ 0x076 + "000011" & X"082", -- 0x05C: MOV R02, 0x08 + "001010" & X"001", -- 0x05D: MOVC R01, (0x00) + "000011" & X"800", -- 0x05E: MOV R00, 0x80 + "000011" & X"08F", -- 0x05F: MOV R15, 0x08 + "000110" & X"001", -- 0x060: MOVX (R01), R00 + "010001" & X"010", -- 0x061: INC R00 + "010001" & X"011", -- 0x062: INC R01 + "010101" & X"01F", -- 0x063: DEC R15 + "110010" & X"060", -- 0x064: JNZ 0x060 + "101000" & X"070", -- 0x065: XIN R00, (0x07) + "100100" & X"010", -- 0x066: XOUT (0x01), R00 + "011001" & X"040", -- 0x067: AND R00, 0x04 + "110010" & X"065", -- 0x068: JNZ 0x065 + "000011" & X"100", -- 0x069: MOV R00, 0x10 + "100100" & X"070", -- 0x06A: XOUT (0x07), R00 + "001010" & X"000", -- 0x06B: MOVC R00, (0x00) + "010001" & X"010", -- 0x06C: INC R00 + "001101" & X"000", -- 0x06D: MOVC (0x00), R00 + "010101" & X"022", -- 0x06E: SUB R02, 0x02 + "110010" & X"05D", -- 0x06F: JNZ 0x05D + "111011" & X"0AB", -- 0x070: CALL 0x0AB + "000011" & X"060", -- 0x071: MOV R00, 0x06 + "100100" & X"070", -- 0x072: XOUT (0x07), R00 + "000011" & X"080", -- 0x073: MOV R00, 0x08 + "111011" & X"0D3", -- 0x074: CALL 0x0D3 + "110000" & X"059", -- 0x075: JMP 0x059 + "111011" & X"0E3", -- 0x076: CALL 0x0E3 + "111011" & X"1BF", -- 0x077: CALL 0x1BF + "000011" & X"010", -- 0x078: MOV R00, 0x01 + "111011" & X"145", -- 0x079: CALL 0x145 + "000011" & X"2B1", -- 0x07A: MOV R01, 0x2B + "111011" & X"14A", -- 0x07B: CALL 0x14A + "000011" & X"2B1", -- 0x07C: MOV R01, 0x2B + "111011" & X"1B3", -- 0x07D: CALL 0x1B3 + "000011" & X"001", -- 0x07E: MOV R01, 0x00 + "111011" & X"1B6", -- 0x07F: CALL 0x1B6 + "111011" & X"0CC", -- 0x080: CALL 0x0CC + "000011" & X"000", -- 0x081: MOV R00, 0x00 + "001101" & X"000", -- 0x082: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x083: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x084: CMP R00, 0xFF + "111001" & X"0B3", -- 0x085: JEQ 0x0B3 + "111011" & X"0AB", -- 0x086: CALL 0x0AB + "000011" & X"050", -- 0x087: MOV R00, 0x05 + "100100" & X"070", -- 0x088: XOUT (0x07), R00 + "000011" & X"083", -- 0x089: MOV R03, 0x08 + "101000" & X"070", -- 0x08A: XIN R00, (0x07) + "100100" & X"010", -- 0x08B: XOUT (0x01), R00 + "011001" & X"200", -- 0x08C: AND R00, 0x20 + "110010" & X"08A", -- 0x08D: JNZ 0x08A + "001010" & X"001", -- 0x08E: MOVC R01, (0x00) + "000011" & X"800", -- 0x08F: MOV R00, 0x80 + "000011" & X"08F", -- 0x090: MOV R15, 0x08 + "000100" & X"002", -- 0x091: MOVX R02, (R00) + "001110" & X"012", -- 0x092: CMP R02, R01 + "111010" & X"0BF", -- 0x093: JNE 0x0BF + "010001" & X"010", -- 0x094: INC R00 + "010001" & X"011", -- 0x095: INC R01 + "010101" & X"01F", -- 0x096: DEC R15 + "110010" & X"091", -- 0x097: JNZ 0x091 + "000011" & X"200", -- 0x098: MOV R00, 0x20 + "100100" & X"070", -- 0x099: XOUT (0x07), R00 + "001010" & X"000", -- 0x09A: MOVC R00, (0x00) + "010001" & X"010", -- 0x09B: INC R00 + "001101" & X"000", -- 0x09C: MOVC (0x00), R00 + "010101" & X"023", -- 0x09D: SUB R03, 0x02 + "110010" & X"08A", -- 0x09E: JNZ 0x08A + "000011" & X"080", -- 0x09F: MOV R00, 0x08 + "111011" & X"0D3", -- 0x0A0: CALL 0x0D3 + "110000" & X"083", -- 0x0A1: JMP 0x083 + "111100" & X"000", -- 0x0A2: PUSH R00 + "000011" & X"800", -- 0x0A3: MOV R00, 0x80 + "100100" & X"070", -- 0x0A4: XOUT (0x07), R00 + "101000" & X"070", -- 0x0A5: XIN R00, (0x07) + "100100" & X"010", -- 0x0A6: XOUT (0x01), R00 + "011001" & X"800", -- 0x0A7: AND R00, 0x80 + "110001" & X"0A5", -- 0x0A8: JZ 0x0A5 + "111101" & X"000", -- 0x0A9: POP R00 + "111110" & X"000", -- 0x0AA: RET + "111011" & X"0A2", -- 0x0AB: CALL 0x0A2 + "111100" & X"000", -- 0x0AC: PUSH R00 + "101000" & X"070", -- 0x0AD: XIN R00, (0x07) + "100100" & X"010", -- 0x0AE: XOUT (0x01), R00 + "011001" & X"010", -- 0x0AF: AND R00, 0x01 + "110010" & X"0AD", -- 0x0B0: JNZ 0x0AD + "111101" & X"000", -- 0x0B1: POP R00 + "111110" & X"000", -- 0x0B2: RET + "000011" & X"010", -- 0x0B3: MOV R00, 0x01 + "111011" & X"145", -- 0x0B4: CALL 0x145 + "000011" & X"391", -- 0x0B5: MOV R01, 0x39 + "111011" & X"14A", -- 0x0B6: CALL 0x14A + "000011" & X"C00", -- 0x0B7: MOV R00, 0xC0 + "111011" & X"145", -- 0x0B8: CALL 0x145 + "111011" & X"0EE", -- 0x0B9: CALL 0x0EE + "000011" & X"391", -- 0x0BA: MOV R01, 0x39 + "111011" & X"1B3", -- 0x0BB: CALL 0x1B3 + "000011" & X"001", -- 0x0BC: MOV R01, 0x00 + "111011" & X"1B6", -- 0x0BD: CALL 0x1B6 + "110000" & X"0CA", -- 0x0BE: JMP 0x0CA + "000011" & X"010", -- 0x0BF: MOV R00, 0x01 + "111011" & X"145", -- 0x0C0: CALL 0x145 + "000011" & X"431", -- 0x0C1: MOV R01, 0x43 + "111011" & X"14A", -- 0x0C2: CALL 0x14A + "111011" & X"0EE", -- 0x0C3: CALL 0x0EE + "111011" & X"106", -- 0x0C4: CALL 0x106 + "000011" & X"431", -- 0x0C5: MOV R01, 0x43 + "111011" & X"1B3", -- 0x0C6: CALL 0x1B3 + "000011" & X"001", -- 0x0C7: MOV R01, 0x00 + "111011" & X"1B6", -- 0x0C8: CALL 0x1B6 + "110000" & X"0CA", -- 0x0C9: JMP 0x0CA + "111011" & X"1BF", -- 0x0CA: CALL 0x1BF + "110000" & X"02A", -- 0x0CB: JMP 0x02A + "111100" & X"000", -- 0x0CC: PUSH R00 + "000011" & X"000", -- 0x0CD: MOV R00, 0x00 + "100100" & X"080", -- 0x0CE: XOUT (0x08), R00 + "100100" & X"090", -- 0x0CF: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x0D0: XOUT (0x0A), R00 + "111101" & X"000", -- 0x0D1: POP R00 + "111110" & X"000", -- 0x0D2: RET + "111100" & X"001", -- 0x0D3: PUSH R01 + "111100" & X"002", -- 0x0D4: PUSH R02 + "111100" & X"003", -- 0x0D5: PUSH R03 + "101000" & X"081", -- 0x0D6: XIN R01, (0x08) + "101000" & X"092", -- 0x0D7: XIN R02, (0x09) + "101000" & X"0A3", -- 0x0D8: XIN R03, (0x0A) + "010000" & X"001", -- 0x0D9: ADD R01, R00 + "010011" & X"002", -- 0x0DA: ADDC R02, 0x00 + "010011" & X"003", -- 0x0DB: ADDC R03, 0x00 + "100100" & X"081", -- 0x0DC: XOUT (0x08), R01 + "100100" & X"092", -- 0x0DD: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x0DE: XOUT (0x0A), R03 + "111101" & X"003", -- 0x0DF: POP R03 + "111101" & X"002", -- 0x0E0: POP R02 + "111101" & X"001", -- 0x0E1: POP R01 + "111110" & X"000", -- 0x0E2: RET + "000011" & X"C00", -- 0x0E3: MOV R00, 0xC0 + "111011" & X"145", -- 0x0E4: CALL 0x145 + "111011" & X"0EE", -- 0x0E5: CALL 0x0EE + "111110" & X"000", -- 0x0E6: RET + "111100" & X"001", -- 0x0E7: PUSH R01 + "111011" & X"121", -- 0x0E8: CALL 0x121 + "111011" & X"15C", -- 0x0E9: CALL 0x15C + "000010" & X"010", -- 0x0EA: MOV R00, R01 + "111011" & X"15C", -- 0x0EB: CALL 0x15C + "111101" & X"001", -- 0x0EC: POP R01 + "111110" & X"000", -- 0x0ED: RET + "111100" & X"000", -- 0x0EE: PUSH R00 + "101000" & X"0A0", -- 0x0EF: XIN R00, (0x0A) + "111011" & X"0E7", -- 0x0F0: CALL 0x0E7 + "101000" & X"090", -- 0x0F1: XIN R00, (0x09) + "111011" & X"0E7", -- 0x0F2: CALL 0x0E7 + "101000" & X"080", -- 0x0F3: XIN R00, (0x08) + "111011" & X"0E7", -- 0x0F4: CALL 0x0E7 + "111101" & X"000", -- 0x0F5: POP R00 + "111110" & X"000", -- 0x0F6: RET + "111100" & X"000", -- 0x0F7: PUSH R00 + "010001" & X"031", -- 0x0F8: ADD R01, 0x03 + "001001" & X"010", -- 0x0F9: MOVC R00, (R01) + "111011" & X"0E7", -- 0x0FA: CALL 0x0E7 + "010101" & X"011", -- 0x0FB: DEC R01 + "001001" & X"010", -- 0x0FC: MOVC R00, (R01) + "111011" & X"0E7", -- 0x0FD: CALL 0x0E7 + "010101" & X"011", -- 0x0FE: DEC R01 + "001001" & X"010", -- 0x0FF: MOVC R00, (R01) + "111011" & X"0E7", -- 0x100: CALL 0x0E7 + "010101" & X"011", -- 0x101: DEC R01 + "001001" & X"010", -- 0x102: MOVC R00, (R01) + "111011" & X"0E7", -- 0x103: CALL 0x0E7 + "111101" & X"000", -- 0x104: POP R00 + "111110" & X"000", -- 0x105: RET + "111100" & X"000", -- 0x106: PUSH R00 + "000011" & X"C00", -- 0x107: MOV R00, 0xC0 + "111011" & X"145", -- 0x108: CALL 0x145 + "000101" & X"870", -- 0x109: MOVX R00, (0x87) + "111011" & X"0E7", -- 0x10A: CALL 0x0E7 + "000101" & X"860", -- 0x10B: MOVX R00, (0x86) + "111011" & X"0E7", -- 0x10C: CALL 0x0E7 + "000101" & X"850", -- 0x10D: MOVX R00, (0x85) + "111011" & X"0E7", -- 0x10E: CALL 0x0E7 + "000101" & X"840", -- 0x10F: MOVX R00, (0x84) + "111011" & X"0E7", -- 0x110: CALL 0x0E7 + "000101" & X"830", -- 0x111: MOVX R00, (0x83) + "111011" & X"0E7", -- 0x112: CALL 0x0E7 + "000101" & X"820", -- 0x113: MOVX R00, (0x82) + "111011" & X"0E7", -- 0x114: CALL 0x0E7 + "000101" & X"810", -- 0x115: MOVX R00, (0x81) + "111011" & X"0E7", -- 0x116: CALL 0x0E7 + "000101" & X"800", -- 0x117: MOVX R00, (0x80) + "111011" & X"0E7", -- 0x118: CALL 0x0E7 + "111101" & X"000", -- 0x119: POP R00 + "111110" & X"000", -- 0x11A: RET + "011001" & X"0F0", -- 0x11B: AND R00, 0x0F + "001111" & X"0A0", -- 0x11C: CMP R00, 0x0A + "110101" & X"11F", -- 0x11D: JLT 0x11F + "010001" & X"070", -- 0x11E: ADD R00, 0x07 + "010001" & X"300", -- 0x11F: ADD R00, 0x30 + "111110" & X"000", -- 0x120: RET + "111100" & X"000", -- 0x121: PUSH R00 + "111011" & X"11B", -- 0x122: CALL 0x11B + "000010" & X"001", -- 0x123: MOV R01, R00 + "111101" & X"000", -- 0x124: POP R00 + "101010" & X"000", -- 0x125: SWAP R00 + "111011" & X"11B", -- 0x126: CALL 0x11B + "111110" & X"000", -- 0x127: RET + "000011" & X"002", -- 0x128: MOV R02, 0x00 + "000011" & X"030", -- 0x129: MOV R00, 0x03 + "111011" & X"174", -- 0x12A: CALL 0x174 + "111011" & X"1CD", -- 0x12B: CALL 0x1CD + "000011" & X"002", -- 0x12C: MOV R02, 0x00 + "000011" & X"030", -- 0x12D: MOV R00, 0x03 + "111011" & X"174", -- 0x12E: CALL 0x174 + "111011" & X"1CD", -- 0x12F: CALL 0x1CD + "000011" & X"002", -- 0x130: MOV R02, 0x00 + "000011" & X"020", -- 0x131: MOV R00, 0x02 + "111011" & X"174", -- 0x132: CALL 0x174 + "111011" & X"1D4", -- 0x133: CALL 0x1D4 + "000011" & X"280", -- 0x134: MOV R00, 0x28 + "111011" & X"145", -- 0x135: CALL 0x145 + "000011" & X"0C0", -- 0x136: MOV R00, 0x0C + "111011" & X"145", -- 0x137: CALL 0x145 + "000011" & X"060", -- 0x138: MOV R00, 0x06 + "111011" & X"145", -- 0x139: CALL 0x145 + "000011" & X"010", -- 0x13A: MOV R00, 0x01 + "111011" & X"145", -- 0x13B: CALL 0x145 + "111110" & X"000", -- 0x13C: RET + "111100" & X"000", -- 0x13D: PUSH R00 + "111011" & X"168", -- 0x13E: CALL 0x168 + "011001" & X"800", -- 0x13F: AND R00, 0x80 + "110001" & X"143", -- 0x140: JZ 0x143 + "111011" & X"1EB", -- 0x141: CALL 0x1EB + "110000" & X"13E", -- 0x142: JMP 0x13E + "111101" & X"000", -- 0x143: POP R00 + "111110" & X"000", -- 0x144: RET + "111100" & X"002", -- 0x145: PUSH R02 + "000011" & X"002", -- 0x146: MOV R02, 0x00 + "111011" & X"161", -- 0x147: CALL 0x161 + "111101" & X"002", -- 0x148: POP R02 + "111110" & X"000", -- 0x149: RET + "111100" & X"000", -- 0x14A: PUSH R00 + "000100" & X"010", -- 0x14B: MOVX R00, (R01) + "010001" & X"011", -- 0x14C: INC R01 + "001111" & X"000", -- 0x14D: TST R00 + "110001" & X"151", -- 0x14E: JZ 0x151 + "111011" & X"15C", -- 0x14F: CALL 0x15C + "110000" & X"14B", -- 0x150: JMP 0x14B + "111101" & X"000", -- 0x151: POP R00 + "111110" & X"000", -- 0x152: RET + "111100" & X"000", -- 0x153: PUSH R00 + "001001" & X"010", -- 0x154: MOVC R00, (R01) + "010001" & X"011", -- 0x155: INC R01 + "001111" & X"000", -- 0x156: TST R00 + "110001" & X"15A", -- 0x157: JZ 0x15A + "111011" & X"15C", -- 0x158: CALL 0x15C + "110000" & X"154", -- 0x159: JMP 0x154 + "111101" & X"000", -- 0x15A: POP R00 + "111110" & X"000", -- 0x15B: RET + "111100" & X"002", -- 0x15C: PUSH R02 + "000011" & X"402", -- 0x15D: MOV R02, 0x40 + "111011" & X"161", -- 0x15E: CALL 0x161 + "111101" & X"002", -- 0x15F: POP R02 + "111110" & X"000", -- 0x160: RET + "111011" & X"13D", -- 0x161: CALL 0x13D + "111100" & X"000", -- 0x162: PUSH R00 + "101010" & X"000", -- 0x163: SWAP R00 + "111011" & X"174", -- 0x164: CALL 0x174 + "111101" & X"000", -- 0x165: POP R00 + "111011" & X"174", -- 0x166: CALL 0x174 + "111110" & X"000", -- 0x167: RET + "111100" & X"002", -- 0x168: PUSH R02 + "000011" & X"002", -- 0x169: MOV R02, 0x00 + "111011" & X"16D", -- 0x16A: CALL 0x16D + "111101" & X"002", -- 0x16B: POP R02 + "111110" & X"000", -- 0x16C: RET + "111011" & X"187", -- 0x16D: CALL 0x187 + "101010" & X"000", -- 0x16E: SWAP R00 + "111100" & X"000", -- 0x16F: PUSH R00 + "111011" & X"187", -- 0x170: CALL 0x187 + "111101" & X"002", -- 0x171: POP R02 + "011010" & X"020", -- 0x172: OR R00, R02 + "111110" & X"000", -- 0x173: RET + "111100" & X"001", -- 0x174: PUSH R01 + "011001" & X"0F0", -- 0x175: AND R00, 0x0F + "000010" & X"001", -- 0x176: MOV R01, R00 + "011010" & X"021", -- 0x177: OR R01, R02 + "100100" & X"031", -- 0x178: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x179: CALL 0x1EB + "000010" & X"001", -- 0x17A: MOV R01, R00 + "011010" & X"021", -- 0x17B: OR R01, R02 + "011011" & X"801", -- 0x17C: OR R01, 0x80 + "100100" & X"031", -- 0x17D: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x17E: CALL 0x1EB + "000010" & X"001", -- 0x17F: MOV R01, R00 + "011010" & X"021", -- 0x180: OR R01, R02 + "100100" & X"031", -- 0x181: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x182: CALL 0x1EB + "011011" & X"201", -- 0x183: OR R01, 0x20 + "100100" & X"031", -- 0x184: XOUT (0x03), R01 + "111101" & X"001", -- 0x185: POP R01 + "111110" & X"000", -- 0x186: RET + "111100" & X"001", -- 0x187: PUSH R01 + "000011" & X"201", -- 0x188: MOV R01, 0x20 + "011010" & X"021", -- 0x189: OR R01, R02 + "100100" & X"031", -- 0x18A: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x18B: CALL 0x1EB + "000011" & X"201", -- 0x18C: MOV R01, 0x20 + "011010" & X"021", -- 0x18D: OR R01, R02 + "011011" & X"801", -- 0x18E: OR R01, 0x80 + "100100" & X"031", -- 0x18F: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x190: CALL 0x1EB + "101000" & X"030", -- 0x191: XIN R00, (0x03) + "011001" & X"0F0", -- 0x192: AND R00, 0x0F + "000011" & X"201", -- 0x193: MOV R01, 0x20 + "011010" & X"021", -- 0x194: OR R01, R02 + "100100" & X"031", -- 0x195: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x196: CALL 0x1EB + "111101" & X"001", -- 0x197: POP R01 + "111110" & X"000", -- 0x198: RET + "111100" & X"000", -- 0x199: PUSH R00 + "000011" & X"020", -- 0x19A: MOV R00, 0x02 + "100100" & X"0E0", -- 0x19B: XOUT (0x0E), R00 + "111101" & X"000", -- 0x19C: POP R00 + "111110" & X"000", -- 0x19D: RET + "111100" & X"000", -- 0x19E: PUSH R00 + "000011" & X"010", -- 0x19F: MOV R00, 0x01 + "100100" & X"0E0", -- 0x1A0: XOUT (0x0E), R00 + "111101" & X"000", -- 0x1A1: POP R00 + "111110" & X"000", -- 0x1A2: RET + "111011" & X"1B9", -- 0x1A3: CALL 0x1B9 + "100100" & X"0C1", -- 0x1A4: XOUT (0x0C), R01 + "100100" & X"0B0", -- 0x1A5: XOUT (0x0B), R00 + "111110" & X"000", -- 0x1A6: RET + "111011" & X"1B9", -- 0x1A7: CALL 0x1B9 + "100100" & X"0D0", -- 0x1A8: XOUT (0x0D), R00 + "111110" & X"000", -- 0x1A9: RET + "111100" & X"000", -- 0x1AA: PUSH R00 + "000100" & X"010", -- 0x1AB: MOVX R00, (R01) + "010001" & X"011", -- 0x1AC: INC R01 + "001111" & X"000", -- 0x1AD: TST R00 + "110001" & X"1B1", -- 0x1AE: JZ 0x1B1 + "111011" & X"1A7", -- 0x1AF: CALL 0x1A7 + "110000" & X"1AB", -- 0x1B0: JMP 0x1AB + "111101" & X"000", -- 0x1B1: POP R00 + "111110" & X"000", -- 0x1B2: RET + "111011" & X"199", -- 0x1B3: CALL 0x199 + "111011" & X"1AA", -- 0x1B4: CALL 0x1AA + "111110" & X"000", -- 0x1B5: RET + "111011" & X"1AA", -- 0x1B6: CALL 0x1AA + "111011" & X"199", -- 0x1B7: CALL 0x199 + "111110" & X"000", -- 0x1B8: RET + "111100" & X"000", -- 0x1B9: PUSH R00 + "101000" & X"0E0", -- 0x1BA: XIN R00, (0x0E) + "011001" & X"020", -- 0x1BB: AND R00, 0x02 + "110001" & X"1BA", -- 0x1BC: JZ 0x1BA + "111101" & X"000", -- 0x1BD: POP R00 + "111110" & X"000", -- 0x1BE: RET + "111100" & X"00F", -- 0x1BF: PUSH R15 + "000011" & X"0AF", -- 0x1C0: MOV R15, 0x0A + "111011" & X"1C6", -- 0x1C1: CALL 0x1C6 + "010101" & X"01F", -- 0x1C2: DEC R15 + "110010" & X"1C1", -- 0x1C3: JNZ 0x1C1 + "111101" & X"00F", -- 0x1C4: POP R15 + "111110" & X"000", -- 0x1C5: RET + "111100" & X"00F", -- 0x1C6: PUSH R15 + "000011" & X"0AF", -- 0x1C7: MOV R15, 0x0A + "111011" & X"1CD", -- 0x1C8: CALL 0x1CD + "010101" & X"01F", -- 0x1C9: DEC R15 + "110010" & X"1C8", -- 0x1CA: JNZ 0x1C8 + "111101" & X"00F", -- 0x1CB: POP R15 + "111110" & X"000", -- 0x1CC: RET + "111100" & X"00F", -- 0x1CD: PUSH R15 + "000011" & X"0AF", -- 0x1CE: MOV R15, 0x0A + "111011" & X"1D4", -- 0x1CF: CALL 0x1D4 + "010101" & X"01F", -- 0x1D0: DEC R15 + "110010" & X"1CF", -- 0x1D1: JNZ 0x1CF + "111101" & X"00F", -- 0x1D2: POP R15 + "111110" & X"000", -- 0x1D3: RET + "111100" & X"00F", -- 0x1D4: PUSH R15 + "000011" & X"0AF", -- 0x1D5: MOV R15, 0x0A + "111011" & X"1DB", -- 0x1D6: CALL 0x1DB + "010101" & X"01F", -- 0x1D7: DEC R15 + "110010" & X"1D6", -- 0x1D8: JNZ 0x1D6 + "111101" & X"00F", -- 0x1D9: POP R15 + "111110" & X"000", -- 0x1DA: RET + "111100" & X"00F", -- 0x1DB: PUSH R15 + "000011" & X"0AF", -- 0x1DC: MOV R15, 0x0A + "111011" & X"1E2", -- 0x1DD: CALL 0x1E2 + "010101" & X"01F", -- 0x1DE: DEC R15 + "110010" & X"1DD", -- 0x1DF: JNZ 0x1DD + "111101" & X"00F", -- 0x1E0: POP R15 + "111110" & X"000", -- 0x1E1: RET + "111100" & X"00F", -- 0x1E2: PUSH R15 + "000011" & X"63F", -- 0x1E3: MOV R15, 0x63 + "000000" & X"000", -- 0x1E4: NOP + "000000" & X"000", -- 0x1E5: NOP + "000000" & X"000", -- 0x1E6: NOP + "010101" & X"01F", -- 0x1E7: DEC R15 + "110010" & X"1E4", -- 0x1E8: JNZ 0x1E4 + "111101" & X"00F", -- 0x1E9: POP R15 + "111110" & X"000", -- 0x1EA: RET + "111100" & X"00F", -- 0x1EB: PUSH R15 + "000011" & X"09F", -- 0x1EC: MOV R15, 0x09 + "000000" & X"000", -- 0x1ED: NOP + "000000" & X"000", -- 0x1EE: NOP + "000000" & X"000", -- 0x1EF: NOP + "010101" & X"01F", -- 0x1F0: DEC R15 + "110010" & X"1ED", -- 0x1F1: JNZ 0x1ED + "111101" & X"00F", -- 0x1F2: POP R15 + "111110" & X"000", -- 0x1F3: RET + "111100" & X"001", -- 0x1F4: PUSH R01 + "101000" & X"061", -- 0x1F5: XIN R01, (0x06) + "011001" & X"021", -- 0x1F6: AND R01, 0x02 + "110010" & X"1F5", -- 0x1F7: JNZ 0x1F5 + "100100" & X"020", -- 0x1F8: XOUT (0x02), R00 + "111101" & X"001", -- 0x1F9: POP R01 + "111110" & X"000", -- 0x1FA: RET + "111100" & X"001", -- 0x1FB: PUSH R01 + "101000" & X"061", -- 0x1FC: XIN R01, (0x06) + "011001" & X"101", -- 0x1FD: AND R01, 0x10 + "110001" & X"1FC", -- 0x1FE: JZ 0x1FC + "101000" & X"020", -- 0x1FF: XIN R00, (0x02) + "111101" & X"001", -- 0x200: POP R01 + "111110" & X"000" -- 0x201: RET + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +end sdram_test; + diff --git a/projects/cpu/src/systest/sdram_test_irom_ld.vhdl b/projects/cpu/src/systest/sdram_test_irom_ld.vhdl new file mode 100644 index 0000000..891cd27 --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_irom_ld.vhdl @@ -0,0 +1,1181 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + +END irom; + +ARCHITECTURE loadable OF irom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdram_test.jsm + type imem_rom_t is array (0 to 1023) of inst_t; + signal imem_rom : imem_rom_t := + ( + "110000" & X"007", -- 0x000: JMP 0x007 + "111100" & X"000", -- 0x001: PUSH R00 + "101000" & X"040", -- 0x002: XIN R00, (0x04) + "011011" & X"100", -- 0x003: OR R00, 0x10 + "100100" & X"040", -- 0x004: XOUT (0x04), R00 + "111101" & X"000", -- 0x005: POP R00 + "111111" & X"000", -- 0x006: RETI + "111011" & X"128", -- 0x007: CALL 0x128 + "000011" & X"000", -- 0x008: MOV R00, 0x00 + "100100" & X"010", -- 0x009: XOUT (0x01), R00 + "000011" & X"040", -- 0x00A: MOV R00, 0x04 + "100100" & X"040", -- 0x00B: XOUT (0x04), R00 + "101001" & X"030", -- 0x00C: CIN R00, (0x03) + "011011" & X"050", -- 0x00D: OR R00, 0x05 + "100110" & X"030", -- 0x00E: COUT (0x03), R00 + "000011" & X"010", -- 0x00F: MOV R00, 0x01 + "111011" & X"145", -- 0x010: CALL 0x145 + "000011" & X"000", -- 0x011: MOV R00, 0x00 + "000011" & X"C01", -- 0x012: MOV R01, 0xC0 + "100100" & X"101", -- 0x013: XOUT (0x10), R01 + "100100" & X"111", -- 0x014: XOUT (0x11), R01 + "100100" & X"121", -- 0x015: XOUT (0x12), R01 + "111011" & X"1B9", -- 0x016: CALL 0x1B9 + "111011" & X"19E", -- 0x017: CALL 0x19E + "000011" & X"031", -- 0x018: MOV R01, 0x03 + "111011" & X"14A", -- 0x019: CALL 0x14A + "000011" & X"031", -- 0x01A: MOV R01, 0x03 + "111011" & X"1AA", -- 0x01B: CALL 0x1AA + "000011" & X"001", -- 0x01C: MOV R01, 0x00 + "111011" & X"1B6", -- 0x01D: CALL 0x1B6 + "101000" & X"040", -- 0x01E: XIN R00, (0x04) + "011011" & X"100", -- 0x01F: OR R00, 0x10 + "100100" & X"040", -- 0x020: XOUT (0x04), R00 + "111011" & X"1C6", -- 0x021: CALL 0x1C6 + "011011" & X"200", -- 0x022: OR R00, 0x20 + "100100" & X"040", -- 0x023: XOUT (0x04), R00 + "111011" & X"1C6", -- 0x024: CALL 0x1C6 + "011001" & X"EF0", -- 0x025: AND R00, 0xEF + "100100" & X"040", -- 0x026: XOUT (0x04), R00 + "111011" & X"1C6", -- 0x027: CALL 0x1C6 + "011001" & X"CF0", -- 0x028: AND R00, 0xCF + "100100" & X"040", -- 0x029: XOUT (0x04), R00 + "000011" & X"010", -- 0x02A: MOV R00, 0x01 + "111011" & X"145", -- 0x02B: CALL 0x145 + "000011" & X"0E1", -- 0x02C: MOV R01, 0x0E + "111011" & X"14A", -- 0x02D: CALL 0x14A + "000011" & X"0E1", -- 0x02E: MOV R01, 0x0E + "111011" & X"1B3", -- 0x02F: CALL 0x1B3 + "000011" & X"001", -- 0x030: MOV R01, 0x00 + "111011" & X"1B6", -- 0x031: CALL 0x1B6 + "111011" & X"0CC", -- 0x032: CALL 0x0CC + "000011" & X"800", -- 0x033: MOV R00, 0x80 + "000011" & X"08F", -- 0x034: MOV R15, 0x08 + "000111" & X"000", -- 0x035: MOVX (R00), 0x00 + "010001" & X"010", -- 0x036: INC R00 + "010101" & X"01F", -- 0x037: DEC R15 + "110010" & X"035", -- 0x038: JNZ 0x035 + "101000" & X"0A0", -- 0x039: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x03A: CMP R00, 0xFF + "111001" & X"04B", -- 0x03B: JEQ 0x04B + "000011" & X"082", -- 0x03C: MOV R02, 0x08 + "101000" & X"070", -- 0x03D: XIN R00, (0x07) + "100100" & X"010", -- 0x03E: XOUT (0x01), R00 + "011001" & X"040", -- 0x03F: AND R00, 0x04 + "110010" & X"03D", -- 0x040: JNZ 0x03D + "000011" & X"100", -- 0x041: MOV R00, 0x10 + "100100" & X"070", -- 0x042: XOUT (0x07), R00 + "010101" & X"022", -- 0x043: SUB R02, 0x02 + "110010" & X"03D", -- 0x044: JNZ 0x03D + "111011" & X"0AB", -- 0x045: CALL 0x0AB + "000011" & X"060", -- 0x046: MOV R00, 0x06 + "100100" & X"070", -- 0x047: XOUT (0x07), R00 + "000011" & X"080", -- 0x048: MOV R00, 0x08 + "111011" & X"0D3", -- 0x049: CALL 0x0D3 + "110000" & X"039", -- 0x04A: JMP 0x039 + "111011" & X"0E3", -- 0x04B: CALL 0x0E3 + "111011" & X"1BF", -- 0x04C: CALL 0x1BF + "110000" & X"04E", -- 0x04D: JMP 0x04E + "000011" & X"010", -- 0x04E: MOV R00, 0x01 + "111011" & X"145", -- 0x04F: CALL 0x145 + "000011" & X"1D1", -- 0x050: MOV R01, 0x1D + "111011" & X"14A", -- 0x051: CALL 0x14A + "000011" & X"1D1", -- 0x052: MOV R01, 0x1D + "111011" & X"1B3", -- 0x053: CALL 0x1B3 + "000011" & X"001", -- 0x054: MOV R01, 0x00 + "111011" & X"1B6", -- 0x055: CALL 0x1B6 + "111011" & X"0CC", -- 0x056: CALL 0x0CC + "000011" & X"000", -- 0x057: MOV R00, 0x00 + "001101" & X"000", -- 0x058: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x059: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x05A: CMP R00, 0xFF + "111001" & X"076", -- 0x05B: JEQ 0x076 + "000011" & X"082", -- 0x05C: MOV R02, 0x08 + "001010" & X"001", -- 0x05D: MOVC R01, (0x00) + "000011" & X"800", -- 0x05E: MOV R00, 0x80 + "000011" & X"08F", -- 0x05F: MOV R15, 0x08 + "000110" & X"001", -- 0x060: MOVX (R01), R00 + "010001" & X"010", -- 0x061: INC R00 + "010001" & X"011", -- 0x062: INC R01 + "010101" & X"01F", -- 0x063: DEC R15 + "110010" & X"060", -- 0x064: JNZ 0x060 + "101000" & X"070", -- 0x065: XIN R00, (0x07) + "100100" & X"010", -- 0x066: XOUT (0x01), R00 + "011001" & X"040", -- 0x067: AND R00, 0x04 + "110010" & X"065", -- 0x068: JNZ 0x065 + "000011" & X"100", -- 0x069: MOV R00, 0x10 + "100100" & X"070", -- 0x06A: XOUT (0x07), R00 + "001010" & X"000", -- 0x06B: MOVC R00, (0x00) + "010001" & X"010", -- 0x06C: INC R00 + "001101" & X"000", -- 0x06D: MOVC (0x00), R00 + "010101" & X"022", -- 0x06E: SUB R02, 0x02 + "110010" & X"05D", -- 0x06F: JNZ 0x05D + "111011" & X"0AB", -- 0x070: CALL 0x0AB + "000011" & X"060", -- 0x071: MOV R00, 0x06 + "100100" & X"070", -- 0x072: XOUT (0x07), R00 + "000011" & X"080", -- 0x073: MOV R00, 0x08 + "111011" & X"0D3", -- 0x074: CALL 0x0D3 + "110000" & X"059", -- 0x075: JMP 0x059 + "111011" & X"0E3", -- 0x076: CALL 0x0E3 + "111011" & X"1BF", -- 0x077: CALL 0x1BF + "000011" & X"010", -- 0x078: MOV R00, 0x01 + "111011" & X"145", -- 0x079: CALL 0x145 + "000011" & X"2B1", -- 0x07A: MOV R01, 0x2B + "111011" & X"14A", -- 0x07B: CALL 0x14A + "000011" & X"2B1", -- 0x07C: MOV R01, 0x2B + "111011" & X"1B3", -- 0x07D: CALL 0x1B3 + "000011" & X"001", -- 0x07E: MOV R01, 0x00 + "111011" & X"1B6", -- 0x07F: CALL 0x1B6 + "111011" & X"0CC", -- 0x080: CALL 0x0CC + "000011" & X"000", -- 0x081: MOV R00, 0x00 + "001101" & X"000", -- 0x082: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x083: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x084: CMP R00, 0xFF + "111001" & X"0B3", -- 0x085: JEQ 0x0B3 + "111011" & X"0AB", -- 0x086: CALL 0x0AB + "000011" & X"050", -- 0x087: MOV R00, 0x05 + "100100" & X"070", -- 0x088: XOUT (0x07), R00 + "000011" & X"083", -- 0x089: MOV R03, 0x08 + "101000" & X"070", -- 0x08A: XIN R00, (0x07) + "100100" & X"010", -- 0x08B: XOUT (0x01), R00 + "011001" & X"200", -- 0x08C: AND R00, 0x20 + "110010" & X"08A", -- 0x08D: JNZ 0x08A + "001010" & X"001", -- 0x08E: MOVC R01, (0x00) + "000011" & X"800", -- 0x08F: MOV R00, 0x80 + "000011" & X"08F", -- 0x090: MOV R15, 0x08 + "000100" & X"002", -- 0x091: MOVX R02, (R00) + "001110" & X"012", -- 0x092: CMP R02, R01 + "111010" & X"0BF", -- 0x093: JNE 0x0BF + "010001" & X"010", -- 0x094: INC R00 + "010001" & X"011", -- 0x095: INC R01 + "010101" & X"01F", -- 0x096: DEC R15 + "110010" & X"091", -- 0x097: JNZ 0x091 + "000011" & X"200", -- 0x098: MOV R00, 0x20 + "100100" & X"070", -- 0x099: XOUT (0x07), R00 + "001010" & X"000", -- 0x09A: MOVC R00, (0x00) + "010001" & X"010", -- 0x09B: INC R00 + "001101" & X"000", -- 0x09C: MOVC (0x00), R00 + "010101" & X"023", -- 0x09D: SUB R03, 0x02 + "110010" & X"08A", -- 0x09E: JNZ 0x08A + "000011" & X"080", -- 0x09F: MOV R00, 0x08 + "111011" & X"0D3", -- 0x0A0: CALL 0x0D3 + "110000" & X"083", -- 0x0A1: JMP 0x083 + "111100" & X"000", -- 0x0A2: PUSH R00 + "000011" & X"800", -- 0x0A3: MOV R00, 0x80 + "100100" & X"070", -- 0x0A4: XOUT (0x07), R00 + "101000" & X"070", -- 0x0A5: XIN R00, (0x07) + "100100" & X"010", -- 0x0A6: XOUT (0x01), R00 + "011001" & X"800", -- 0x0A7: AND R00, 0x80 + "110001" & X"0A5", -- 0x0A8: JZ 0x0A5 + "111101" & X"000", -- 0x0A9: POP R00 + "111110" & X"000", -- 0x0AA: RET + "111011" & X"0A2", -- 0x0AB: CALL 0x0A2 + "111100" & X"000", -- 0x0AC: PUSH R00 + "101000" & X"070", -- 0x0AD: XIN R00, (0x07) + "100100" & X"010", -- 0x0AE: XOUT (0x01), R00 + "011001" & X"010", -- 0x0AF: AND R00, 0x01 + "110010" & X"0AD", -- 0x0B0: JNZ 0x0AD + "111101" & X"000", -- 0x0B1: POP R00 + "111110" & X"000", -- 0x0B2: RET + "000011" & X"010", -- 0x0B3: MOV R00, 0x01 + "111011" & X"145", -- 0x0B4: CALL 0x145 + "000011" & X"391", -- 0x0B5: MOV R01, 0x39 + "111011" & X"14A", -- 0x0B6: CALL 0x14A + "000011" & X"C00", -- 0x0B7: MOV R00, 0xC0 + "111011" & X"145", -- 0x0B8: CALL 0x145 + "111011" & X"0EE", -- 0x0B9: CALL 0x0EE + "000011" & X"391", -- 0x0BA: MOV R01, 0x39 + "111011" & X"1B3", -- 0x0BB: CALL 0x1B3 + "000011" & X"001", -- 0x0BC: MOV R01, 0x00 + "111011" & X"1B6", -- 0x0BD: CALL 0x1B6 + "110000" & X"0CA", -- 0x0BE: JMP 0x0CA + "000011" & X"010", -- 0x0BF: MOV R00, 0x01 + "111011" & X"145", -- 0x0C0: CALL 0x145 + "000011" & X"431", -- 0x0C1: MOV R01, 0x43 + "111011" & X"14A", -- 0x0C2: CALL 0x14A + "111011" & X"0EE", -- 0x0C3: CALL 0x0EE + "111011" & X"106", -- 0x0C4: CALL 0x106 + "000011" & X"431", -- 0x0C5: MOV R01, 0x43 + "111011" & X"1B3", -- 0x0C6: CALL 0x1B3 + "000011" & X"001", -- 0x0C7: MOV R01, 0x00 + "111011" & X"1B6", -- 0x0C8: CALL 0x1B6 + "110000" & X"0CA", -- 0x0C9: JMP 0x0CA + "111011" & X"1BF", -- 0x0CA: CALL 0x1BF + "110000" & X"02A", -- 0x0CB: JMP 0x02A + "111100" & X"000", -- 0x0CC: PUSH R00 + "000011" & X"000", -- 0x0CD: MOV R00, 0x00 + "100100" & X"080", -- 0x0CE: XOUT (0x08), R00 + "100100" & X"090", -- 0x0CF: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x0D0: XOUT (0x0A), R00 + "111101" & X"000", -- 0x0D1: POP R00 + "111110" & X"000", -- 0x0D2: RET + "111100" & X"001", -- 0x0D3: PUSH R01 + "111100" & X"002", -- 0x0D4: PUSH R02 + "111100" & X"003", -- 0x0D5: PUSH R03 + "101000" & X"081", -- 0x0D6: XIN R01, (0x08) + "101000" & X"092", -- 0x0D7: XIN R02, (0x09) + "101000" & X"0A3", -- 0x0D8: XIN R03, (0x0A) + "010000" & X"001", -- 0x0D9: ADD R01, R00 + "010011" & X"002", -- 0x0DA: ADDC R02, 0x00 + "010011" & X"003", -- 0x0DB: ADDC R03, 0x00 + "100100" & X"081", -- 0x0DC: XOUT (0x08), R01 + "100100" & X"092", -- 0x0DD: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x0DE: XOUT (0x0A), R03 + "111101" & X"003", -- 0x0DF: POP R03 + "111101" & X"002", -- 0x0E0: POP R02 + "111101" & X"001", -- 0x0E1: POP R01 + "111110" & X"000", -- 0x0E2: RET + "000011" & X"C00", -- 0x0E3: MOV R00, 0xC0 + "111011" & X"145", -- 0x0E4: CALL 0x145 + "111011" & X"0EE", -- 0x0E5: CALL 0x0EE + "111110" & X"000", -- 0x0E6: RET + "111100" & X"001", -- 0x0E7: PUSH R01 + "111011" & X"121", -- 0x0E8: CALL 0x121 + "111011" & X"15C", -- 0x0E9: CALL 0x15C + "000010" & X"010", -- 0x0EA: MOV R00, R01 + "111011" & X"15C", -- 0x0EB: CALL 0x15C + "111101" & X"001", -- 0x0EC: POP R01 + "111110" & X"000", -- 0x0ED: RET + "111100" & X"000", -- 0x0EE: PUSH R00 + "101000" & X"0A0", -- 0x0EF: XIN R00, (0x0A) + "111011" & X"0E7", -- 0x0F0: CALL 0x0E7 + "101000" & X"090", -- 0x0F1: XIN R00, (0x09) + "111011" & X"0E7", -- 0x0F2: CALL 0x0E7 + "101000" & X"080", -- 0x0F3: XIN R00, (0x08) + "111011" & X"0E7", -- 0x0F4: CALL 0x0E7 + "111101" & X"000", -- 0x0F5: POP R00 + "111110" & X"000", -- 0x0F6: RET + "111100" & X"000", -- 0x0F7: PUSH R00 + "010001" & X"031", -- 0x0F8: ADD R01, 0x03 + "001001" & X"010", -- 0x0F9: MOVC R00, (R01) + "111011" & X"0E7", -- 0x0FA: CALL 0x0E7 + "010101" & X"011", -- 0x0FB: DEC R01 + "001001" & X"010", -- 0x0FC: MOVC R00, (R01) + "111011" & X"0E7", -- 0x0FD: CALL 0x0E7 + "010101" & X"011", -- 0x0FE: DEC R01 + "001001" & X"010", -- 0x0FF: MOVC R00, (R01) + "111011" & X"0E7", -- 0x100: CALL 0x0E7 + "010101" & X"011", -- 0x101: DEC R01 + "001001" & X"010", -- 0x102: MOVC R00, (R01) + "111011" & X"0E7", -- 0x103: CALL 0x0E7 + "111101" & X"000", -- 0x104: POP R00 + "111110" & X"000", -- 0x105: RET + "111100" & X"000", -- 0x106: PUSH R00 + "000011" & X"C00", -- 0x107: MOV R00, 0xC0 + "111011" & X"145", -- 0x108: CALL 0x145 + "000101" & X"870", -- 0x109: MOVX R00, (0x87) + "111011" & X"0E7", -- 0x10A: CALL 0x0E7 + "000101" & X"860", -- 0x10B: MOVX R00, (0x86) + "111011" & X"0E7", -- 0x10C: CALL 0x0E7 + "000101" & X"850", -- 0x10D: MOVX R00, (0x85) + "111011" & X"0E7", -- 0x10E: CALL 0x0E7 + "000101" & X"840", -- 0x10F: MOVX R00, (0x84) + "111011" & X"0E7", -- 0x110: CALL 0x0E7 + "000101" & X"830", -- 0x111: MOVX R00, (0x83) + "111011" & X"0E7", -- 0x112: CALL 0x0E7 + "000101" & X"820", -- 0x113: MOVX R00, (0x82) + "111011" & X"0E7", -- 0x114: CALL 0x0E7 + "000101" & X"810", -- 0x115: MOVX R00, (0x81) + "111011" & X"0E7", -- 0x116: CALL 0x0E7 + "000101" & X"800", -- 0x117: MOVX R00, (0x80) + "111011" & X"0E7", -- 0x118: CALL 0x0E7 + "111101" & X"000", -- 0x119: POP R00 + "111110" & X"000", -- 0x11A: RET + "011001" & X"0F0", -- 0x11B: AND R00, 0x0F + "001111" & X"0A0", -- 0x11C: CMP R00, 0x0A + "110101" & X"11F", -- 0x11D: JLT 0x11F + "010001" & X"070", -- 0x11E: ADD R00, 0x07 + "010001" & X"300", -- 0x11F: ADD R00, 0x30 + "111110" & X"000", -- 0x120: RET + "111100" & X"000", -- 0x121: PUSH R00 + "111011" & X"11B", -- 0x122: CALL 0x11B + "000010" & X"001", -- 0x123: MOV R01, R00 + "111101" & X"000", -- 0x124: POP R00 + "101010" & X"000", -- 0x125: SWAP R00 + "111011" & X"11B", -- 0x126: CALL 0x11B + "111110" & X"000", -- 0x127: RET + "000011" & X"002", -- 0x128: MOV R02, 0x00 + "000011" & X"030", -- 0x129: MOV R00, 0x03 + "111011" & X"174", -- 0x12A: CALL 0x174 + "111011" & X"1CD", -- 0x12B: CALL 0x1CD + "000011" & X"002", -- 0x12C: MOV R02, 0x00 + "000011" & X"030", -- 0x12D: MOV R00, 0x03 + "111011" & X"174", -- 0x12E: CALL 0x174 + "111011" & X"1CD", -- 0x12F: CALL 0x1CD + "000011" & X"002", -- 0x130: MOV R02, 0x00 + "000011" & X"020", -- 0x131: MOV R00, 0x02 + "111011" & X"174", -- 0x132: CALL 0x174 + "111011" & X"1D4", -- 0x133: CALL 0x1D4 + "000011" & X"280", -- 0x134: MOV R00, 0x28 + "111011" & X"145", -- 0x135: CALL 0x145 + "000011" & X"0C0", -- 0x136: MOV R00, 0x0C + "111011" & X"145", -- 0x137: CALL 0x145 + "000011" & X"060", -- 0x138: MOV R00, 0x06 + "111011" & X"145", -- 0x139: CALL 0x145 + "000011" & X"010", -- 0x13A: MOV R00, 0x01 + "111011" & X"145", -- 0x13B: CALL 0x145 + "111110" & X"000", -- 0x13C: RET + "111100" & X"000", -- 0x13D: PUSH R00 + "111011" & X"168", -- 0x13E: CALL 0x168 + "011001" & X"800", -- 0x13F: AND R00, 0x80 + "110001" & X"143", -- 0x140: JZ 0x143 + "111011" & X"1EB", -- 0x141: CALL 0x1EB + "110000" & X"13E", -- 0x142: JMP 0x13E + "111101" & X"000", -- 0x143: POP R00 + "111110" & X"000", -- 0x144: RET + "111100" & X"002", -- 0x145: PUSH R02 + "000011" & X"002", -- 0x146: MOV R02, 0x00 + "111011" & X"161", -- 0x147: CALL 0x161 + "111101" & X"002", -- 0x148: POP R02 + "111110" & X"000", -- 0x149: RET + "111100" & X"000", -- 0x14A: PUSH R00 + "000100" & X"010", -- 0x14B: MOVX R00, (R01) + "010001" & X"011", -- 0x14C: INC R01 + "001111" & X"000", -- 0x14D: TST R00 + "110001" & X"151", -- 0x14E: JZ 0x151 + "111011" & X"15C", -- 0x14F: CALL 0x15C + "110000" & X"14B", -- 0x150: JMP 0x14B + "111101" & X"000", -- 0x151: POP R00 + "111110" & X"000", -- 0x152: RET + "111100" & X"000", -- 0x153: PUSH R00 + "001001" & X"010", -- 0x154: MOVC R00, (R01) + "010001" & X"011", -- 0x155: INC R01 + "001111" & X"000", -- 0x156: TST R00 + "110001" & X"15A", -- 0x157: JZ 0x15A + "111011" & X"15C", -- 0x158: CALL 0x15C + "110000" & X"154", -- 0x159: JMP 0x154 + "111101" & X"000", -- 0x15A: POP R00 + "111110" & X"000", -- 0x15B: RET + "111100" & X"002", -- 0x15C: PUSH R02 + "000011" & X"402", -- 0x15D: MOV R02, 0x40 + "111011" & X"161", -- 0x15E: CALL 0x161 + "111101" & X"002", -- 0x15F: POP R02 + "111110" & X"000", -- 0x160: RET + "111011" & X"13D", -- 0x161: CALL 0x13D + "111100" & X"000", -- 0x162: PUSH R00 + "101010" & X"000", -- 0x163: SWAP R00 + "111011" & X"174", -- 0x164: CALL 0x174 + "111101" & X"000", -- 0x165: POP R00 + "111011" & X"174", -- 0x166: CALL 0x174 + "111110" & X"000", -- 0x167: RET + "111100" & X"002", -- 0x168: PUSH R02 + "000011" & X"002", -- 0x169: MOV R02, 0x00 + "111011" & X"16D", -- 0x16A: CALL 0x16D + "111101" & X"002", -- 0x16B: POP R02 + "111110" & X"000", -- 0x16C: RET + "111011" & X"187", -- 0x16D: CALL 0x187 + "101010" & X"000", -- 0x16E: SWAP R00 + "111100" & X"000", -- 0x16F: PUSH R00 + "111011" & X"187", -- 0x170: CALL 0x187 + "111101" & X"002", -- 0x171: POP R02 + "011010" & X"020", -- 0x172: OR R00, R02 + "111110" & X"000", -- 0x173: RET + "111100" & X"001", -- 0x174: PUSH R01 + "011001" & X"0F0", -- 0x175: AND R00, 0x0F + "000010" & X"001", -- 0x176: MOV R01, R00 + "011010" & X"021", -- 0x177: OR R01, R02 + "100100" & X"031", -- 0x178: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x179: CALL 0x1EB + "000010" & X"001", -- 0x17A: MOV R01, R00 + "011010" & X"021", -- 0x17B: OR R01, R02 + "011011" & X"801", -- 0x17C: OR R01, 0x80 + "100100" & X"031", -- 0x17D: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x17E: CALL 0x1EB + "000010" & X"001", -- 0x17F: MOV R01, R00 + "011010" & X"021", -- 0x180: OR R01, R02 + "100100" & X"031", -- 0x181: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x182: CALL 0x1EB + "011011" & X"201", -- 0x183: OR R01, 0x20 + "100100" & X"031", -- 0x184: XOUT (0x03), R01 + "111101" & X"001", -- 0x185: POP R01 + "111110" & X"000", -- 0x186: RET + "111100" & X"001", -- 0x187: PUSH R01 + "000011" & X"201", -- 0x188: MOV R01, 0x20 + "011010" & X"021", -- 0x189: OR R01, R02 + "100100" & X"031", -- 0x18A: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x18B: CALL 0x1EB + "000011" & X"201", -- 0x18C: MOV R01, 0x20 + "011010" & X"021", -- 0x18D: OR R01, R02 + "011011" & X"801", -- 0x18E: OR R01, 0x80 + "100100" & X"031", -- 0x18F: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x190: CALL 0x1EB + "101000" & X"030", -- 0x191: XIN R00, (0x03) + "011001" & X"0F0", -- 0x192: AND R00, 0x0F + "000011" & X"201", -- 0x193: MOV R01, 0x20 + "011010" & X"021", -- 0x194: OR R01, R02 + "100100" & X"031", -- 0x195: XOUT (0x03), R01 + "111011" & X"1EB", -- 0x196: CALL 0x1EB + "111101" & X"001", -- 0x197: POP R01 + "111110" & X"000", -- 0x198: RET + "111100" & X"000", -- 0x199: PUSH R00 + "000011" & X"020", -- 0x19A: MOV R00, 0x02 + "100100" & X"0E0", -- 0x19B: XOUT (0x0E), R00 + "111101" & X"000", -- 0x19C: POP R00 + "111110" & X"000", -- 0x19D: RET + "111100" & X"000", -- 0x19E: PUSH R00 + "000011" & X"010", -- 0x19F: MOV R00, 0x01 + "100100" & X"0E0", -- 0x1A0: XOUT (0x0E), R00 + "111101" & X"000", -- 0x1A1: POP R00 + "111110" & X"000", -- 0x1A2: RET + "111011" & X"1B9", -- 0x1A3: CALL 0x1B9 + "100100" & X"0C1", -- 0x1A4: XOUT (0x0C), R01 + "100100" & X"0B0", -- 0x1A5: XOUT (0x0B), R00 + "111110" & X"000", -- 0x1A6: RET + "111011" & X"1B9", -- 0x1A7: CALL 0x1B9 + "100100" & X"0D0", -- 0x1A8: XOUT (0x0D), R00 + "111110" & X"000", -- 0x1A9: RET + "111100" & X"000", -- 0x1AA: PUSH R00 + "000100" & X"010", -- 0x1AB: MOVX R00, (R01) + "010001" & X"011", -- 0x1AC: INC R01 + "001111" & X"000", -- 0x1AD: TST R00 + "110001" & X"1B1", -- 0x1AE: JZ 0x1B1 + "111011" & X"1A7", -- 0x1AF: CALL 0x1A7 + "110000" & X"1AB", -- 0x1B0: JMP 0x1AB + "111101" & X"000", -- 0x1B1: POP R00 + "111110" & X"000", -- 0x1B2: RET + "111011" & X"199", -- 0x1B3: CALL 0x199 + "111011" & X"1AA", -- 0x1B4: CALL 0x1AA + "111110" & X"000", -- 0x1B5: RET + "111011" & X"1AA", -- 0x1B6: CALL 0x1AA + "111011" & X"199", -- 0x1B7: CALL 0x199 + "111110" & X"000", -- 0x1B8: RET + "111100" & X"000", -- 0x1B9: PUSH R00 + "101000" & X"0E0", -- 0x1BA: XIN R00, (0x0E) + "011001" & X"020", -- 0x1BB: AND R00, 0x02 + "110001" & X"1BA", -- 0x1BC: JZ 0x1BA + "111101" & X"000", -- 0x1BD: POP R00 + "111110" & X"000", -- 0x1BE: RET + "111100" & X"00F", -- 0x1BF: PUSH R15 + "000011" & X"0AF", -- 0x1C0: MOV R15, 0x0A + "111011" & X"1C6", -- 0x1C1: CALL 0x1C6 + "010101" & X"01F", -- 0x1C2: DEC R15 + "110010" & X"1C1", -- 0x1C3: JNZ 0x1C1 + "111101" & X"00F", -- 0x1C4: POP R15 + "111110" & X"000", -- 0x1C5: RET + "111100" & X"00F", -- 0x1C6: PUSH R15 + "000011" & X"0AF", -- 0x1C7: MOV R15, 0x0A + "111011" & X"1CD", -- 0x1C8: CALL 0x1CD + "010101" & X"01F", -- 0x1C9: DEC R15 + "110010" & X"1C8", -- 0x1CA: JNZ 0x1C8 + "111101" & X"00F", -- 0x1CB: POP R15 + "111110" & X"000", -- 0x1CC: RET + "111100" & X"00F", -- 0x1CD: PUSH R15 + "000011" & X"0AF", -- 0x1CE: MOV R15, 0x0A + "111011" & X"1D4", -- 0x1CF: CALL 0x1D4 + "010101" & X"01F", -- 0x1D0: DEC R15 + "110010" & X"1CF", -- 0x1D1: JNZ 0x1CF + "111101" & X"00F", -- 0x1D2: POP R15 + "111110" & X"000", -- 0x1D3: RET + "111100" & X"00F", -- 0x1D4: PUSH R15 + "000011" & X"0AF", -- 0x1D5: MOV R15, 0x0A + "111011" & X"1DB", -- 0x1D6: CALL 0x1DB + "010101" & X"01F", -- 0x1D7: DEC R15 + "110010" & X"1D6", -- 0x1D8: JNZ 0x1D6 + "111101" & X"00F", -- 0x1D9: POP R15 + "111110" & X"000", -- 0x1DA: RET + "111100" & X"00F", -- 0x1DB: PUSH R15 + "000011" & X"0AF", -- 0x1DC: MOV R15, 0x0A + "111011" & X"1E2", -- 0x1DD: CALL 0x1E2 + "010101" & X"01F", -- 0x1DE: DEC R15 + "110010" & X"1DD", -- 0x1DF: JNZ 0x1DD + "111101" & X"00F", -- 0x1E0: POP R15 + "111110" & X"000", -- 0x1E1: RET + "111100" & X"00F", -- 0x1E2: PUSH R15 + "000011" & X"63F", -- 0x1E3: MOV R15, 0x63 + "000000" & X"000", -- 0x1E4: NOP + "000000" & X"000", -- 0x1E5: NOP + "000000" & X"000", -- 0x1E6: NOP + "010101" & X"01F", -- 0x1E7: DEC R15 + "110010" & X"1E4", -- 0x1E8: JNZ 0x1E4 + "111101" & X"00F", -- 0x1E9: POP R15 + "111110" & X"000", -- 0x1EA: RET + "111100" & X"00F", -- 0x1EB: PUSH R15 + "000011" & X"09F", -- 0x1EC: MOV R15, 0x09 + "000000" & X"000", -- 0x1ED: NOP + "000000" & X"000", -- 0x1EE: NOP + "000000" & X"000", -- 0x1EF: NOP + "010101" & X"01F", -- 0x1F0: DEC R15 + "110010" & X"1ED", -- 0x1F1: JNZ 0x1ED + "111101" & X"00F", -- 0x1F2: POP R15 + "111110" & X"000", -- 0x1F3: RET + "111100" & X"001", -- 0x1F4: PUSH R01 + "101000" & X"061", -- 0x1F5: XIN R01, (0x06) + "011001" & X"021", -- 0x1F6: AND R01, 0x02 + "110010" & X"1F5", -- 0x1F7: JNZ 0x1F5 + "100100" & X"020", -- 0x1F8: XOUT (0x02), R00 + "111101" & X"001", -- 0x1F9: POP R01 + "111110" & X"000", -- 0x1FA: RET + "111100" & X"001", -- 0x1FB: PUSH R01 + "101000" & X"061", -- 0x1FC: XIN R01, (0x06) + "011001" & X"101", -- 0x1FD: AND R01, 0x10 + "110001" & X"1FC", -- 0x1FE: JZ 0x1FC + "101000" & X"020", -- 0x1FF: XIN R00, (0x02) + "111101" & X"001", -- 0x200: POP R01 + "111110" & X"000", -- 0x201: RET + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000" + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : inst_addr_t; + signal jtag_ld_dout : inst_t; + signal jtag_ld_din : inst_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (31 downto 0); + constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); + jtag_ld_din <= user_regi(inst_t'length-1 downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdram_test_short_irom.vhdl b/projects/cpu/src/systest/sdram_test_short_irom.vhdl new file mode 100644 index 0000000..6d7f650 --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_short_irom.vhdl @@ -0,0 +1,226 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); +END irom; + +ARCHITECTURE sdram_test_short OF irom IS + + type imem_rom_t is array (0 to 164) of inst_t; + + -- Assembled from sdram_test_short.jsm + constant imem_rom : imem_rom_t := + ( + "110000" & X"002", -- 0x000: JMP 0x002 + "111111" & X"000", -- 0x001: RETI + "000011" & X"000", -- 0x002: MOV R00, 0x00 + "100100" & X"010", -- 0x003: XOUT (0x01), R00 + "000011" & X"040", -- 0x004: MOV R00, 0x04 + "100100" & X"040", -- 0x005: XOUT (0x04), R00 + "000011" & X"000", -- 0x006: MOV R00, 0x00 + "000011" & X"801", -- 0x007: MOV R01, 0x80 + "100100" & X"100", -- 0x008: XOUT (0x10), R00 + "100100" & X"111", -- 0x009: XOUT (0x11), R01 + "100100" & X"120", -- 0x00A: XOUT (0x12), R00 + "110000" & X"026", -- 0x00B: JMP 0x026 + "111011" & X"07D", -- 0x00C: CALL 0x07D + "000011" & X"800", -- 0x00D: MOV R00, 0x80 + "000011" & X"08F", -- 0x00E: MOV R15, 0x08 + "000111" & X"000", -- 0x00F: MOVX (R00), 0x00 + "010001" & X"010", -- 0x010: INC R00 + "010101" & X"01F", -- 0x011: DEC R15 + "110010" & X"00F", -- 0x012: JNZ 0x00F + "101000" & X"080", -- 0x013: XIN R00, (0x08) + "001111" & X"400", -- 0x014: CMP R00, 0x40 + "111001" & X"025", -- 0x015: JEQ 0x025 + "000011" & X"082", -- 0x016: MOV R02, 0x08 + "101000" & X"070", -- 0x017: XIN R00, (0x07) + "100100" & X"010", -- 0x018: XOUT (0x01), R00 + "011001" & X"040", -- 0x019: AND R00, 0x04 + "110010" & X"017", -- 0x01A: JNZ 0x017 + "000011" & X"100", -- 0x01B: MOV R00, 0x10 + "100100" & X"070", -- 0x01C: XOUT (0x07), R00 + "010101" & X"022", -- 0x01D: SUB R02, 0x02 + "110010" & X"017", -- 0x01E: JNZ 0x017 + "111011" & X"072", -- 0x01F: CALL 0x072 + "000011" & X"060", -- 0x020: MOV R00, 0x06 + "100100" & X"070", -- 0x021: XOUT (0x07), R00 + "000011" & X"080", -- 0x022: MOV R00, 0x08 + "111011" & X"084", -- 0x023: CALL 0x084 + "110000" & X"013", -- 0x024: JMP 0x013 + "111011" & X"094", -- 0x025: CALL 0x094 + "111011" & X"07D", -- 0x026: CALL 0x07D + "000011" & X"000", -- 0x027: MOV R00, 0x00 + "001101" & X"000", -- 0x028: MOVC (0x00), R00 + "101000" & X"080", -- 0x029: XIN R00, (0x08) + "001111" & X"400", -- 0x02A: CMP R00, 0x40 + "111001" & X"046", -- 0x02B: JEQ 0x046 + "000011" & X"082", -- 0x02C: MOV R02, 0x08 + "001010" & X"001", -- 0x02D: MOVC R01, (0x00) + "000011" & X"800", -- 0x02E: MOV R00, 0x80 + "000011" & X"08F", -- 0x02F: MOV R15, 0x08 + "000110" & X"001", -- 0x030: MOVX (R01), R00 + "010001" & X"010", -- 0x031: INC R00 + "010001" & X"011", -- 0x032: INC R01 + "010101" & X"01F", -- 0x033: DEC R15 + "110010" & X"030", -- 0x034: JNZ 0x030 + "101000" & X"070", -- 0x035: XIN R00, (0x07) + "100100" & X"010", -- 0x036: XOUT (0x01), R00 + "011001" & X"040", -- 0x037: AND R00, 0x04 + "110010" & X"035", -- 0x038: JNZ 0x035 + "000011" & X"100", -- 0x039: MOV R00, 0x10 + "100100" & X"070", -- 0x03A: XOUT (0x07), R00 + "001010" & X"000", -- 0x03B: MOVC R00, (0x00) + "010001" & X"010", -- 0x03C: INC R00 + "001101" & X"000", -- 0x03D: MOVC (0x00), R00 + "010101" & X"022", -- 0x03E: SUB R02, 0x02 + "110010" & X"02D", -- 0x03F: JNZ 0x02D + "111011" & X"072", -- 0x040: CALL 0x072 + "000011" & X"060", -- 0x041: MOV R00, 0x06 + "100100" & X"070", -- 0x042: XOUT (0x07), R00 + "000011" & X"080", -- 0x043: MOV R00, 0x08 + "111011" & X"084", -- 0x044: CALL 0x084 + "110000" & X"029", -- 0x045: JMP 0x029 + "111011" & X"094", -- 0x046: CALL 0x094 + "111011" & X"07D", -- 0x047: CALL 0x07D + "000011" & X"000", -- 0x048: MOV R00, 0x00 + "001101" & X"000", -- 0x049: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x04A: XIN R00, (0x0A) + "001111" & X"400", -- 0x04B: CMP R00, 0x40 + "111001" & X"07A", -- 0x04C: JEQ 0x07A + "111011" & X"072", -- 0x04D: CALL 0x072 + "000011" & X"050", -- 0x04E: MOV R00, 0x05 + "100100" & X"070", -- 0x04F: XOUT (0x07), R00 + "000011" & X"083", -- 0x050: MOV R03, 0x08 + "101000" & X"070", -- 0x051: XIN R00, (0x07) + "100100" & X"010", -- 0x052: XOUT (0x01), R00 + "011001" & X"200", -- 0x053: AND R00, 0x20 + "110010" & X"051", -- 0x054: JNZ 0x051 + "001010" & X"001", -- 0x055: MOVC R01, (0x00) + "000011" & X"800", -- 0x056: MOV R00, 0x80 + "000011" & X"08F", -- 0x057: MOV R15, 0x08 + "000100" & X"002", -- 0x058: MOVX R02, (R00) + "001110" & X"012", -- 0x059: CMP R02, R01 + "111010" & X"07B", -- 0x05A: JNE 0x07B + "010001" & X"010", -- 0x05B: INC R00 + "010001" & X"011", -- 0x05C: INC R01 + "010101" & X"01F", -- 0x05D: DEC R15 + "110010" & X"058", -- 0x05E: JNZ 0x058 + "000011" & X"200", -- 0x05F: MOV R00, 0x20 + "100100" & X"070", -- 0x060: XOUT (0x07), R00 + "001010" & X"000", -- 0x061: MOVC R00, (0x00) + "010001" & X"010", -- 0x062: INC R00 + "001101" & X"000", -- 0x063: MOVC (0x00), R00 + "010101" & X"023", -- 0x064: SUB R03, 0x02 + "110010" & X"051", -- 0x065: JNZ 0x051 + "000011" & X"080", -- 0x066: MOV R00, 0x08 + "111011" & X"084", -- 0x067: CALL 0x084 + "110000" & X"04A", -- 0x068: JMP 0x04A + "111100" & X"000", -- 0x069: PUSH R00 + "000011" & X"800", -- 0x06A: MOV R00, 0x80 + "100100" & X"070", -- 0x06B: XOUT (0x07), R00 + "101000" & X"070", -- 0x06C: XIN R00, (0x07) + "100100" & X"010", -- 0x06D: XOUT (0x01), R00 + "011001" & X"800", -- 0x06E: AND R00, 0x80 + "110001" & X"06C", -- 0x06F: JZ 0x06C + "111101" & X"000", -- 0x070: POP R00 + "111110" & X"000", -- 0x071: RET + "111011" & X"069", -- 0x072: CALL 0x069 + "111100" & X"000", -- 0x073: PUSH R00 + "101000" & X"070", -- 0x074: XIN R00, (0x07) + "100100" & X"010", -- 0x075: XOUT (0x01), R00 + "011001" & X"010", -- 0x076: AND R00, 0x01 + "110010" & X"074", -- 0x077: JNZ 0x074 + "111101" & X"000", -- 0x078: POP R00 + "111110" & X"000", -- 0x079: RET + "110000" & X"07C", -- 0x07A: JMP 0x07C + "110000" & X"07C", -- 0x07B: JMP 0x07C + "110000" & X"00C", -- 0x07C: JMP 0x00C + "111100" & X"000", -- 0x07D: PUSH R00 + "000011" & X"000", -- 0x07E: MOV R00, 0x00 + "100100" & X"080", -- 0x07F: XOUT (0x08), R00 + "100100" & X"090", -- 0x080: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x081: XOUT (0x0A), R00 + "111101" & X"000", -- 0x082: POP R00 + "111110" & X"000", -- 0x083: RET + "111100" & X"001", -- 0x084: PUSH R01 + "111100" & X"002", -- 0x085: PUSH R02 + "111100" & X"003", -- 0x086: PUSH R03 + "101000" & X"081", -- 0x087: XIN R01, (0x08) + "101000" & X"092", -- 0x088: XIN R02, (0x09) + "101000" & X"0A3", -- 0x089: XIN R03, (0x0A) + "010000" & X"001", -- 0x08A: ADD R01, R00 + "010011" & X"002", -- 0x08B: ADDC R02, 0x00 + "010011" & X"003", -- 0x08C: ADDC R03, 0x00 + "100100" & X"081", -- 0x08D: XOUT (0x08), R01 + "100100" & X"092", -- 0x08E: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x08F: XOUT (0x0A), R03 + "111101" & X"003", -- 0x090: POP R03 + "111101" & X"002", -- 0x091: POP R02 + "111101" & X"001", -- 0x092: POP R01 + "111110" & X"000", -- 0x093: RET + "111110" & X"000", -- 0x094: RET + "111110" & X"000", -- 0x095: RET + "111110" & X"000", -- 0x096: RET + "111110" & X"000", -- 0x097: RET + "011001" & X"0F0", -- 0x098: AND R00, 0x0F + "001111" & X"0A0", -- 0x099: CMP R00, 0x0A + "110101" & X"09C", -- 0x09A: JLT 0x09C + "010001" & X"070", -- 0x09B: ADD R00, 0x07 + "010001" & X"300", -- 0x09C: ADD R00, 0x30 + "111110" & X"000", -- 0x09D: RET + "111100" & X"000", -- 0x09E: PUSH R00 + "111011" & X"098", -- 0x09F: CALL 0x098 + "000010" & X"001", -- 0x0A0: MOV R01, R00 + "111101" & X"000", -- 0x0A1: POP R00 + "101010" & X"000", -- 0x0A2: SWAP R00 + "111011" & X"098", -- 0x0A3: CALL 0x098 + "111110" & X"000" -- 0x0A4: RET + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +end sdram_test_short; + diff --git a/projects/cpu/src/systest/sdram_test_short_irom_ld.vhdl b/projects/cpu/src/systest/sdram_test_short_irom_ld.vhdl new file mode 100644 index 0000000..788968e --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_short_irom_ld.vhdl @@ -0,0 +1,1181 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + +END irom; + +ARCHITECTURE loadable OF irom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdram_test_short.jsm + type imem_rom_t is array (0 to 1023) of inst_t; + signal imem_rom : imem_rom_t := + ( + "110000" & X"002", -- 0x000: JMP 0x002 + "111111" & X"000", -- 0x001: RETI + "000011" & X"000", -- 0x002: MOV R00, 0x00 + "100100" & X"010", -- 0x003: XOUT (0x01), R00 + "000011" & X"040", -- 0x004: MOV R00, 0x04 + "100100" & X"040", -- 0x005: XOUT (0x04), R00 + "000011" & X"000", -- 0x006: MOV R00, 0x00 + "000011" & X"801", -- 0x007: MOV R01, 0x80 + "100100" & X"100", -- 0x008: XOUT (0x10), R00 + "100100" & X"111", -- 0x009: XOUT (0x11), R01 + "100100" & X"120", -- 0x00A: XOUT (0x12), R00 + "110000" & X"026", -- 0x00B: JMP 0x026 + "111011" & X"07D", -- 0x00C: CALL 0x07D + "000011" & X"800", -- 0x00D: MOV R00, 0x80 + "000011" & X"08F", -- 0x00E: MOV R15, 0x08 + "000111" & X"000", -- 0x00F: MOVX (R00), 0x00 + "010001" & X"010", -- 0x010: INC R00 + "010101" & X"01F", -- 0x011: DEC R15 + "110010" & X"00F", -- 0x012: JNZ 0x00F + "101000" & X"080", -- 0x013: XIN R00, (0x08) + "001111" & X"400", -- 0x014: CMP R00, 0x40 + "111001" & X"025", -- 0x015: JEQ 0x025 + "000011" & X"082", -- 0x016: MOV R02, 0x08 + "101000" & X"070", -- 0x017: XIN R00, (0x07) + "100100" & X"010", -- 0x018: XOUT (0x01), R00 + "011001" & X"040", -- 0x019: AND R00, 0x04 + "110010" & X"017", -- 0x01A: JNZ 0x017 + "000011" & X"100", -- 0x01B: MOV R00, 0x10 + "100100" & X"070", -- 0x01C: XOUT (0x07), R00 + "010101" & X"022", -- 0x01D: SUB R02, 0x02 + "110010" & X"017", -- 0x01E: JNZ 0x017 + "111011" & X"072", -- 0x01F: CALL 0x072 + "000011" & X"060", -- 0x020: MOV R00, 0x06 + "100100" & X"070", -- 0x021: XOUT (0x07), R00 + "000011" & X"080", -- 0x022: MOV R00, 0x08 + "111011" & X"084", -- 0x023: CALL 0x084 + "110000" & X"013", -- 0x024: JMP 0x013 + "111011" & X"094", -- 0x025: CALL 0x094 + "111011" & X"07D", -- 0x026: CALL 0x07D + "000011" & X"000", -- 0x027: MOV R00, 0x00 + "001101" & X"000", -- 0x028: MOVC (0x00), R00 + "101000" & X"080", -- 0x029: XIN R00, (0x08) + "001111" & X"400", -- 0x02A: CMP R00, 0x40 + "111001" & X"046", -- 0x02B: JEQ 0x046 + "000011" & X"082", -- 0x02C: MOV R02, 0x08 + "001010" & X"001", -- 0x02D: MOVC R01, (0x00) + "000011" & X"800", -- 0x02E: MOV R00, 0x80 + "000011" & X"08F", -- 0x02F: MOV R15, 0x08 + "000110" & X"001", -- 0x030: MOVX (R01), R00 + "010001" & X"010", -- 0x031: INC R00 + "010001" & X"011", -- 0x032: INC R01 + "010101" & X"01F", -- 0x033: DEC R15 + "110010" & X"030", -- 0x034: JNZ 0x030 + "101000" & X"070", -- 0x035: XIN R00, (0x07) + "100100" & X"010", -- 0x036: XOUT (0x01), R00 + "011001" & X"040", -- 0x037: AND R00, 0x04 + "110010" & X"035", -- 0x038: JNZ 0x035 + "000011" & X"100", -- 0x039: MOV R00, 0x10 + "100100" & X"070", -- 0x03A: XOUT (0x07), R00 + "001010" & X"000", -- 0x03B: MOVC R00, (0x00) + "010001" & X"010", -- 0x03C: INC R00 + "001101" & X"000", -- 0x03D: MOVC (0x00), R00 + "010101" & X"022", -- 0x03E: SUB R02, 0x02 + "110010" & X"02D", -- 0x03F: JNZ 0x02D + "111011" & X"072", -- 0x040: CALL 0x072 + "000011" & X"060", -- 0x041: MOV R00, 0x06 + "100100" & X"070", -- 0x042: XOUT (0x07), R00 + "000011" & X"080", -- 0x043: MOV R00, 0x08 + "111011" & X"084", -- 0x044: CALL 0x084 + "110000" & X"029", -- 0x045: JMP 0x029 + "111011" & X"094", -- 0x046: CALL 0x094 + "111011" & X"07D", -- 0x047: CALL 0x07D + "000011" & X"000", -- 0x048: MOV R00, 0x00 + "001101" & X"000", -- 0x049: MOVC (0x00), R00 + "101000" & X"0A0", -- 0x04A: XIN R00, (0x0A) + "001111" & X"400", -- 0x04B: CMP R00, 0x40 + "111001" & X"07A", -- 0x04C: JEQ 0x07A + "111011" & X"072", -- 0x04D: CALL 0x072 + "000011" & X"050", -- 0x04E: MOV R00, 0x05 + "100100" & X"070", -- 0x04F: XOUT (0x07), R00 + "000011" & X"083", -- 0x050: MOV R03, 0x08 + "101000" & X"070", -- 0x051: XIN R00, (0x07) + "100100" & X"010", -- 0x052: XOUT (0x01), R00 + "011001" & X"200", -- 0x053: AND R00, 0x20 + "110010" & X"051", -- 0x054: JNZ 0x051 + "001010" & X"001", -- 0x055: MOVC R01, (0x00) + "000011" & X"800", -- 0x056: MOV R00, 0x80 + "000011" & X"08F", -- 0x057: MOV R15, 0x08 + "000100" & X"002", -- 0x058: MOVX R02, (R00) + "001110" & X"012", -- 0x059: CMP R02, R01 + "111010" & X"07B", -- 0x05A: JNE 0x07B + "010001" & X"010", -- 0x05B: INC R00 + "010001" & X"011", -- 0x05C: INC R01 + "010101" & X"01F", -- 0x05D: DEC R15 + "110010" & X"058", -- 0x05E: JNZ 0x058 + "000011" & X"200", -- 0x05F: MOV R00, 0x20 + "100100" & X"070", -- 0x060: XOUT (0x07), R00 + "001010" & X"000", -- 0x061: MOVC R00, (0x00) + "010001" & X"010", -- 0x062: INC R00 + "001101" & X"000", -- 0x063: MOVC (0x00), R00 + "010101" & X"023", -- 0x064: SUB R03, 0x02 + "110010" & X"051", -- 0x065: JNZ 0x051 + "000011" & X"080", -- 0x066: MOV R00, 0x08 + "111011" & X"084", -- 0x067: CALL 0x084 + "110000" & X"04A", -- 0x068: JMP 0x04A + "111100" & X"000", -- 0x069: PUSH R00 + "000011" & X"800", -- 0x06A: MOV R00, 0x80 + "100100" & X"070", -- 0x06B: XOUT (0x07), R00 + "101000" & X"070", -- 0x06C: XIN R00, (0x07) + "100100" & X"010", -- 0x06D: XOUT (0x01), R00 + "011001" & X"800", -- 0x06E: AND R00, 0x80 + "110001" & X"06C", -- 0x06F: JZ 0x06C + "111101" & X"000", -- 0x070: POP R00 + "111110" & X"000", -- 0x071: RET + "111011" & X"069", -- 0x072: CALL 0x069 + "111100" & X"000", -- 0x073: PUSH R00 + "101000" & X"070", -- 0x074: XIN R00, (0x07) + "100100" & X"010", -- 0x075: XOUT (0x01), R00 + "011001" & X"010", -- 0x076: AND R00, 0x01 + "110010" & X"074", -- 0x077: JNZ 0x074 + "111101" & X"000", -- 0x078: POP R00 + "111110" & X"000", -- 0x079: RET + "110000" & X"07C", -- 0x07A: JMP 0x07C + "110000" & X"07C", -- 0x07B: JMP 0x07C + "110000" & X"00C", -- 0x07C: JMP 0x00C + "111100" & X"000", -- 0x07D: PUSH R00 + "000011" & X"000", -- 0x07E: MOV R00, 0x00 + "100100" & X"080", -- 0x07F: XOUT (0x08), R00 + "100100" & X"090", -- 0x080: XOUT (0x09), R00 + "100100" & X"0A0", -- 0x081: XOUT (0x0A), R00 + "111101" & X"000", -- 0x082: POP R00 + "111110" & X"000", -- 0x083: RET + "111100" & X"001", -- 0x084: PUSH R01 + "111100" & X"002", -- 0x085: PUSH R02 + "111100" & X"003", -- 0x086: PUSH R03 + "101000" & X"081", -- 0x087: XIN R01, (0x08) + "101000" & X"092", -- 0x088: XIN R02, (0x09) + "101000" & X"0A3", -- 0x089: XIN R03, (0x0A) + "010000" & X"001", -- 0x08A: ADD R01, R00 + "010011" & X"002", -- 0x08B: ADDC R02, 0x00 + "010011" & X"003", -- 0x08C: ADDC R03, 0x00 + "100100" & X"081", -- 0x08D: XOUT (0x08), R01 + "100100" & X"092", -- 0x08E: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x08F: XOUT (0x0A), R03 + "111101" & X"003", -- 0x090: POP R03 + "111101" & X"002", -- 0x091: POP R02 + "111101" & X"001", -- 0x092: POP R01 + "111110" & X"000", -- 0x093: RET + "111110" & X"000", -- 0x094: RET + "111110" & X"000", -- 0x095: RET + "111110" & X"000", -- 0x096: RET + "111110" & X"000", -- 0x097: RET + "011001" & X"0F0", -- 0x098: AND R00, 0x0F + "001111" & X"0A0", -- 0x099: CMP R00, 0x0A + "110101" & X"09C", -- 0x09A: JLT 0x09C + "010001" & X"070", -- 0x09B: ADD R00, 0x07 + "010001" & X"300", -- 0x09C: ADD R00, 0x30 + "111110" & X"000", -- 0x09D: RET + "111100" & X"000", -- 0x09E: PUSH R00 + "111011" & X"098", -- 0x09F: CALL 0x098 + "000010" & X"001", -- 0x0A0: MOV R01, R00 + "111101" & X"000", -- 0x0A1: POP R00 + "101010" & X"000", -- 0x0A2: SWAP R00 + "111011" & X"098", -- 0x0A3: CALL 0x098 + "111110" & X"000", -- 0x0A4: RET + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000" + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : inst_addr_t; + signal jtag_ld_dout : inst_t; + signal jtag_ld_din : inst_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (31 downto 0); + constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); + jtag_ld_din <= user_regi(inst_t'length-1 downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdram_test_short_xrom.vhdl b/projects/cpu/src/systest/sdram_test_short_xrom.vhdl new file mode 100644 index 0000000..a1abe9f --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_short_xrom.vhdl @@ -0,0 +1,317 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); +END xrom; + +ARCHITECTURE sdram_test_short OF xrom IS + + type xmem_rom_t is array (0 to 255) of dmem_data_t; + + -- Assembled from sdram_test_short.jsm + constant xmem_rom : xmem_rom_t := + ( + X"0D", -- 0x00 + X"0A", -- 0x01 + X"00", -- 0x02 + X"53", -- 0x03 + X"44", -- 0x04 + X"52", -- 0x05 + X"41", -- 0x06 + X"4D", -- 0x07 + X"20", -- 0x08 + X"54", -- 0x09 + X"65", -- 0x0A + X"73", -- 0x0B + X"74", -- 0x0C + X"00", -- 0x0D + X"43", -- 0x0E + X"6C", -- 0x0F + X"65", -- 0x10 + X"61", -- 0x11 + X"72", -- 0x12 + X"69", -- 0x13 + X"6E", -- 0x14 + X"67", -- 0x15 + X"20", -- 0x16 + X"53", -- 0x17 + X"44", -- 0x18 + X"52", -- 0x19 + X"41", -- 0x1A + X"4D", -- 0x1B + X"00", -- 0x1C + X"57", -- 0x1D + X"72", -- 0x1E + X"69", -- 0x1F + X"74", -- 0x20 + X"69", -- 0x21 + X"6E", -- 0x22 + X"67", -- 0x23 + X"20", -- 0x24 + X"53", -- 0x25 + X"44", -- 0x26 + X"52", -- 0x27 + X"41", -- 0x28 + X"4D", -- 0x29 + X"00", -- 0x2A + X"52", -- 0x2B + X"65", -- 0x2C + X"61", -- 0x2D + X"64", -- 0x2E + X"69", -- 0x2F + X"6E", -- 0x30 + X"67", -- 0x31 + X"20", -- 0x32 + X"53", -- 0x33 + X"44", -- 0x34 + X"52", -- 0x35 + X"41", -- 0x36 + X"4D", -- 0x37 + X"00", -- 0x38 + X"56", -- 0x39 + X"65", -- 0x3A + X"72", -- 0x3B + X"69", -- 0x3C + X"66", -- 0x3D + X"79", -- 0x3E + X"20", -- 0x3F + X"4F", -- 0x40 + X"4B", -- 0x41 + X"00", -- 0x42 + X"46", -- 0x43 + X"61", -- 0x44 + X"69", -- 0x45 + X"6C", -- 0x46 + X"65", -- 0x47 + X"64", -- 0x48 + X"20", -- 0x49 + X"61", -- 0x4A + X"74", -- 0x4B + X"20", -- 0x4C + X"00", -- 0x4D + X"2E", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +end sdram_test_short; + diff --git a/projects/cpu/src/systest/sdram_test_short_xrom_ld.vhdl b/projects/cpu/src/systest/sdram_test_short_xrom_ld.vhdl new file mode 100644 index 0000000..fbee0fd --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_short_xrom_ld.vhdl @@ -0,0 +1,413 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + +END xrom; + +ARCHITECTURE loadable OF xrom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdram_test_short.jsm + type xmem_rom_t is array (0 to 255) of dmem_data_t; + signal xmem_rom : xmem_rom_t := + ( + X"0D", -- 0x00 + X"0A", -- 0x01 + X"00", -- 0x02 + X"53", -- 0x03 + X"44", -- 0x04 + X"52", -- 0x05 + X"41", -- 0x06 + X"4D", -- 0x07 + X"20", -- 0x08 + X"54", -- 0x09 + X"65", -- 0x0A + X"73", -- 0x0B + X"74", -- 0x0C + X"00", -- 0x0D + X"43", -- 0x0E + X"6C", -- 0x0F + X"65", -- 0x10 + X"61", -- 0x11 + X"72", -- 0x12 + X"69", -- 0x13 + X"6E", -- 0x14 + X"67", -- 0x15 + X"20", -- 0x16 + X"53", -- 0x17 + X"44", -- 0x18 + X"52", -- 0x19 + X"41", -- 0x1A + X"4D", -- 0x1B + X"00", -- 0x1C + X"57", -- 0x1D + X"72", -- 0x1E + X"69", -- 0x1F + X"74", -- 0x20 + X"69", -- 0x21 + X"6E", -- 0x22 + X"67", -- 0x23 + X"20", -- 0x24 + X"53", -- 0x25 + X"44", -- 0x26 + X"52", -- 0x27 + X"41", -- 0x28 + X"4D", -- 0x29 + X"00", -- 0x2A + X"52", -- 0x2B + X"65", -- 0x2C + X"61", -- 0x2D + X"64", -- 0x2E + X"69", -- 0x2F + X"6E", -- 0x30 + X"67", -- 0x31 + X"20", -- 0x32 + X"53", -- 0x33 + X"44", -- 0x34 + X"52", -- 0x35 + X"41", -- 0x36 + X"4D", -- 0x37 + X"00", -- 0x38 + X"56", -- 0x39 + X"65", -- 0x3A + X"72", -- 0x3B + X"69", -- 0x3C + X"66", -- 0x3D + X"79", -- 0x3E + X"20", -- 0x3F + X"4F", -- 0x40 + X"4B", -- 0x41 + X"00", -- 0x42 + X"46", -- 0x43 + X"61", -- 0x44 + X"69", -- 0x45 + X"6C", -- 0x46 + X"65", -- 0x47 + X"64", -- 0x48 + X"20", -- 0x49 + X"61", -- 0x4A + X"74", -- 0x4B + X"20", -- 0x4C + X"00", -- 0x4D + X"2E", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : dmem_addr_t; + signal jtag_ld_dout : dmem_data_t; + signal jtag_ld_din : dmem_data_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (15 downto 0); + constant id : unsigned (15 downto 0) := X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); + jtag_ld_din <= user_regi(dmem_data_t'left downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/sdram_test_xrom.vhdl b/projects/cpu/src/systest/sdram_test_xrom.vhdl new file mode 100644 index 0000000..70009b2 --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_xrom.vhdl @@ -0,0 +1,317 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); +END xrom; + +ARCHITECTURE sdram_test OF xrom IS + + type xmem_rom_t is array (0 to 255) of dmem_data_t; + + -- Assembled from sdram_test.jsm + constant xmem_rom : xmem_rom_t := + ( + X"0D", -- 0x00 + X"0A", -- 0x01 + X"00", -- 0x02 + X"53", -- 0x03 + X"44", -- 0x04 + X"52", -- 0x05 + X"41", -- 0x06 + X"4D", -- 0x07 + X"20", -- 0x08 + X"54", -- 0x09 + X"65", -- 0x0A + X"73", -- 0x0B + X"74", -- 0x0C + X"00", -- 0x0D + X"43", -- 0x0E + X"6C", -- 0x0F + X"65", -- 0x10 + X"61", -- 0x11 + X"72", -- 0x12 + X"69", -- 0x13 + X"6E", -- 0x14 + X"67", -- 0x15 + X"20", -- 0x16 + X"53", -- 0x17 + X"44", -- 0x18 + X"52", -- 0x19 + X"41", -- 0x1A + X"4D", -- 0x1B + X"00", -- 0x1C + X"57", -- 0x1D + X"72", -- 0x1E + X"69", -- 0x1F + X"74", -- 0x20 + X"69", -- 0x21 + X"6E", -- 0x22 + X"67", -- 0x23 + X"20", -- 0x24 + X"53", -- 0x25 + X"44", -- 0x26 + X"52", -- 0x27 + X"41", -- 0x28 + X"4D", -- 0x29 + X"00", -- 0x2A + X"52", -- 0x2B + X"65", -- 0x2C + X"61", -- 0x2D + X"64", -- 0x2E + X"69", -- 0x2F + X"6E", -- 0x30 + X"67", -- 0x31 + X"20", -- 0x32 + X"53", -- 0x33 + X"44", -- 0x34 + X"52", -- 0x35 + X"41", -- 0x36 + X"4D", -- 0x37 + X"00", -- 0x38 + X"56", -- 0x39 + X"65", -- 0x3A + X"72", -- 0x3B + X"69", -- 0x3C + X"66", -- 0x3D + X"79", -- 0x3E + X"20", -- 0x3F + X"4F", -- 0x40 + X"4B", -- 0x41 + X"00", -- 0x42 + X"46", -- 0x43 + X"61", -- 0x44 + X"69", -- 0x45 + X"6C", -- 0x46 + X"65", -- 0x47 + X"64", -- 0x48 + X"20", -- 0x49 + X"61", -- 0x4A + X"74", -- 0x4B + X"20", -- 0x4C + X"00", -- 0x4D + X"2E", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +end sdram_test; + diff --git a/projects/cpu/src/systest/sdram_test_xrom_ld.vhdl b/projects/cpu/src/systest/sdram_test_xrom_ld.vhdl new file mode 100644 index 0000000..4c413ef --- /dev/null +++ b/projects/cpu/src/systest/sdram_test_xrom_ld.vhdl @@ -0,0 +1,413 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + +END xrom; + +ARCHITECTURE loadable OF xrom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from sdram_test.jsm + type xmem_rom_t is array (0 to 255) of dmem_data_t; + signal xmem_rom : xmem_rom_t := + ( + X"0D", -- 0x00 + X"0A", -- 0x01 + X"00", -- 0x02 + X"53", -- 0x03 + X"44", -- 0x04 + X"52", -- 0x05 + X"41", -- 0x06 + X"4D", -- 0x07 + X"20", -- 0x08 + X"54", -- 0x09 + X"65", -- 0x0A + X"73", -- 0x0B + X"74", -- 0x0C + X"00", -- 0x0D + X"43", -- 0x0E + X"6C", -- 0x0F + X"65", -- 0x10 + X"61", -- 0x11 + X"72", -- 0x12 + X"69", -- 0x13 + X"6E", -- 0x14 + X"67", -- 0x15 + X"20", -- 0x16 + X"53", -- 0x17 + X"44", -- 0x18 + X"52", -- 0x19 + X"41", -- 0x1A + X"4D", -- 0x1B + X"00", -- 0x1C + X"57", -- 0x1D + X"72", -- 0x1E + X"69", -- 0x1F + X"74", -- 0x20 + X"69", -- 0x21 + X"6E", -- 0x22 + X"67", -- 0x23 + X"20", -- 0x24 + X"53", -- 0x25 + X"44", -- 0x26 + X"52", -- 0x27 + X"41", -- 0x28 + X"4D", -- 0x29 + X"00", -- 0x2A + X"52", -- 0x2B + X"65", -- 0x2C + X"61", -- 0x2D + X"64", -- 0x2E + X"69", -- 0x2F + X"6E", -- 0x30 + X"67", -- 0x31 + X"20", -- 0x32 + X"53", -- 0x33 + X"44", -- 0x34 + X"52", -- 0x35 + X"41", -- 0x36 + X"4D", -- 0x37 + X"00", -- 0x38 + X"56", -- 0x39 + X"65", -- 0x3A + X"72", -- 0x3B + X"69", -- 0x3C + X"66", -- 0x3D + X"79", -- 0x3E + X"20", -- 0x3F + X"4F", -- 0x40 + X"4B", -- 0x41 + X"00", -- 0x42 + X"46", -- 0x43 + X"61", -- 0x44 + X"69", -- 0x45 + X"6C", -- 0x46 + X"65", -- 0x47 + X"64", -- 0x48 + X"20", -- 0x49 + X"61", -- 0x4A + X"74", -- 0x4B + X"20", -- 0x4C + X"00", -- 0x4D + X"2E", -- 0x4E + X"00", -- 0x4F + X"00", -- 0x50 + X"00", -- 0x51 + X"00", -- 0x52 + X"00", -- 0x53 + X"00", -- 0x54 + X"00", -- 0x55 + X"00", -- 0x56 + X"00", -- 0x57 + X"00", -- 0x58 + X"00", -- 0x59 + X"00", -- 0x5A + X"00", -- 0x5B + X"00", -- 0x5C + X"00", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : dmem_addr_t; + signal jtag_ld_dout : dmem_data_t; + signal jtag_ld_din : dmem_data_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (15 downto 0); + constant id : unsigned (15 downto 0) := X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); + jtag_ld_din <= user_regi(dmem_data_t'left downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/systest.bak.vhd b/projects/cpu/src/systest/systest.bak.vhd new file mode 100644 index 0000000..c6defd8 --- /dev/null +++ b/projects/cpu/src/systest/systest.bak.vhd @@ -0,0 +1,1099 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: system test using Xilinx ML-402 + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; +use std.textio.all; -- Imports the standard textio package. + +Library UNISIM; +use UNISIM.vcomponents.all; + +library work; +use work.cpu_pkg.all; +use work.vga_types.all; +use work.fifo_ctrl_pkg.all; +use work.sdram_config.all; +use work.sdram_types.all; + +ENTITY systest IS +GENERIC +( + sys_freq : integer := 100E6; + ddr_phaseshift : integer := 0; + ddr_frequency_hz : integer := 100E6; + tsvga : vga_timespec_t := ts_vga_1280_1024_72 +); +PORT +( + sys_rst_n_in : in std_logic; + sys_clk_in : in std_logic; + + -- Buttons and LEDs + sys_btn : in unsigned(4 downto 0); + sys_dip : in unsigned(7 downto 0); + sys_led : out unsigned(8 downto 0); + + -- UART + sys_rx : in std_logic; + sys_tx : out std_logic; + + -- LCD + sys_lcd_d : inout unsigned(3 downto 0); + sys_lcd_e : out std_logic; + sys_lcd_rs : out std_logic; + sys_lcd_rw : out std_logic; + + -- DDR SDRAM + sys_sdr_clk_p : out std_logic; -- ddr_sdram_clock + sys_sdr_clk_n : out std_logic; -- /ddr_sdram_clock + sys_sdr_cke_q : out std_logic; -- clock enable + sys_sdr_cs_qn : out std_logic; -- /chip select + sys_sdr_ras_qn : out std_logic; -- /ras + sys_sdr_cas_qn : out std_logic; -- /cas + sys_sdr_we_qn : out std_logic; -- /write enable + sys_sdr_dm_q : out unsigned(DDR_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" + sys_sdr_dqs_q : inout unsigned(DDR_DQS_WIDTH-1 downto 0); -- data strobe, only for write + sys_sdr_ba_q : out unsigned(DDR_BANK_WIDTH-1 downto 0); -- bank select + sys_sdr_a_q : out unsigned(DDR_ADDR_WIDTH-1 downto 0); -- address bus + sys_sdr_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0); -- bidir data bus + sys_sdr_clk_fb : in std_logic; + + -- VGA + sys_vga_red : out unsigned(7 downto 0); + sys_vga_green : out unsigned(7 downto 0); + sys_vga_blue : out unsigned(7 downto 0); + sys_vga_blank_n : out std_logic; + sys_vga_sync_n : out std_logic; + sys_vga_hsync : out std_logic; + sys_vga_vsync : out std_logic; + sys_vga_clk : out std_logic; + + sys_error : out unsigned(1 downto 0) -- indicates Errors + +); +-- attribute BUFFER_TYPE : string; +-- attribute BUFFER_TYPE of sys_clk_in : signal is "BUFG"; +-- attribute BUFFER_TYPE of sys_sdr_dcm_clk_fb : signal is "BUFG"; + +END systest; + +ARCHITECTURE behavior OF systest IS + + COMPONENT cpu_embedded + Port ( + rst : in STD_LOGIC; + clk : in STD_LOGIC; + ce : in STD_LOGIC; + int_in : in STD_LOGIC; + int_ack : out STD_LOGIC; + xmem_we : out STD_LOGIC; + xmem_re : out STD_LOGIC; + xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_addr : out unsigned (DMEM_ADDR_WIDTH-1 downto 0); + io_sel : out STD_LOGIC + ); + END COMPONENT; + + COMPONENT xrom + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + END COMPONENT; + + COMPONENT lcd_port + PORT ( + rst : in std_logic; + clk : in std_logic; + we : in std_logic; + din : in unsigned(7 downto 0); + dout : out unsigned(7 downto 0); + lcd_d : inout unsigned(3 downto 0); + lcd_e : out std_logic; + lcd_rs : out std_logic; + lcd_rw : out std_logic + ); + END COMPONENT; + +-- +-- declaration of UART transmitter with integral 16 byte FIFO buffer +-- + component uart_tx + Port ( data_in : in std_logic_vector(7 downto 0); + write_buffer : in std_logic; + reset_buffer : in std_logic; + en_16_x_baud : in std_logic; + serial_out : out std_logic; + buffer_full : out std_logic; + buffer_half_full : out std_logic; + clk : in std_logic); + end component; +-- +-- declaration of UART Receiver with integral 16 byte FIFO buffer +-- + component uart_rx + Port ( serial_in : in std_logic; + data_out : out std_logic_vector(7 downto 0); + read_buffer : in std_logic; + reset_buffer : in std_logic; + en_16_x_baud : in std_logic; + buffer_data_present : out std_logic; + buffer_full : out std_logic; + buffer_half_full : out std_logic; + clk : in std_logic); + end component; + + signal rst : std_logic; + signal rst_in : std_logic; + signal started_up : std_logic := '1'; + signal clk : std_logic; + signal int_in, int_ack, int_en, io_sel, int_force : std_logic; + + signal cpu_baudrate : dmem_data_t; + signal cpu_din : dmem_data_t; + signal cpu_dout : dmem_data_t; + signal cpu_addr : dmem_addr_t; + signal cpu_we : std_logic; + signal cpu_re : std_logic; + signal ctrl_reg : dmem_data_t; + signal led_reg : dmem_data_t; + signal cpu_lcd_out_reg, cpu_lcd_in_reg, reg_uart_tx: dmem_data_t; + signal cpu_lcd_we : std_logic; + signal cpu_sdr_buf_we, cpu_sdr_valid : std_logic; + signal cpu_color : color_t; + signal cpu_vga_enable : std_logic; + signal cpu_error_leds : unsigned(1 downto 0); + -- + -- Signals for connection of peripherals + -- + signal uart_status_port : dmem_data_t; + -- + -- Signals to form an timer generating an interrupt every microsecond + -- + constant timer_reload : integer := 99999; + signal timer_count : integer range 0 to 99999 :=0; + signal timer_pulse, timer_en : std_logic; + -- + -- Signals for UART connections + -- + signal baud_count : integer range 0 to 255 :=0; + signal en_16_x_baud : std_logic; + signal write_to_uart : std_logic; + signal tx_full : std_logic; + signal tx_half_full : std_logic; + signal read_from_uart : std_logic; + signal rx_data : std_logic_vector(7 downto 0); + signal rx_data_present : std_logic; + signal rx_full : std_logic; + signal rx_half_full : std_logic; + + -- X-ROM + signal xrom_data : dmem_data_t; + signal sdr_data : dmem_data_t; + + -- DDR SDRAM + constant BURST_LEN : natural := 8; + subtype sdr_buf_t is unsigned(SDR_DATA_WIDTH-1 downto 0); + signal sdr_buf_in, sdr_vga_data : sdr_buf_t := (others => '0'); + signal cpu_sd_ack : std_logic; + + signal cpu_sd_request_strobe : std_logic; + signal sdr_tag_in : user_tag_t; + signal sdr_tag_wr : user_tag_t; + signal sdr_tag_rd : user_tag_t; + signal sdr_ucmd : user_cmd_t; + signal cpu_sd_cmd : user_cmd_t; + signal cpu_sd_cmd_we : std_logic; + signal sdr_ucmd_vld : std_logic; + signal cpu_sdr_addr : user_addr_t; + signal cpu_vga_read_offset : user_addr_t; + signal sdr_addr : user_addr_t; + signal sdr_busy_q : std_logic; + signal sdr_udata_in : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal sdr_udata_req_wr : std_logic; + signal sdr_udata_out_q : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal sdr_udata_vld_q : std_logic; + + signal cmd_fifo_din : unsigned(29 downto 0); + signal cmd_fifo_dout : unsigned(29 downto 0); + signal cmd_fifo_re : std_logic; + signal cmd_fifo_we : std_logic; + signal cmd_fifo_full : std_logic; + signal cmd_fifo_empty : std_logic; + + signal cpu_write_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_write_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_write_fifo_re : std_logic; + signal cpu_write_fifo_we : std_logic; + signal cpu_write_fifo_full : std_logic; + signal cpu_write_fifo_empty : std_logic; + + signal cpu_read_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_read_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_read_fifo_re : std_logic; + signal cpu_read_fifo_we : std_logic; + signal cpu_read_fifo_full : std_logic; + signal cpu_read_fifo_empty : std_logic; + + alias tag_fifo_in is cmd_fifo_din(29 downto 26); + alias cmd_fifo_in is cmd_fifo_din(25 downto 24); + alias addr_fifo_in is cmd_fifo_din(23 downto 0); + alias tag_fifo_out is cmd_fifo_dout(29 downto 26); + alias cmd_fifo_out is cmd_fifo_dout(25 downto 24); + alias addr_fifo_out is cmd_fifo_dout(23 downto 0); + +-- attribute rom_style: string; +-- attribute rom_style of cmd_fifo_dout: signal is "DISTRIBUTED"; +-- attribute rom_style of cpu_cpu_write_fifo_dout: signal is "DISTRIBUTED"; +-- attribute rom_style of cpu_read_fifo_dout: signal is "DISTRIBUTED"; + + -- VGA + signal vga_clk : std_logic; + signal vga_ready : std_logic; + signal vga_color_w : color_t; + signal vga_color : color_t; + signal vga_color_we : std_logic; + signal vga_fifo_full : std_logic; + signal vga_fifo_almost_full : std_logic; + signal vga_hsync : std_logic; + signal vga_vsync : std_logic; + signal vga_pos_x : natural range 0 to tsvga.ts_h.ncyc_scan-1; + signal vga_pos_y : natural range 0 to tsvga.ts_v.ncyc_scan-1; + signal vga_scan_x : std_logic; + signal vga_scan_y : std_logic; + signal vga_scan_rdy : std_logic; + signal vga_scan_rdy_h : std_logic; + signal vga_scan_rdy_v : std_logic; + signal vga_active : std_logic; + + type vga_cmd_state_t is (vga_cmd_s_init, vga_cmd_s_idle, vga_cmd_s_request, vga_cmd_s_access); + signal vga_cmd_s, vga_cmd_sn : vga_cmd_state_t; + + type vga_data_state_t is (vga_data_s_init, vga_data_s_idle, vga_data_s_read1, vga_data_s_read2); + signal vga_data_s, vga_data_sn : vga_data_state_t; + + type sd_ctrl_state_t is (s_sd_idle, s_sd_vga_access_grant, s_sd_vga_access, s_sd_cpu_access_grant, s_sd_cpu_access); + signal st, stn : sd_ctrl_state_t; + + signal sd_vga_access : std_logic; + signal sd_cpu_access : std_logic; + signal sd_vga_request : std_logic; + signal sd_cpu_request : std_logic; + + -- Character generator + signal cg_rst : std_logic; + signal cg_en : std_logic; + signal cg_ready : std_logic; + signal cg_clr_screen : std_logic; + signal cg_clr_line : std_logic; + signal cg_ascii_data : dmem_data_t; + signal cg_ascii_data_we : std_logic; + signal cg_ascii_posy_we : std_logic; + signal cg_ascii_posx_we : std_logic; + signal cg_draw_en : std_logic; + signal cg_color : color_t; + + -- DDR to VGA + signal vga_cmd_cnt : natural range 0 to 255; + signal vga_pixel_cnt : natural range 0 to tsvga.ts_h.ncyc_scan*tsvga.ts_v.ncyc_scan-1; + signal vga_sd_addr : user_addr_t; + signal vga_sd_valid : std_logic; + signal vga_pixel_cnt_en : std_logic; + signal vga_sd_cmd : user_cmd_t; + signal vga_sd_cmd_we : std_logic; + + signal vga_read_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal vga_read_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal vga_read_fifo_re : std_logic; + signal vga_read_fifo_we : std_logic; + signal vga_read_fifo_full : std_logic; + signal vga_read_fifo_empty : std_logic; + signal vga_read_fifo_almost_full : std_logic; + signal vga_read_fifo_almost_empty : std_logic; + +BEGIN + + int_in <= sys_btn(4) or sys_dip(7) or timer_pulse or int_force or rx_data_present; + rst_in <= not (started_up and sys_rst_n_in); + uart_status_port <= "000" & rx_data_present & rx_full & rx_half_full & tx_full & tx_half_full ; + + -- VGA mapping + sys_vga_clk <= vga_clk; + sys_vga_red <= vga_color(r); + sys_vga_green <= vga_color(g); + sys_vga_blue <= vga_color(b); + vga_scan_rdy <= vga_scan_rdy_h and vga_scan_rdy_v; + sys_error <= cpu_error_leds; + + cg_en <= vga_scan_x and vga_scan_y; + cg_rst <= rst; + +------------------------------------------------------------------ +cpu_sdr_buffer: + process(clk) + variable index, lo, hi : integer; + begin + if rising_edge(clk) then + index := to_integer(cpu_addr(2 downto 0)); + hi := dmem_data_t'length*(index+1)-1; + lo := dmem_data_t'length*(index); + if cpu_sdr_buf_we = '1' then + sdr_buf_in(hi downto lo) <= cpu_dout; + end if; + sdr_data <= cpu_read_fifo_dout(hi downto lo); + end if; + end process; + +------------------------------------------------------------------ +led_out: + process(rst, clk) + begin + if rst = '1' then + sys_led <= (others => '0'); + elsif rising_edge(clk) then + sys_led <= int_in & led_reg; + end if; + end process; + +------------------------------------------------------------------ +timer: + process(rst, clk, timer_count, timer_en) + begin + if rst = '1' then + timer_count <= timer_reload; + timer_pulse <= '0'; + elsif rising_edge(clk) then + timer_pulse <= '0'; + if timer_count /= 0 then + if timer_en = '1' then + timer_count <= timer_count - 1; + end if; + else + timer_pulse <= '1'; + timer_count <= timer_reload; + end if; + end if; + end process; + +------------------------------------------------------------------ +reg_mux: + process(clk) + variable data : dmem_data_t; + variable addr : dmem_addr_t; + variable is_io : boolean; + variable cpu_read : std_logic; + begin + + read_from_uart <= '0'; + if rising_edge(clk) then + addr := cpu_addr; + is_io := (io_sel = '1'); + cpu_read := cpu_re; + end if; + + if is_io then + case addr is + when X"00" => -- 00 + data := "0000" & unsigned(sys_btn(3 downto 0)); + when X"01" => -- 01 + data := led_reg; + when X"02" => -- 02 + data := unsigned(rx_data); + read_from_uart <= cpu_read; + when X"03" => -- 03 + data := cpu_lcd_in_reg; + when X"04" => -- 04 + data := int_force & '0' & cpu_error_leds & '0' & cpu_vga_enable & timer_en & int_en; + when X"05" => -- 05 + data := unsigned(sys_dip); + when X"06" => -- 06 + data := uart_status_port; + when X"07" => -- 07 + data := sd_cpu_access & sd_vga_access & cpu_read_fifo_empty & cpu_read_fifo_full & cpu_write_fifo_empty & cpu_write_fifo_full & cmd_fifo_empty & cmd_fifo_full; + when X"08" => -- 08 + data := cpu_sdr_addr(7 downto 0); + when X"09" => -- 09 + data := cpu_sdr_addr(15 downto 8); + when X"0A" => -- 10 + data := cpu_sdr_addr(23 downto 16); + when X"0E" => + data := (not rst) & "00000" & cg_ready & vga_ready; + when X"13" => -- 10 + data := cpu_baudrate; + when others => + data := X"00"; + end case; + else + if cpu_addr(7) = '1' then + data := sdr_data; + else + data := xrom_data; + end if; + end if; + cpu_din <= data; + + end process; + +------------------------------------------------------------------ +ctrl_reg_write: + process(rst, clk) + variable addr : unsigned(dmem_addr_t'length-1 downto 0); + begin + if (rst = '1') then + cpu_color <= (X"80", X"80", X"80"); + cpu_error_leds <= (others => '0'); + int_force <= '0'; + int_en <= '0'; + timer_en <= '0'; + led_reg <= (others => '0'); + cpu_lcd_out_reg <= (others => '0'); + reg_uart_tx <= (others => '0'); + cpu_sdr_addr <= (others => '0'); + cg_ascii_data <= (others => '0'); + cg_ascii_posy_we <= '0'; + cg_ascii_posx_we <= '0'; + cg_ascii_data_we <= '0'; + cg_clr_line <= '0'; + cg_clr_screen <= '0'; + cpu_read_fifo_re <= '0'; + cpu_write_fifo_we <= '0'; + cpu_sd_cmd_we <= '0'; + cpu_sd_cmd <= UCMD_NOP; + cpu_sd_request_strobe <= '0'; + cpu_vga_enable <= '0'; + cpu_baudrate <= to_unsigned(53, dmem_data_t'length); + cpu_vga_read_offset <= (others => '0'); + elsif rising_edge(clk) then + int_force <= '0'; + write_to_uart <= '0'; + cpu_lcd_we <= '0'; + cpu_sdr_buf_we <= '0'; + cg_ascii_posy_we <= '0'; + cg_ascii_posx_we <= '0'; + cg_ascii_data_we <= '0'; + cg_clr_line <= '0'; + cg_clr_screen <= '0'; + cpu_read_fifo_re <= '0'; + cpu_write_fifo_we <= '0'; + cpu_sd_cmd_we <= '0'; + cpu_sd_request_strobe <= '0'; + addr := cpu_addr; + if cpu_we = '1' then + if io_sel = '1' then + case addr is + when X"01" => -- 01 + led_reg <= cpu_dout; + when X"02" => -- 02 + reg_uart_tx <= cpu_dout; + write_to_uart <= '1'; + when X"03" => -- 03 + cpu_lcd_we <= '1'; + cpu_lcd_out_reg <= cpu_dout; + when X"04" => -- 04 + int_force <= cpu_dout(7); + cpu_error_leds <= cpu_dout(5 downto 4); + cpu_vga_enable <= cpu_dout(2); + timer_en <= cpu_dout(1); + int_en <= cpu_dout(0); + when X"07" => -- 07 + cpu_sd_request_strobe <= cpu_dout(7); + cpu_read_fifo_re <= cpu_dout(5); + cpu_write_fifo_we <= cpu_dout(4); + cpu_sd_cmd_we <= cpu_dout(2); + cpu_sd_cmd <= cpu_dout(1 downto 0); + when X"08" => -- 08 + cpu_sdr_addr(7 downto 0) <= cpu_dout; + when X"09" => -- 09 + cpu_sdr_addr(15 downto 8) <= cpu_dout; + when X"0A" => -- 10 + cpu_sdr_addr(23 downto 16) <= cpu_dout; + when X"0B" => -- 08 + cg_ascii_data <= cpu_dout; + cg_ascii_posx_we <= '1'; + when X"0C" => -- 09 + cg_ascii_data <= cpu_dout; + cg_ascii_posy_we <= '1'; + when X"0D" => -- 0A + cg_ascii_data <= cpu_dout; + cg_ascii_data_we <= '1'; + when X"0E" => -- 0B + cg_clr_screen <= cpu_dout(0); + cg_clr_line <= cpu_dout(1); + when X"10" => -- 04 + cpu_color(r) <= cpu_dout; + when X"11" => -- 04 + cpu_color(g) <= cpu_dout; + when X"12" => -- 04 + cpu_color(b) <= cpu_dout; + when X"13" => -- 04 + cpu_baudrate <= cpu_dout; + when X"14" => + cpu_vga_read_offset(7 downto 0) <= cpu_dout; + when X"15" => + cpu_vga_read_offset(15 downto 8) <= cpu_dout; + when X"16" => + cpu_vga_read_offset(23 downto 16) <= cpu_dout; + when others => null; + end case; + else + case addr is + when X"80"|X"81"|X"82"|X"83"|X"84"|X"85"|X"86"|X"87" => + cpu_sdr_buf_we <= '1'; + when others => null; + end case; + end if; + end if; + end if; + end process; + +------------------------------------------------------------------ + cpu_sd_request_flag: process (rst, clk) + begin + if (rst = '1') then + sd_cpu_request <= '0'; + elsif rising_edge(clk) then + if cpu_sd_request_strobe = '1' then + sd_cpu_request <= '1'; + elsif cpu_sd_ack = '1' then + sd_cpu_request <= '0'; + end if; + end if; + end process; + +------------------------------------------------------------------ +sdram_write_control: + process(st, sd_cpu_request, sd_vga_request, cpu_sd_cmd_we, vga_sd_cmd_we) + begin + cpu_sd_ack <= '0'; + sd_vga_access <= '0'; + sd_cpu_access <= '0'; + stn <= st; + + case st is + when s_sd_idle => + if sd_vga_request = '1' then + stn <= s_sd_vga_access_grant; + elsif sd_cpu_request = '1' then + stn <= s_sd_cpu_access_grant; + end if; + when s_sd_vga_access_grant => + sd_vga_access <= '1'; + if vga_sd_cmd_we = '1' then + stn <= s_sd_vga_access; + end if; + when s_sd_vga_access => + sd_vga_access <= '1'; + if vga_sd_cmd_we = '0' then + stn <= s_sd_idle; + end if; + when s_sd_cpu_access_grant => + cpu_sd_ack <= '1'; + sd_cpu_access <= '1'; + if cpu_sd_cmd_we = '1' then + stn <= s_sd_cpu_access; + end if; + when s_sd_cpu_access => + sd_cpu_access <= '1'; + if cpu_sd_cmd_we = '0' then + stn <= s_sd_idle; + end if; + when others => + stn <= s_sd_idle; + end case; + end process; + + process(rst, clk) + begin + if rst = '1' then + st <= s_sd_idle; + elsif rising_edge(clk) then + st <= stn; + end if; + end process; + +------------------------------------------------------------------ + vga_to_sd_cmd: process (vga_cmd_s, vga_cmd_cnt, cpu_vga_enable, vga_scan_rdy, vga_ready, sd_vga_access, cmd_fifo_full, vga_read_fifo_empty, vga_read_fifo_almost_empty) + begin + sd_vga_request <= '0'; + vga_sd_cmd <= UCMD_NOP; + vga_sd_cmd_we <= '0'; + vga_pixel_cnt_en <= '0'; + + vga_cmd_sn <= vga_cmd_s; + case vga_cmd_s is + when vga_cmd_s_init => + if vga_ready = '1' and vga_scan_rdy = '1' then + vga_cmd_sn <= vga_cmd_s_idle; + end if; + when vga_cmd_s_idle => + if cpu_vga_enable = '1' and vga_read_fifo_almost_empty = '1' then + vga_cmd_sn <= vga_cmd_s_request; + end if; + + when vga_cmd_s_request => + sd_vga_request <= '1'; + if sd_vga_access = '1' then + vga_cmd_sn <= vga_cmd_s_access; + end if; + + when vga_cmd_s_access => + if cmd_fifo_full = '0' and vga_cmd_cnt /= 64 then + vga_pixel_cnt_en <= '1'; + vga_sd_cmd <= UCMD_READ; + vga_sd_cmd_we <= '1'; + else + vga_cmd_sn <= vga_cmd_s_idle; + end if; + + when others => + vga_cmd_sn <= vga_cmd_s_idle; + + end case; + + end process; + + vga_cmd_nxt: process (rst, clk) + begin + if (rst = '1') then + vga_cmd_s <= vga_cmd_s_init; + elsif rising_edge(clk) then + vga_cmd_s <= vga_cmd_sn; + end if; + end process; + +------------------------------------------------------------------ + pixel_counter: process (rst, clk) + begin + if rst = '1' then + vga_cmd_cnt <= 0; + vga_pixel_cnt <= 0; + vga_sd_addr <= (others => '0'); + elsif rising_edge(clk) then + if vga_pixel_cnt_en = '1' then + if vga_pixel_cnt < tsvga.ts_h.ncyc_scan*tsvga.ts_v.ncyc_scan-BURST_LEN then + vga_pixel_cnt <= vga_pixel_cnt + BURST_LEN; + vga_cmd_cnt <= vga_cmd_cnt + 1; + vga_sd_addr <= vga_sd_addr + BURST_LEN; + else + vga_pixel_cnt <= 0; + vga_sd_addr <= cpu_vga_read_offset; + end if; + else + vga_cmd_cnt <= 0; + end if; + end if; + end process; + +------------------------------------------------------------------ + vga_to_sd_data: process (vga_data_s, vga_fifo_full, vga_read_fifo_empty, vga_read_fifo_dout, vga_scan_rdy, vga_fifo_almost_full) + begin + vga_read_fifo_re <= '0'; + vga_color_w <= (vga_read_fifo_dout(23 downto 16), vga_read_fifo_dout(15 downto 8), vga_read_fifo_dout(7 downto 0)); + vga_color_we <= '0'; + + vga_data_sn <= vga_data_s; + case vga_data_s is + when vga_data_s_init => + if vga_read_fifo_empty = '0' and vga_scan_rdy = '1' then + vga_data_sn <= vga_data_s_idle; + end if; + when vga_data_s_idle => + if vga_fifo_almost_full = '0' then + vga_data_sn <= vga_data_s_read1; + end if; + when vga_data_s_read1 => + vga_color_w <= (vga_read_fifo_dout(23 downto 16), vga_read_fifo_dout(15 downto 8), vga_read_fifo_dout(7 downto 0)); + if vga_read_fifo_empty = '0' then + if vga_fifo_full = '0' then + vga_color_we <= '1'; + vga_data_sn <= vga_data_s_read2; + else + vga_data_sn <= vga_data_s_idle; + end if; + end if; + when vga_data_s_read2 => + vga_color_w <= (vga_read_fifo_dout(47 downto 40), vga_read_fifo_dout(39 downto 32), vga_read_fifo_dout(31 downto 24)); + if vga_fifo_full = '0' then + vga_color_we <= '1'; + vga_read_fifo_re <= '1'; + vga_data_sn <= vga_data_s_read1; + end if; + + when others => + vga_data_sn <= vga_data_s_idle; + + end case; + + end process; + + vga_data_nxt: process (rst, clk) + begin + if (rst = '1') then + vga_data_s <= vga_data_s_init; + elsif rising_edge(clk) then + vga_data_s <= vga_data_sn; + end if; + end process; + +------------------------------------------------------------------ +inst_cpu_embedded: cpu_embedded + PORT MAP( + rst => rst, + clk => clk, + ce => '1', + int_in => int_in, + int_ack => int_ack, + xmem_we => cpu_we, + xmem_re => cpu_re, + xmem_din => cpu_din, + xmem_dout => cpu_dout, + xmem_addr => cpu_addr, + io_sel => io_sel + ); + + inst_xrom: xrom + PORT MAP( + clk => clk, + ce => '1', + addr => cpu_addr, + dout => xrom_data + ); + + inst_lcd_port: lcd_port + PORT MAP( + rst => rst, + clk => clk, + we => cpu_lcd_we, + din => cpu_lcd_out_reg, + dout => cpu_lcd_in_reg, + lcd_d => sys_lcd_d, + lcd_e => sys_lcd_e, + lcd_rs => sys_lcd_rs, + lcd_rw => sys_lcd_rw + ); + + transmit: uart_tx + port map ( data_in => std_logic_vector(reg_uart_tx), + write_buffer => write_to_uart, + reset_buffer => rst, + en_16_x_baud => en_16_x_baud, + serial_out => sys_tx, + buffer_full => tx_full, + buffer_half_full => tx_half_full, + clk => clk ); + + receive: uart_rx + port map ( serial_in => sys_rx, + data_out => rx_data, + read_buffer => read_from_uart, + reset_buffer => rst, + en_16_x_baud => en_16_x_baud, + buffer_data_present => rx_data_present, + buffer_full => rx_full, + buffer_half_full => rx_half_full, + clk => clk ); + + + -- Instantiate synchronous FIFO + inst_command_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 8, + data_width => 4+2+24, + almost_full_thresh => 240, + almost_empty_thresh => 16 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => cmd_fifo_we, + re => cmd_fifo_re, + fifo_full => cmd_fifo_full, + fifo_empty => cmd_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => cmd_fifo_din, + data_r => cmd_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_cpu_write_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 8, + data_width => 2*DDR_DATA_WIDTH, + almost_full_thresh => 252, + almost_empty_thresh => 4 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => cpu_write_fifo_we, + re => cpu_write_fifo_re, + fifo_full => cpu_write_fifo_full, + fifo_empty => cpu_write_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => cpu_write_fifo_din, + data_r => cpu_write_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_cpu_read_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 8, + data_width => 2*DDR_DATA_WIDTH, + almost_full_thresh => 252, + almost_empty_thresh => 4 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => cpu_read_fifo_we, + re => cpu_read_fifo_re, + fifo_full => cpu_read_fifo_full, + fifo_empty => cpu_read_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => cpu_read_fifo_din, + data_r => cpu_read_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_vga_read_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 10, + data_width => 2*DDR_DATA_WIDTH, + almost_full_thresh => 960, + almost_empty_thresh => 128 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => vga_read_fifo_we, + re => vga_read_fifo_re, + fifo_full => vga_read_fifo_full, + fifo_empty => vga_read_fifo_empty, + fifo_afull => vga_read_fifo_almost_full, + fifo_aempty => vga_read_fifo_almost_empty, + data_w => vga_read_fifo_din, + data_r => vga_read_fifo_dout + ); + + tag_fifo_in <= "0001" when sd_cpu_access = '1' else "0010" when sd_vga_access = '1' else "0000"; + addr_fifo_in <= cpu_sdr_addr(23 downto 0) when sd_cpu_access = '1' else vga_sd_addr; + cmd_fifo_in <= cpu_sd_cmd when sd_cpu_access = '1' else vga_sd_cmd; + cmd_fifo_we <= cpu_sd_cmd_we when sd_cpu_access = '1' else vga_sd_cmd_we; + sdr_ucmd_vld <= (not cmd_fifo_empty) and (not sdr_busy_q); + sdr_ucmd <= cmd_fifo_out; + sdr_addr <= addr_fifo_out; + sdr_tag_in <= tag_fifo_out; + + cmd_fifo_re <= sdr_ucmd_vld; + sdr_udata_in <= cpu_write_fifo_dout; + cpu_read_fifo_we <= sdr_udata_vld_q when sdr_tag_rd = "0001" else '0'; + vga_read_fifo_we <= sdr_udata_vld_q when sdr_tag_rd = "0010" else '0'; + cpu_read_fifo_din <= sdr_udata_out_q; + vga_read_fifo_din <= sdr_udata_out_q; + + cpu_write_fifo_din <= sdr_buf_in; + cpu_write_fifo_re <= sdr_udata_req_wr and (not cpu_write_fifo_empty); + + -- DDR SDRAM Controller Core + inst_sdram_ctrl : entity work.sdram_ctrl_top + Generic map + ( + BL => BURST_LEN, + read_phaseshift => ddr_phaseshift, + f_sysclk => ddr_frequency_hz + ) + Port map + ( + + sys_rst_in => rst_in, + sys_clk_in => sys_clk_in, + + sys_rst_out => rst, + sys_clk_out => clk, + sys_clk_fb => sys_sdr_clk_fb, + + -- User interface + u_data_vld => sdr_udata_vld_q, + u_data_req_w => sdr_udata_req_wr, + u_data_req_r => open, + u_tag_in => sdr_tag_in, + u_tag_rd => sdr_tag_rd, + u_tag_wr => sdr_tag_wr, + u_busy => sdr_busy_q, + u_addr => sdr_addr, + u_cmd => sdr_ucmd, + u_cmd_we => sdr_ucmd_vld, + u_data_wr => sdr_udata_in, + u_data_rd => sdr_udata_out_q, + + -- SDRAM signals + sd_clk_p => sys_sdr_clk_p, + sd_clk_n => sys_sdr_clk_n, + sd_cke => sys_sdr_cke_q, + sd_cs_n => sys_sdr_cs_qn, + sd_cas_n => sys_sdr_cas_qn, + sd_ras_n => sys_sdr_ras_qn, + sd_we_n => sys_sdr_we_qn, + sd_addr => sys_sdr_a_q, + sd_ba => sys_sdr_ba_q, + sd_dm => sys_sdr_dm_q, + sd_dqs => sys_sdr_dqs_q, + sd_data => sys_sdr_data + + ); + + inst_vga_backend: entity work.vga_backend + GENERIC MAP + ( + sys_freq => sys_freq, + fifo_depth => 2048, + fifo_almost_full_thresh => 1920, + fifo_almost_empty_thresh => 128, + tsvga => tsvga + ) + PORT MAP + ( + sys_rst => rst, + sys_clk => clk, + vga_ready => vga_ready, + color_in => vga_color_w, + color_fifo_we => vga_color_we, + color_fifo_full => vga_fifo_full, + color_fifo_afull => vga_fifo_almost_full, + direct_color_in => cg_color, + direct_draw_en => cg_draw_en, + stat_hsync => vga_hsync, + stat_vsync => vga_vsync, + stat_hready => vga_scan_rdy_h, + stat_vready => vga_scan_rdy_v, + stat_hscan => vga_scan_x, + stat_vscan => vga_scan_y, + stat_hpos => vga_pos_x, + stat_vpos => vga_pos_y, + vga_clk_out => vga_clk, + vga_color_out => vga_color, + vga_blank_n => sys_vga_blank_n, + vga_sync_n => sys_vga_sync_n, + vga_hsync => sys_vga_hsync, + vga_vsync => sys_vga_vsync + + ); + + inst_char_gen : entity work.char_gen + GENERIC MAP + ( + tsvga => tsvga, + CHARACTER_SCALE => 1, + CHAR_ROM_SIZE_X => 8, -- Pixels + CHAR_ROM_SIZE_Y => 16, -- Pixels + CHAR_ROM_DEPTH => 256, -- Chars + MAX_CHAR_PER_LINE => 80, -- Chars + MAX_LINE_PER_FRAME => 32, -- Chars + CHAR_SPACING_X => 0, -- Pixels + CHAR_SPACING_Y => 0, -- Pixels + SCREEN_OFFSET_X => 16, -- Pixels + SCREEN_OFFSET_Y => 16 -- Pixels + ) + PORT MAP + ( + rst => rst, + sys_clk => clk, + vga_clk => vga_clk, + ce => cg_en, + frame_pulse => vga_scan_rdy, + clr_screen => cg_clr_screen, + clr_line => cg_clr_line, + ascii_data => cg_ascii_data, + ascii_data_we => cg_ascii_data_we, + ascii_posy_we => cg_ascii_posy_we, + ascii_posx_we => cg_ascii_posx_we, + ready => cg_ready, + pos_x => vga_pos_x, + pos_y => vga_pos_y, + char_draw_en => cg_draw_en + ); + + ------------------------------------------------------------------ + STARTUP_VIRTEX4_inst : STARTUP_VIRTEX4 + port map ( + EOS => started_up, -- End of Startup 1-bit output + CLK => open, -- Clock input for start-up sequence + GSR => '0', -- Global Set/Reset input (GSR cannot be used for the port name) + GTS => '0', -- Global 3-state input (GTS cannot be used for the port name) + USRCCLKO => '0', -- USRCCLKO 1-bit input + USRCCLKTS => '0', -- USRCCLKTS 1-bit input + USRDONEO => '0', -- USRDONEO 1-bit input + USRDONETS => '0' -- USRDONETS 1-bit input + ); + +------------------------------------------------------------------ + -- + -- Set baud rate to 38400 for the UART communications + -- Requires en_16_x_baud to be 614400Hz which is a single cycle pulse every 163 cycles at 100MHz + -- + -- NOTE : If the highest value for baud_count exceeds 127 you will need to adjust + -- the range of integers in the signal declaration for baud_count. + -- + +------------------------------------------------------------------ + proc_cg_color_sample: + process (vga_clk) + variable p0, p1 : color_t; + begin + if rising_edge(vga_clk) then + cg_color <= p1; + p1 := p0; + p0 := cpu_color; + end if; + end process; + + baud_timer: process(clk) + begin + if clk'event and clk='1' then + if baud_count=cpu_baudrate then + baud_count <= 0; + en_16_x_baud <= '1'; + else + baud_count <= baud_count + 1; + en_16_x_baud <= '0'; + end if; + end if; + end process baud_timer; + +END; diff --git a/projects/cpu/src/systest/systest.orig.vhd b/projects/cpu/src/systest/systest.orig.vhd new file mode 100644 index 0000000..76ec222 --- /dev/null +++ b/projects/cpu/src/systest/systest.orig.vhd @@ -0,0 +1,408 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: system test using Xilinx ML-402 + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; +use std.textio.all; -- Imports the standard textio package. + +Library UNISIM; +use UNISIM.vcomponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY systest IS +PORT +( + sys_rst_n_in : in std_logic; + sys_clk_in : in std_logic; + sys_btn : in std_logic_vector(4 downto 0); + sys_dip : in std_logic_vector(7 downto 0); + sys_led : out std_logic_vector(8 downto 0); + sys_rx : in std_logic; + sys_tx : out std_logic; + sys_lcd_d : inout std_logic_vector(3 downto 0); + sys_lcd_e : out std_logic; + sys_lcd_rs : out std_logic; + sys_lcd_rw : out std_logic +); +END systest; + + +ARCHITECTURE behavior OF systest IS + + COMPONENT embedded_cpu + Port ( + rst : in STD_LOGIC; + clk : in STD_LOGIC; + ce : in STD_LOGIC; + int_in : in STD_LOGIC; + int_ack : out STD_LOGIC; + xmem_we : out STD_LOGIC; + xmem_re : out STD_LOGIC; + xmem_din : in unsigned (DMEM_WIDTH-1 downto 0); + xmem_dout : out unsigned (DMEM_WIDTH-1 downto 0); + xmem_addr : out unsigned (DMEM_WIDTH-1 downto 0) + ); + END COMPONENT; + +-- +-- declaration of UART transmitter with integral 16 byte FIFO buffer +-- + component uart_tx + Port ( data_in : in std_logic_vector(7 downto 0); + write_buffer : in std_logic; + reset_buffer : in std_logic; + en_16_x_baud : in std_logic; + serial_out : out std_logic; + buffer_full : out std_logic; + buffer_half_full : out std_logic; + clk : in std_logic); + end component; +-- +-- declaration of UART Receiver with integral 16 byte FIFO buffer +-- + component uart_rx + Port ( serial_in : in std_logic; + data_out : out std_logic_vector(7 downto 0); + read_buffer : in std_logic; + reset_buffer : in std_logic; + en_16_x_baud : in std_logic; + buffer_data_present : out std_logic; + buffer_full : out std_logic; + buffer_half_full : out std_logic; + clk : in std_logic); + end component; + + signal rst : std_logic; + signal clk, clk0 : std_logic; + signal ce : std_logic; + signal int_req, int_in, int_ack, int_en : std_logic; + + signal cpu_din : data_t; + signal cpu_dout : data_t; + signal cpu_addr : unsigned (DMEM_WIDTH-1 downto 0); + signal cpu_we, reg_sel : std_logic; + signal cpu_re : std_logic; + signal led_reg_we, lcd_reg_we, ctrl_reg_we : std_logic; + signal rom_dout, reg_dout, ctrl_reg : data_t; + signal led_reg : data_t; + signal lcd_reg_out, lcd_reg_in: data_t; + -- + -- Signals for connection of peripherals + -- + signal uart_status_port : data_t; + -- + -- Signals to form an timer generating an interrupt every microsecond + -- + constant timer_reload : integer := 99999; + signal timer_count : integer range 0 to 99999 :=0; + signal timer_pulse, timer_en : std_logic; + -- + -- Signals for UART connections + -- + signal baud_count : integer range 0 to 255 :=0; + signal en_16_x_baud : std_logic; + signal write_to_uart : std_logic; + signal tx_full : std_logic; + signal tx_half_full : std_logic; + signal read_from_uart : std_logic; + signal rx_data : std_logic_vector(7 downto 0); + signal rx_data_present : std_logic; + signal rx_full : std_logic; + signal rx_half_full : std_logic; + + signal rom_addr : unsigned(5 downto 0); + signal reg_addr : unsigned(5 downto 0); + + constant rom_data : string(1 to 64) := + ( + "J-CPU V1.0 " & + ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & + ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & + ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & + ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' & ' ' + + ); + constant lcd_e : integer := 7; + constant lcd_rs : integer := 6; + constant lcd_rw : integer := 5; + +BEGIN + + int_in <= sys_btn(4) or sys_dip(7) or timer_pulse or ctrl_reg(7) or rx_data_present; + clk0 <= sys_clk_in; + ce <= not rst; + int_en <= ctrl_reg(0); + timer_en <= ctrl_reg(1); + sys_led(8) <= int_in; + sys_led (7 downto 0) <= std_logic_vector(led_reg(7 downto 0)); + uart_status_port <= "000" & rx_data_present & rx_full & rx_half_full & tx_full & tx_half_full ; + sys_lcd_d <= std_logic_vector(lcd_reg_out(3 downto 0)) when lcd_reg_out(lcd_rw) = '0' else (others => 'Z'); + sys_lcd_e <= lcd_reg_out(lcd_e); + sys_lcd_rw <= lcd_reg_out(lcd_rw); + sys_lcd_rs <= lcd_reg_out(lcd_rs); + rom_addr <= cpu_addr(5 downto 0); + reg_addr <= cpu_addr(5 downto 0); + + BUFG_inst : BUFG + port map ( + O => clk, -- Clock buffer output + I => clk0 -- Clock buffer input + ); + +clock_halbe: + process(sys_rst_n_in, sys_clk_in) + variable reset_latency : integer range 0 to 999 := 999; + begin + if sys_rst_n_in = '0' then +-- clk0 <= '0'; + rst <= '1'; + reset_latency := 999; + elsif rising_edge(sys_clk_in) then + rst <= '1'; +-- clk0 <= not clk0; + if reset_latency /= 0 then + reset_latency := reset_latency - 1; + else + rst <= '0'; + end if; + end if; + end process; + +timer: + process(rst, clk, timer_count, timer_en) + begin + if rst = '1' then + timer_count <= timer_reload; + timer_pulse <= '0'; + elsif rising_edge(clk) then + timer_pulse <= '0'; + if timer_count /= 0 then + if timer_en = '1' then + timer_count <= timer_count - 1; + end if; + else + timer_pulse <= '1'; + timer_count <= timer_reload; + end if; + end if; + end process; + +reg_mux: + process(clk, reg_addr, reg_sel, cpu_we, cpu_re, sys_btn, sys_dip, lcd_reg_in, led_reg, uart_status_port) + variable data : data_t; + begin + led_reg_we <= '0'; + lcd_reg_we <= '0'; + ctrl_reg_we <= '0'; + write_to_uart <= '0'; + read_from_uart <= '0'; + data := (others => '-'); + + if reg_sel = '1' then + case reg_addr(2 downto 0) is + + when "000" => -- C0 + data := "0000" & unsigned(sys_btn(3 downto 0)); + when "001" => -- C1 + data := led_reg; + led_reg_we <= cpu_we; + when "010" => -- C2 + data := unsigned(rx_data); + write_to_uart <= cpu_we; + read_from_uart <= cpu_re; + when "011" => -- C3 + data := lcd_reg_in; + lcd_reg_we <= cpu_we; + when "100" => -- C4 + data := ctrl_reg; + ctrl_reg_we <= cpu_we; + when "101" => -- C5 + data := unsigned(sys_dip); + when "110" => -- C6 + data := uart_status_port; + when others => null; + end case; + + end if; + + if rising_edge(clk) then + reg_dout <= data; + end if; + + end process; + +din_mux: + process(clk, cpu_addr, cpu_we, rom_dout, reg_dout) + variable data : data_t; + begin + reg_sel <= '0'; + + case cpu_addr(7 downto 6) is + when "00" | "01" => -- 00 .. 7F + data := X"AA"; + when "10" => -- 80 .. BF + data := rom_dout; + when "11" => -- C0 .. FF + data := reg_dout; + reg_sel <= '1'; + + when others => + data := (others => '-'); + end case; + + cpu_din <= data; + + end process; + +ctrl_reg_write: + process(rst, clk, ctrl_reg_we, cpu_dout) + begin + if (rst = '1') then + ctrl_reg <= (others => '0'); + elsif rising_edge(clk) then + if ctrl_reg_we = '1' then + ctrl_reg <= cpu_dout; + end if; + end if; + end process; + +led_reg_write: + process(rst, clk, led_reg_we, cpu_dout) + begin + if (rst = '1') then + led_reg <= (others => '0'); + elsif rising_edge(clk) then + if led_reg_we = '1' then + led_reg <= cpu_dout; + end if; + end if; + end process; + +proc_lcd_reg_write: + process(rst, clk, lcd_reg_we, cpu_dout) + begin + if (rst = '1') then + lcd_reg_out <= (others => '0'); + elsif rising_edge(clk) then + if lcd_reg_we = '1' then + lcd_reg_out <= cpu_dout; + end if; + end if; + end process; + +proc_lcd_reg_sample: + process(rst, clk, sys_lcd_d, lcd_reg_out) + begin + if (rst = '1') then + lcd_reg_in <= (others => '0'); + elsif rising_edge(clk) then + if lcd_reg_out(lcd_rw) = '1' then + lcd_reg_in <= unsigned("0000" & sys_lcd_d); + end if; + end if; + end process; + + +int_register: + process(rst, clk, int_in, int_ack) + begin + if (rst = '1') then + int_req <= '0'; + elsif rising_edge(clk) then + if int_ack = '1' then + int_req <= '0'; + elsif int_en = '1' and int_in = '1' then + int_req <= '1'; + end if; + end if; + end process; + + +the_embedded_cpu: embedded_cpu + PORT MAP( + rst => rst, + clk => clk, + ce => ce, + int_in => int_req, + int_ack => int_ack, + xmem_we => cpu_we, + xmem_re => cpu_re, + xmem_din => cpu_din, + xmem_dout => cpu_dout, + xmem_addr => cpu_addr + ); + + transmit: uart_tx + port map ( data_in => std_logic_vector(cpu_dout), + write_buffer => write_to_uart, + reset_buffer => rst, + en_16_x_baud => en_16_x_baud, + serial_out => sys_tx, + buffer_full => tx_full, + buffer_half_full => tx_half_full, + clk => clk ); + + receive: uart_rx + port map ( serial_in => sys_rx, + data_out => rx_data, + read_buffer => read_from_uart, + reset_buffer => rst, + en_16_x_baud => en_16_x_baud, + buffer_data_present => rx_data_present, + buffer_full => rx_full, + buffer_half_full => rx_half_full, + clk => clk ); + -- + -- Set baud rate to 38400 for the UART communications + -- Requires en_16_x_baud to be 614400Hz which is a single cycle pulse every 163 cycles at 100MHz + -- + -- NOTE : If the highest value for baud_count exceeds 127 you will need to adjust + -- the range of integers in the signal declaration for baud_count. + -- + + baud_timer: process(clk) + begin + if clk'event and clk='1' then + if baud_count=162 then + baud_count <= 0; + en_16_x_baud <= '1'; + else + baud_count <= baud_count + 1; + en_16_x_baud <= '0'; + end if; + end if; + end process baud_timer; + +ROM_RD: + process(rst, clk, rom_addr) + begin + if rising_edge(clk) then + rom_dout <= to_unsigned(character'pos(rom_data(to_integer(rom_addr)+1)), data_t'length); + end if; + end process; + +END; diff --git a/projects/cpu/src/systest/systest.vhd b/projects/cpu/src/systest/systest.vhd new file mode 100644 index 0000000..435aabb --- /dev/null +++ b/projects/cpu/src/systest/systest.vhd @@ -0,0 +1,1140 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: system test using Xilinx ML-402 + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; +use std.textio.all; -- Imports the standard textio package. + +Library UNISIM; +use UNISIM.vcomponents.all; + +library work; +use work.cpu_pkg.all; +use work.vga_types.all; +use work.fifo_ctrl_pkg.all; +use work.sdram_config.all; +use work.sdram_types.all; + +ENTITY systest IS +GENERIC +( + sys_freq : integer := 100E6; + ddr_phaseshift : integer := 0; + ddr_frequency_hz : integer := 100E6; + tsvga : vga_timespec_t := ts_vga_1280_1024_72 +); +PORT +( + sys_rst_n_in : in std_logic; + sys_clk_in : in std_logic; + + -- Buttons and LEDs + sys_btn : in unsigned(4 downto 0); + sys_dip : in unsigned(7 downto 0); + sys_led : out unsigned(8 downto 0); + + -- UART + sys_rx : in std_logic; + sys_tx : out std_logic; + + -- LCD + sys_lcd_d : inout unsigned(3 downto 0); + sys_lcd_e : out std_logic; + sys_lcd_rs : out std_logic; + sys_lcd_rw : out std_logic; + + -- Keybpard and mouse + sys_keyb_clk : in std_logic; + sys_keyb_data : in std_logic; + sys_mouse_clk : in std_logic; + sys_mouse_data : in std_logic; + + -- DDR SDRAM + sys_sdr_clk_p : out std_logic; -- ddr_sdram_clock + sys_sdr_clk_n : out std_logic; -- /ddr_sdram_clock + sys_sdr_cke_q : out std_logic; -- clock enable + sys_sdr_cs_qn : out std_logic; -- /chip select + sys_sdr_ras_qn : out std_logic; -- /ras + sys_sdr_cas_qn : out std_logic; -- /cas + sys_sdr_we_qn : out std_logic; -- /write enable + sys_sdr_dm_q : out unsigned(DDR_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" + sys_sdr_dqs_q : inout unsigned(DDR_DQS_WIDTH-1 downto 0); -- data strobe, only for write + sys_sdr_ba_q : out unsigned(DDR_BANK_WIDTH-1 downto 0); -- bank select + sys_sdr_a_q : out unsigned(DDR_ADDR_WIDTH-1 downto 0); -- address bus + sys_sdr_data : inout unsigned(DDR_DATA_WIDTH-1 downto 0); -- bidir data bus + sys_sdr_clk_fb : in std_logic; + + -- VGA + sys_vga_red : out unsigned(7 downto 0); + sys_vga_green : out unsigned(7 downto 0); + sys_vga_blue : out unsigned(7 downto 0); + sys_vga_blank_n : out std_logic; + sys_vga_sync_n : out std_logic; + sys_vga_hsync : out std_logic; + sys_vga_vsync : out std_logic; + sys_vga_clk : out std_logic; + + sys_error : out unsigned(1 downto 0) -- indicates Errors + +); +-- attribute BUFFER_TYPE : string; +-- attribute BUFFER_TYPE of sys_clk_in : signal is "BUFG"; +-- attribute BUFFER_TYPE of sys_sdr_dcm_clk_fb : signal is "BUFG"; + +END systest; + +ARCHITECTURE behavior OF systest IS + + COMPONENT cpu_embedded + Port ( + rst : in STD_LOGIC; + clk : in STD_LOGIC; + ce : in STD_LOGIC; + int_in : in STD_LOGIC; + int_ack : out STD_LOGIC; + xmem_we : out STD_LOGIC; + xmem_re : out STD_LOGIC; + xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_dout : out unsigned (DMEM_DATA_WIDTH-1 downto 0); + xmem_addr : out unsigned (DMEM_ADDR_WIDTH-1 downto 0); + io_sel : out STD_LOGIC + ); + END COMPONENT; + + COMPONENT xrom + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + END COMPONENT; + + COMPONENT lcd_port + PORT ( + rst : in std_logic; + clk : in std_logic; + we : in std_logic; + din : in unsigned(7 downto 0); + dout : out unsigned(7 downto 0); + lcd_d : inout unsigned(3 downto 0); + lcd_e : out std_logic; + lcd_rs : out std_logic; + lcd_rw : out std_logic + ); + END COMPONENT; + +-- +-- declaration of UART transmitter with integral 16 byte FIFO buffer +-- + component uart_tx + Port ( data_in : in std_logic_vector(7 downto 0); + write_buffer : in std_logic; + reset_buffer : in std_logic; + en_16_x_baud : in std_logic; + serial_out : out std_logic; + buffer_full : out std_logic; + buffer_half_full : out std_logic; + clk : in std_logic); + end component; +-- +-- declaration of UART Receiver with integral 16 byte FIFO buffer +-- + component uart_rx + Port ( serial_in : in std_logic; + data_out : out std_logic_vector(7 downto 0); + read_buffer : in std_logic; + reset_buffer : in std_logic; + en_16_x_baud : in std_logic; + buffer_data_present : out std_logic; + buffer_full : out std_logic; + buffer_half_full : out std_logic; + clk : in std_logic); + end component; + + signal rst : std_logic; + signal rst_in : std_logic; + signal started_up : std_logic := '1'; + signal clk : std_logic; + signal int_in, int_ack, int_en, io_sel, int_force : std_logic; + + + signal cpu_baudrate : dmem_data_t; + signal cpu_din : dmem_data_t; + signal cpu_dout : dmem_data_t; + signal cpu_addr : dmem_addr_t; + signal cpu_we : std_logic; + signal cpu_re : std_logic; + signal cpu_wait : std_logic; + signal ctrl_reg : dmem_data_t; + signal led_reg : dmem_data_t; + signal cpu_lcd_out_reg, cpu_lcd_in_reg, reg_uart_tx: dmem_data_t; + signal cpu_lcd_we : std_logic; + signal cpu_sdr_buf_we, cpu_sdr_valid : std_logic; + signal cpu_color : color_t; + signal cpu_vga_enable : std_logic; + signal cpu_error_leds : unsigned(1 downto 0); + signal btn_ps2_reg : dmem_data_t; + + -- + -- Signals for connection of peripherals + -- + signal uart_status_port : dmem_data_t; + -- + -- Signals to form an timer generating an interrupt every microsecond + -- + signal cpu_tim_reload : unsigned(23 downto 0); + signal timer_count : integer range 0 to 99999 :=0; + signal timer_pulse, timer_en : std_logic; + -- + -- Signals for UART connections + -- + signal baud_count : integer range 0 to 255 :=0; + signal en_16_x_baud : std_logic; + signal write_to_uart : std_logic; + signal tx_full : std_logic; + signal tx_half_full : std_logic; + signal read_from_uart : std_logic; + signal rx_data : std_logic_vector(7 downto 0); + signal rx_data_present : std_logic; + signal rx_full : std_logic; + signal rx_half_full : std_logic; + + -- X-ROM + signal xrom_data : dmem_data_t; + signal sdr_data : dmem_data_t; + + -- DDR SDRAM + constant BURST_LEN : natural := 8; + subtype sdr_buf_t is unsigned(SDR_DATA_WIDTH-1 downto 0); + signal sdr_buf_in, sdr_vga_data : sdr_buf_t := (others => '0'); + + signal sdr_tag_in : user_tag_t; + signal sdr_tag_wr : user_tag_t; + signal sdr_tag_rd : user_tag_t; + signal sdr_ucmd : user_cmd_t; + signal cpu_sd_cmd : user_cmd_t; + signal cpu_sd_cmd_we : std_logic; + signal sdr_ucmd_vld : std_logic; + signal cpu_sdr_addr : user_addr_t; + signal cpu_vga_read_offset : user_addr_t; + signal sdr_addr : user_addr_t; + signal sdr_busy_q : std_logic; + signal sdr_udata_in : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal sdr_udata_req_wr : std_logic; + signal sdr_udata_out_q : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal sdr_udata_vld_q : std_logic; + signal sdr_dm : unsigned(SDR_DM_WIDTH-1 downto 0) := "00000000"; + + signal cpu_cat_fifo_din : unsigned(29 downto 0); + signal cpu_cat_fifo_dout : unsigned(29 downto 0); + signal cpu_cat_fifo_re : std_logic; + signal cpu_cat_fifo_we : std_logic; + signal cpu_cat_fifo_full : std_logic; + signal cpu_cat_fifo_empty : std_logic; + + signal cpu_write_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_write_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_write_fifo_re : std_logic; + signal cpu_write_fifo_we : std_logic; + signal cpu_write_fifo_full : std_logic; + signal cpu_write_fifo_empty : std_logic; + + signal cpu_read_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_read_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal cpu_read_fifo_re : std_logic; + signal cpu_read_fifo_we : std_logic; + signal cpu_read_fifo_full : std_logic; + signal cpu_read_fifo_empty : std_logic; + + alias cpu_tag_fifo_in is cpu_cat_fifo_din(29 downto 26); + alias cpu_cmd_fifo_in is cpu_cat_fifo_din(25 downto 24); + alias cpu_addr_fifo_in is cpu_cat_fifo_din(23 downto 0); + + alias cpu_tag_fifo_out is cpu_cat_fifo_dout(29 downto 26); + alias cpu_cmd_fifo_out is cpu_cat_fifo_dout(25 downto 24); + alias cpu_addr_fifo_out is cpu_cat_fifo_dout(23 downto 0); + +-- attribute rom_style: string; +-- attribute rom_style of cmd_fifo_dout: signal is "DISTRIBUTED"; +-- attribute rom_style of cpu_cpu_write_fifo_dout: signal is "DISTRIBUTED"; +-- attribute rom_style of cpu_read_fifo_dout: signal is "DISTRIBUTED"; + + -- VGA + signal vga_clk : std_logic; + signal vga_ready : std_logic; + signal vga_color_w : color_t; + signal vga_color : color_t; + signal vga_color_we : std_logic; + signal vga_fifo_full : std_logic; + signal vga_fifo_almost_full : std_logic; + signal vga_hsync : std_logic; + signal vga_vsync : std_logic; + signal vga_pos_x : natural range 0 to tsvga.ts_h.ncyc_scan-1; + signal vga_pos_y : natural range 0 to tsvga.ts_v.ncyc_scan-1; + signal vga_scan_x : std_logic; + signal vga_scan_y : std_logic; + signal vga_scan_rdy : std_logic; + signal vga_scan_rdy_h : std_logic; + signal vga_scan_rdy_v : std_logic; + signal vga_active : std_logic; + + type vga_cmd_state_t is (vga_cmd_s_init, vga_cmd_s_idle, vga_cmd_s_access); + signal vga_cmd_s, vga_cmd_sn : vga_cmd_state_t; + + type vga_data_state_t is (vga_data_s_init, vga_data_s_idle, vga_data_s_read1, vga_data_s_read2); + signal vga_data_s, vga_data_sn : vga_data_state_t; + + type sd_ctrl_state_t is (s_sd_idle, s_sd_vga_access, s_sd_cpu_access); + signal st, stn : sd_ctrl_state_t; + + -- Character generator + signal cg_rst : std_logic; + signal cg_en : std_logic; + signal cg_ready : std_logic; + signal cg_clr_screen : std_logic; + signal cg_clr_line : std_logic; + signal cg_ascii_data : dmem_data_t; + signal cg_ascii_data_we : std_logic; + signal cg_ascii_posy_we : std_logic; + signal cg_ascii_posx_we : std_logic; + signal cg_draw_en : std_logic; + signal cg_color : color_t; + + -- DDR to VGA + signal vga_pixel_cnt : natural range 0 to tsvga.ts_h.ncyc_scan*tsvga.ts_v.ncyc_scan-1; + signal vga_sd_addr : user_addr_t; + signal vga_sd_valid : std_logic; + signal vga_pixel_cnt_en : std_logic; + signal vga_sd_cmd : user_cmd_t; + signal vga_sd_cmd_we : std_logic; + + signal vga_cat_fifo_din : unsigned(29 downto 0); + signal vga_cat_fifo_dout : unsigned(29 downto 0); + signal vga_cat_fifo_re : std_logic; + signal vga_cat_fifo_we : std_logic; + signal vga_cat_fifo_full : std_logic; + signal vga_cat_fifo_empty : std_logic; + + signal vga_read_fifo_din : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal vga_read_fifo_dout : unsigned(SDR_DATA_WIDTH-1 downto 0); + signal vga_read_fifo_re : std_logic; + signal vga_read_fifo_we : std_logic; + signal vga_read_fifo_full : std_logic; + signal vga_read_fifo_empty : std_logic; + signal vga_read_fifo_almost_full : std_logic; + signal vga_read_fifo_almost_empty : std_logic; + + alias vga_tag_fifo_in is vga_cat_fifo_din(29 downto 26); + alias vga_cmd_fifo_in is vga_cat_fifo_din(25 downto 24); + alias vga_addr_fifo_in is vga_cat_fifo_din(23 downto 0); + + alias vga_tag_fifo_out is vga_cat_fifo_dout(29 downto 26); + alias vga_cmd_fifo_out is vga_cat_fifo_dout(25 downto 24); + alias vga_addr_fifo_out is vga_cat_fifo_dout(23 downto 0); + +BEGIN + + int_in <= sys_btn(4) or sys_dip(7) or timer_pulse or int_force or rx_data_present; + rst_in <= not (started_up and sys_rst_n_in); + uart_status_port <= "000" & rx_data_present & rx_full & rx_half_full & tx_full & tx_half_full ; + + -- VGA mapping + sys_vga_clk <= vga_clk; + sys_vga_red <= vga_color(r); + sys_vga_green <= vga_color(g); + sys_vga_blue <= vga_color(b); + vga_scan_rdy <= vga_scan_rdy_h and vga_scan_rdy_v; + + cg_en <= vga_scan_x and vga_scan_y; + cg_rst <= rst; + +------------------------------------------------------------------ +cpu_sdr_buffer: + process(clk) + variable index, lo, hi : integer; + begin + if rising_edge(clk) then + index := to_integer(cpu_addr(2 downto 0)); + hi := dmem_data_t'length*(index+1)-1; + lo := dmem_data_t'length*(index); + if cpu_sdr_buf_we = '1' then + sdr_buf_in(hi downto lo) <= cpu_dout; + end if; + sdr_data <= cpu_read_fifo_dout(hi downto lo); + end if; + end process; + +------------------------------------------------------------------ +led_out: + process(rst, clk) + begin + if rst = '1' then + sys_led <= (others => '0'); + sys_error <= (others => '0'); + elsif rising_edge(clk) then + sys_led <= int_in & led_reg; + sys_error <= cpu_error_leds; + end if; + end process; + +------------------------------------------------------------------ +btn_ps2_register: + process(clk) + begin + if rising_edge(clk) then + btn_ps2_reg <= sys_mouse_data & sys_mouse_clk & sys_keyb_data & sys_keyb_clk & unsigned(sys_btn(3 downto 0)); + end if; + end process; + +------------------------------------------------------------------ +timer: + process(rst, clk) + begin + if rst = '1' then + timer_count <= to_integer(cpu_tim_reload); + timer_pulse <= '0'; + elsif rising_edge(clk) then + timer_pulse <= '0'; + if timer_count /= 0 then + if timer_en = '1' then + timer_count <= timer_count - 1; + end if; + else + timer_pulse <= '1'; + timer_count <= to_integer(cpu_tim_reload); + end if; + end if; + end process; + +------------------------------------------------------------------ +reg_mux: + process(clk) + variable data : dmem_data_t; + variable addr : dmem_addr_t; + variable is_io : boolean; + variable cpu_read : std_logic; + begin + + read_from_uart <= '0'; + if rising_edge(clk) then + addr := cpu_addr; + is_io := (io_sel = '1'); + cpu_read := cpu_re; + end if; + + if is_io then + case addr is + when X"00" => -- 00 + data := btn_ps2_reg; + when X"01" => -- 01 + data := led_reg; + when X"02" => -- 02 + data := unsigned(rx_data); + read_from_uart <= cpu_read; + when X"03" => -- 03 + data := cpu_lcd_in_reg; + when X"04" => -- 04 + data := int_force & '0' & cpu_error_leds & '0' & cpu_vga_enable & timer_en & int_en; + when X"05" => -- 05 + data := unsigned(sys_dip); + when X"06" => -- 06 + data := uart_status_port; + when X"07" => -- 07 + data := '0' & '0' & cpu_read_fifo_empty & cpu_read_fifo_full & cpu_write_fifo_empty & cpu_write_fifo_full & cpu_cat_fifo_empty & cpu_cat_fifo_full; + when X"08" => -- 08 + data := cpu_sdr_addr(7 downto 0); + when X"09" => -- 09 + data := cpu_sdr_addr(15 downto 8); + when X"0A" => -- 10 + data := cpu_sdr_addr(23 downto 16); + when X"0E" => + data := (not rst) & "00000" & cg_ready & vga_ready; + when X"13" => -- 10 + data := cpu_baudrate; + when others => + data := X"00"; + end case; + else + if cpu_addr(7) = '1' then + data := sdr_data; + else + data := xrom_data; + end if; + end if; + cpu_din <= data; + + end process; + +------------------------------------------------------------------ +ctrl_reg_write: + process(rst, clk) + variable addr : unsigned(dmem_addr_t'length-1 downto 0); + begin + if (rst = '1') then + cpu_color <= (X"80", X"80", X"80"); + cpu_error_leds <= (others => '0'); + int_force <= '0'; + int_en <= '0'; + timer_en <= '0'; + led_reg <= (others => '0'); + cpu_lcd_out_reg <= (others => '0'); + reg_uart_tx <= (others => '0'); + cpu_sdr_addr <= (others => '0'); + cg_ascii_data <= (others => '0'); + cg_ascii_posy_we <= '0'; + cg_ascii_posx_we <= '0'; + cg_ascii_data_we <= '0'; + cg_clr_line <= '0'; + cg_clr_screen <= '0'; + cpu_read_fifo_re <= '0'; + cpu_write_fifo_we <= '0'; + cpu_sd_cmd_we <= '0'; + cpu_sd_cmd <= UCMD_NOP; + cpu_vga_enable <= '0'; + cpu_baudrate <= to_unsigned(53, dmem_data_t'length); + cpu_vga_read_offset <= (others => '0'); + cpu_tim_reload <= to_unsigned(99999, cpu_tim_reload'length); + elsif rising_edge(clk) then + int_force <= '0'; + write_to_uart <= '0'; + cpu_lcd_we <= '0'; + cpu_sdr_buf_we <= '0'; + cg_ascii_posy_we <= '0'; + cg_ascii_posx_we <= '0'; + cg_ascii_data_we <= '0'; + cg_clr_line <= '0'; + cg_clr_screen <= '0'; + cpu_read_fifo_re <= '0'; + cpu_write_fifo_we <= '0'; + cpu_sd_cmd_we <= '0'; + addr := cpu_addr; + if cpu_we = '1' then + if io_sel = '1' then + case addr is + when X"01" => -- 01 + led_reg <= cpu_dout; + when X"02" => -- 02 + reg_uart_tx <= cpu_dout; + write_to_uart <= '1'; + when X"03" => -- 03 + cpu_lcd_we <= '1'; + cpu_lcd_out_reg <= cpu_dout; + when X"04" => -- 04 + int_force <= cpu_dout(7); + cpu_error_leds <= cpu_dout(5 downto 4); + cpu_vga_enable <= cpu_dout(2); + timer_en <= cpu_dout(1); + int_en <= cpu_dout(0); + when X"07" => -- 07 + cpu_read_fifo_re <= cpu_dout(5); + cpu_write_fifo_we <= cpu_dout(4); + cpu_sd_cmd_we <= cpu_dout(2); + cpu_sd_cmd <= cpu_dout(1 downto 0); + when X"08" => -- 08 + cpu_sdr_addr(7 downto 0) <= cpu_dout; + when X"09" => -- 09 + cpu_sdr_addr(15 downto 8) <= cpu_dout; + when X"0A" => -- 10 + cpu_sdr_addr(23 downto 16) <= cpu_dout; + when X"0B" => -- 08 + cg_ascii_data <= cpu_dout; + cg_ascii_posx_we <= '1'; + when X"0C" => -- 09 + cg_ascii_data <= cpu_dout; + cg_ascii_posy_we <= '1'; + when X"0D" => -- 0A + cg_ascii_data <= cpu_dout; + cg_ascii_data_we <= '1'; + when X"0E" => -- 0B + cg_clr_screen <= cpu_dout(0); + cg_clr_line <= cpu_dout(1); + when X"10" => -- 04 + cpu_color(r) <= cpu_dout; + when X"11" => -- 04 + cpu_color(g) <= cpu_dout; + when X"12" => -- 04 + cpu_color(b) <= cpu_dout; + when X"13" => -- 04 + cpu_baudrate <= cpu_dout; + when X"14" => + cpu_vga_read_offset(7 downto 0) <= cpu_dout; + when X"15" => + cpu_vga_read_offset(15 downto 8) <= cpu_dout; + when X"16" => + cpu_vga_read_offset(23 downto 16) <= cpu_dout; + when X"17" => -- 04 + cpu_tim_reload(7 downto 0) <= cpu_dout; + when X"18" => -- 04 + cpu_tim_reload(15 downto 8) <= cpu_dout; + when X"19" => -- 04 + cpu_tim_reload(23 downto 16) <= cpu_dout; + when others => null; + end case; + else + case addr is + when X"80"|X"81"|X"82"|X"83"|X"84"|X"85"|X"86"|X"87" => + cpu_sdr_buf_we <= '1'; + when others => null; + end case; + end if; + end if; + end if; + end process; + +------------------------------------------------------------------ +sdram_write_control: + process(st, sdr_busy_q, vga_cat_fifo_empty, cpu_cat_fifo_empty, vga_cmd_fifo_out, vga_addr_fifo_out, vga_tag_fifo_out, cpu_cmd_fifo_out, cpu_addr_fifo_out, cpu_tag_fifo_out) + begin + + vga_cat_fifo_re <= '0'; + cpu_cat_fifo_re <= '0'; + sdr_ucmd_vld <= '0'; + sdr_ucmd <= vga_cmd_fifo_out; + sdr_addr <= vga_addr_fifo_out; + sdr_tag_in <= vga_tag_fifo_out; + + stn <= st; + case st is + when s_sd_idle => + if vga_cat_fifo_empty = '0' then + stn <= s_sd_vga_access; + elsif cpu_cat_fifo_empty = '0' then + stn <= s_sd_cpu_access; + end if; + when s_sd_vga_access => + sdr_ucmd <= vga_cmd_fifo_out; + sdr_addr <= vga_addr_fifo_out; + sdr_tag_in <= vga_tag_fifo_out; + if vga_cat_fifo_empty = '0' then + if sdr_busy_q = '0' then + sdr_ucmd_vld <= '1'; + vga_cat_fifo_re <= '1'; + end if; + else + stn <= s_sd_idle; + end if; + when s_sd_cpu_access => + sdr_ucmd <= cpu_cmd_fifo_out; + sdr_addr <= cpu_addr_fifo_out; + sdr_tag_in <= cpu_tag_fifo_out; + if cpu_cat_fifo_empty = '0' then + if sdr_busy_q = '0' then + sdr_ucmd_vld <= '1'; + cpu_cat_fifo_re <= '1'; + end if; + else + stn <= s_sd_idle; + end if; + when others => + stn <= s_sd_idle; + end case; + end process; + + process(rst, clk) + begin + if rst = '1' then + st <= s_sd_idle; + elsif rising_edge(clk) then + st <= stn; + end if; + end process; + +------------------------------------------------------------------ + vga_to_sd_cmd: process (vga_cmd_s, cpu_vga_enable, vga_scan_rdy, vga_ready, vga_cat_fifo_full, vga_read_fifo_empty, vga_read_fifo_almost_empty) + begin + vga_sd_cmd <= UCMD_NOP; + vga_sd_cmd_we <= '0'; + vga_pixel_cnt_en <= '0'; + + vga_cmd_sn <= vga_cmd_s; + case vga_cmd_s is + when vga_cmd_s_init => + if vga_ready = '1' and vga_scan_rdy = '1' then + vga_cmd_sn <= vga_cmd_s_idle; + end if; + + when vga_cmd_s_idle => + if cpu_vga_enable = '1' and vga_read_fifo_almost_empty = '1' then + vga_cmd_sn <= vga_cmd_s_access; + end if; + + when vga_cmd_s_access => + if vga_cat_fifo_full = '0' then + vga_pixel_cnt_en <= '1'; + vga_sd_cmd <= UCMD_READ; + vga_sd_cmd_we <= '1'; + else + vga_cmd_sn <= vga_cmd_s_idle; + end if; + + when others => + vga_cmd_sn <= vga_cmd_s_idle; + + end case; + + end process; + + vga_cmd_nxt: process (rst, clk) + begin + if (rst = '1') then + vga_cmd_s <= vga_cmd_s_init; + elsif rising_edge(clk) then + vga_cmd_s <= vga_cmd_sn; + end if; + end process; + +------------------------------------------------------------------ + pixel_counter: process (rst, clk) + begin + if rst = '1' then + vga_pixel_cnt <= 0; + vga_sd_addr <= (others => '0'); + elsif rising_edge(clk) then + if vga_pixel_cnt_en = '1' then + if vga_pixel_cnt < tsvga.ts_h.ncyc_scan*tsvga.ts_v.ncyc_scan-BURST_LEN then + vga_pixel_cnt <= vga_pixel_cnt + BURST_LEN; + vga_sd_addr <= vga_sd_addr + BURST_LEN; + else + vga_pixel_cnt <= 0; + vga_sd_addr <= cpu_vga_read_offset; + end if; + end if; + end if; + end process; + +------------------------------------------------------------------ + vga_to_sd_data: process (vga_data_s, vga_fifo_full, vga_read_fifo_empty, vga_read_fifo_dout, vga_scan_rdy, vga_fifo_almost_full) + begin + vga_read_fifo_re <= '0'; + vga_color_w <= (vga_read_fifo_dout(23 downto 16), vga_read_fifo_dout(15 downto 8), vga_read_fifo_dout(7 downto 0)); + vga_color_we <= '0'; + + vga_data_sn <= vga_data_s; + case vga_data_s is + when vga_data_s_init => + if vga_read_fifo_empty = '0' and vga_scan_rdy = '1' then + vga_data_sn <= vga_data_s_idle; + end if; + when vga_data_s_idle => + if vga_fifo_almost_full = '0' then + vga_data_sn <= vga_data_s_read1; + end if; + when vga_data_s_read1 => + vga_color_w <= (vga_read_fifo_dout(23 downto 16), vga_read_fifo_dout(15 downto 8), vga_read_fifo_dout(7 downto 0)); + if vga_read_fifo_empty = '0' then + if vga_fifo_full = '0' then + vga_color_we <= '1'; + vga_data_sn <= vga_data_s_read2; + else + vga_data_sn <= vga_data_s_idle; + end if; + end if; + when vga_data_s_read2 => + vga_color_w <= (vga_read_fifo_dout(47 downto 40), vga_read_fifo_dout(39 downto 32), vga_read_fifo_dout(31 downto 24)); + if vga_fifo_full = '0' then + vga_color_we <= '1'; + vga_read_fifo_re <= '1'; + vga_data_sn <= vga_data_s_read1; + end if; + + when others => + vga_data_sn <= vga_data_s_idle; + + end case; + + end process; + + vga_data_nxt: process (rst, clk) + begin + if (rst = '1') then + vga_data_s <= vga_data_s_init; + elsif rising_edge(clk) then + vga_data_s <= vga_data_sn; + end if; + end process; + +------------------------------------------------------------------ +inst_cpu_embedded: cpu_embedded + PORT MAP( + rst => rst, + clk => clk, + ce => '1', + int_in => int_in, + int_ack => int_ack, + xmem_we => cpu_we, + xmem_re => cpu_re, + xmem_din => cpu_din, + xmem_dout => cpu_dout, + xmem_addr => cpu_addr, + io_sel => io_sel + ); + + inst_xrom: xrom + PORT MAP( + clk => clk, + ce => '1', + addr => cpu_addr, + dout => xrom_data + ); + + inst_lcd_port: lcd_port + PORT MAP( + rst => rst, + clk => clk, + we => cpu_lcd_we, + din => cpu_lcd_out_reg, + dout => cpu_lcd_in_reg, + lcd_d => sys_lcd_d, + lcd_e => sys_lcd_e, + lcd_rs => sys_lcd_rs, + lcd_rw => sys_lcd_rw + ); + + transmit: uart_tx + port map ( data_in => std_logic_vector(reg_uart_tx), + write_buffer => write_to_uart, + reset_buffer => rst, + en_16_x_baud => en_16_x_baud, + serial_out => sys_tx, + buffer_full => tx_full, + buffer_half_full => tx_half_full, + clk => clk ); + + receive: uart_rx + port map ( serial_in => sys_rx, + data_out => rx_data, + read_buffer => read_from_uart, + reset_buffer => rst, + en_16_x_baud => en_16_x_baud, + buffer_data_present => rx_data_present, + buffer_full => rx_full, + buffer_half_full => rx_half_full, + clk => clk ); + + + -- Instantiate synchronous FIFO + inst_cpu_cat_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 6, + data_width => 4+2+24, + almost_full_thresh => 60, + almost_empty_thresh => 4 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => cpu_cat_fifo_we, + re => cpu_cat_fifo_re, + fifo_full => cpu_cat_fifo_full, + fifo_empty => cpu_cat_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => cpu_cat_fifo_din, + data_r => cpu_cat_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_cpu_write_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 8, + data_width => 2*DDR_DATA_WIDTH, + almost_full_thresh => 252, + almost_empty_thresh => 4 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => cpu_write_fifo_we, + re => cpu_write_fifo_re, + fifo_full => cpu_write_fifo_full, + fifo_empty => cpu_write_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => cpu_write_fifo_din, + data_r => cpu_write_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_cpu_read_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 8, + data_width => 2*DDR_DATA_WIDTH, + almost_full_thresh => 252, + almost_empty_thresh => 4 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => cpu_read_fifo_we, + re => cpu_read_fifo_re, + fifo_full => cpu_read_fifo_full, + fifo_empty => cpu_read_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => cpu_read_fifo_din, + data_r => cpu_read_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_vga_cat_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 6, + data_width => 4+2+24, + almost_full_thresh => 60, + almost_empty_thresh => 4 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => vga_cat_fifo_we, + re => vga_cat_fifo_re, + fifo_full => vga_cat_fifo_full, + fifo_empty => vga_cat_fifo_empty, + fifo_afull => open, + fifo_aempty => open, + data_w => vga_cat_fifo_din, + data_r => vga_cat_fifo_dout + ); + + -- Instantiate synchronous FIFO + inst_vga_read_fifo: entity work.fifo_sync + GENERIC MAP + ( + addr_width => 10, + data_width => 2*DDR_DATA_WIDTH, + almost_full_thresh => 960, + almost_empty_thresh => 128 + ) + PORT MAP + ( + rst => rst, + clk => clk, + we => vga_read_fifo_we, + re => vga_read_fifo_re, + fifo_full => vga_read_fifo_full, + fifo_empty => vga_read_fifo_empty, + fifo_afull => vga_read_fifo_almost_full, + fifo_aempty => vga_read_fifo_almost_empty, + data_w => vga_read_fifo_din, + data_r => vga_read_fifo_dout + ); + + vga_tag_fifo_in <= "0010"; + vga_addr_fifo_in <= vga_sd_addr; + vga_cmd_fifo_in <= vga_sd_cmd; + vga_cat_fifo_we <= vga_sd_cmd_we; + + cpu_tag_fifo_in <= "0001"; + cpu_addr_fifo_in <= cpu_sdr_addr; + cpu_cmd_fifo_in <= cpu_sd_cmd; + cpu_cat_fifo_we <= cpu_sd_cmd_we; + + sdr_udata_in <= cpu_write_fifo_dout; + cpu_read_fifo_we <= sdr_udata_vld_q when sdr_tag_rd = "0001" else '0'; + vga_read_fifo_we <= sdr_udata_vld_q when sdr_tag_rd = "0010" else '0'; + cpu_read_fifo_din <= sdr_udata_out_q; + vga_read_fifo_din <= sdr_udata_out_q; + + cpu_write_fifo_din <= sdr_buf_in; + cpu_write_fifo_re <= sdr_udata_req_wr and (not cpu_write_fifo_empty); + cpu_wait <= '0'; + + -- DDR SDRAM Controller Core + inst_sdram_ctrl : entity work.sdram_ctrl_top + Generic map + ( + BL => BURST_LEN, + read_phaseshift => ddr_phaseshift, + f_sysclk => ddr_frequency_hz + ) + Port map + ( + + sys_rst_in => rst_in, + sys_clk_in => sys_clk_in, + + sys_rst_out => rst, + sys_clk_out => clk, + sys_clk_fb => sys_sdr_clk_fb, + + -- User interface + u_data_vld => sdr_udata_vld_q, + u_data_req_w => sdr_udata_req_wr, + u_data_req_r => open, + u_tag_in => sdr_tag_in, + u_tag_rd => sdr_tag_rd, + u_tag_wr => sdr_tag_wr, + u_busy => sdr_busy_q, + u_addr => sdr_addr, + u_cmd => sdr_ucmd, + u_cmd_we => sdr_ucmd_vld, + u_data_wr => sdr_udata_in, + u_data_rd => sdr_udata_out_q, + u_dm => sdr_dm, + + -- SDRAM signals + sd_clk_p => sys_sdr_clk_p, + sd_clk_n => sys_sdr_clk_n, + sd_cke => sys_sdr_cke_q, + sd_cs_n => sys_sdr_cs_qn, + sd_cas_n => sys_sdr_cas_qn, + sd_ras_n => sys_sdr_ras_qn, + sd_we_n => sys_sdr_we_qn, + sd_addr => sys_sdr_a_q, + sd_ba => sys_sdr_ba_q, + sd_dm => sys_sdr_dm_q, + sd_dqs => sys_sdr_dqs_q, + sd_data => sys_sdr_data + + ); + + inst_vga_backend: entity work.vga_backend + GENERIC MAP + ( + sys_freq => sys_freq, + fifo_depth => 2048, + fifo_almost_full_thresh => 1920, + fifo_almost_empty_thresh => 128, + tsvga => tsvga + ) + PORT MAP + ( + sys_rst => rst, + sys_clk => clk, + vga_ready => vga_ready, + color_in => vga_color_w, + color_fifo_we => vga_color_we, + color_fifo_full => vga_fifo_full, + color_fifo_afull => vga_fifo_almost_full, + direct_color_in => cg_color, + direct_draw_en => cg_draw_en, + stat_hsync => vga_hsync, + stat_vsync => vga_vsync, + stat_hready => vga_scan_rdy_h, + stat_vready => vga_scan_rdy_v, + stat_hscan => vga_scan_x, + stat_vscan => vga_scan_y, + stat_hpos => vga_pos_x, + stat_vpos => vga_pos_y, + vga_clk_out => vga_clk, + vga_color_out => vga_color, + vga_blank_n => sys_vga_blank_n, + vga_sync_n => sys_vga_sync_n, + vga_hsync => sys_vga_hsync, + vga_vsync => sys_vga_vsync + + ); + + inst_char_gen : entity work.char_gen + GENERIC MAP + ( + tsvga => tsvga, + CHARACTER_SCALE => 1, + CHAR_ROM_SIZE_X => 8, -- Pixels + CHAR_ROM_SIZE_Y => 16, -- Pixels + CHAR_ROM_DEPTH => 256, -- Chars + MAX_CHAR_PER_LINE => 80, -- Chars + MAX_LINE_PER_FRAME => 32, -- Chars + CHAR_SPACING_X => 0, -- Pixels + CHAR_SPACING_Y => 0, -- Pixels + SCREEN_OFFSET_X => 16, -- Pixels + SCREEN_OFFSET_Y => 16 -- Pixels + ) + PORT MAP + ( + rst => rst, + sys_clk => clk, + vga_clk => vga_clk, + ce => cg_en, + frame_pulse => vga_scan_rdy, + clr_screen => cg_clr_screen, + clr_line => cg_clr_line, + ascii_data => cg_ascii_data, + ascii_data_we => cg_ascii_data_we, + ascii_posy_we => cg_ascii_posy_we, + ascii_posx_we => cg_ascii_posx_we, + ready => cg_ready, + pos_x => vga_pos_x, + pos_y => vga_pos_y, + char_draw_en => cg_draw_en + ); + + ------------------------------------------------------------------ + STARTUP_VIRTEX4_inst : STARTUP_VIRTEX4 + port map ( + EOS => started_up, -- End of Startup 1-bit output + CLK => open, -- Clock input for start-up sequence + GSR => '0', -- Global Set/Reset input (GSR cannot be used for the port name) + GTS => '0', -- Global 3-state input (GTS cannot be used for the port name) + USRCCLKO => '0', -- USRCCLKO 1-bit input + USRCCLKTS => '0', -- USRCCLKTS 1-bit input + USRDONEO => '0', -- USRDONEO 1-bit input + USRDONETS => '0' -- USRDONETS 1-bit input + ); + +------------------------------------------------------------------ + -- + -- Set baud rate to 38400 for the UART communications + -- Requires en_16_x_baud to be 614400Hz which is a single cycle pulse every 163 cycles at 100MHz + -- + -- NOTE : If the highest value for baud_count exceeds 127 you will need to adjust + -- the range of integers in the signal declaration for baud_count. + -- + +------------------------------------------------------------------ + proc_cg_color_sample: + process (vga_clk) + variable p0, p1 : color_t; + begin + if rising_edge(vga_clk) then + cg_color <= p1; + p1 := p0; + p0 := cpu_color; + end if; + end process; + + baud_timer: process(clk) + begin + if clk'event and clk='1' then + if baud_count=cpu_baudrate then + baud_count <= 0; + en_16_x_baud <= '1'; + else + baud_count <= baud_count + 1; + en_16_x_baud <= '0'; + end if; + end if; + end process baud_timer; + +END; diff --git a/projects/cpu/src/systest/systest_cfg.vhd b/projects/cpu/src/systest/systest_cfg.vhd new file mode 100644 index 0000000..d2a0c0e --- /dev/null +++ b/projects/cpu/src/systest/systest_cfg.vhd @@ -0,0 +1,19 @@ +library IEEE; +USE IEEE.STD_LOGIC_1164.ALL; +USE IEEE.NUMERIC_STD.ALL; + +configuration cpu_irom of cpu_embedded is + for rtl + for inst_irom : irom + use entity work.irom(loadable); + end for; + end for; +end configuration cpu_irom; + +configuration system_xrom of systest is + for behavior + for inst_xrom : xrom + use entity work.xrom(loadable); + end for; + end for; +end configuration system_xrom; diff --git a/projects/cpu/src/systest/tb_systest.vhd b/projects/cpu/src/systest/tb_systest.vhd new file mode 100644 index 0000000..6f753ca --- /dev/null +++ b/projects/cpu/src/systest/tb_systest.vhd @@ -0,0 +1,166 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: testbench for system test using Xilinx ML-402 + +-- Copyright (C) 2007 J. Ahrensfeld + +-- This library is free software; you can redistribute it and/or +-- modify it under the terms of the GNU Lesser General Public +-- License as published by the Free Software Foundation; either +-- version 2.1 of the License, or (at your option) any later version. + +-- This library is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +-- Lesser General Public License for more details. + +-- You should have received a copy of the GNU Lesser General Public +-- License along with this library; if not, write to the Free Software +-- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + +-- For questions and ideas, please contact the author at jens@jayfield.org + +----------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; +use std.textio.all; -- Imports the standard textio package. + +library work; +use work.cpu_pkg.all; +use work.ddr_sdr_conf_pkg.all; +use work.systest_cfg.all; + +ENTITY tb_systest IS +END tb_systest; + +ARCHITECTURE behavior OF tb_systest IS + + constant CLK_PERIOD : time := 10 ns; + signal sys_rst_n_in : std_logic := '0'; + signal sys_clk_in : std_logic := '1'; + signal dip : unsigned(7 downto 0) := (others => '0'); + signal btn : unsigned(4 downto 0) := (others => '0'); + signal led : unsigned(8 downto 0); + signal sys_rx : std_logic := '0'; + signal sys_tx : std_logic; + + signal sys_lcd_d : unsigned(3 downto 0); + signal sys_lcd_e : std_logic; + signal sys_lcd_rs : std_logic; + signal sys_lcd_rw : std_logic; + + signal refresh : boolean:= true; + + signal sys_sdr_clk_p : std_logic; -- ddr_sdram_clock + signal sys_sdr_clk_n : std_logic; -- /ddr_sdram_clock + signal sys_sdr_cke_q : std_logic; -- clock enable + signal sys_sdr_cs_qn : std_logic; -- /chip select + signal sys_sdr_ras_qn : std_logic; -- /ras + signal sys_sdr_cas_qn : std_logic; -- /cas + signal sys_sdr_we_qn : std_logic; -- /write enable + signal sys_sdr_dm_q : unsigned(DDR_DM_WIDTH-1 downto 0); -- data mask bits, set to "00" + signal sys_sdr_dqs_q : unsigned(DDR_DQS_WIDTH-1 downto 0); -- data strobe, only for write + signal sys_sdr_ba_q : unsigned(DDR_BANK_WIDTH-1 downto 0); -- bank select + signal sys_sdr_a_q : unsigned(DDR_ADDR_WIDTH-1 downto 0); -- address bus + signal sys_sdr_data : unsigned(DDR_DATA_WIDTH-1 downto 0); -- bidir data bus + + signal sys_error : unsigned(1 downto 0); -- indicates DCM Errors + signal sys_sdr_clk_fb : std_logic; + +BEGIN + +uut: entity work.systest +-- GENERIC MAP +-- ( +-- ddr_phaseshift => 90, +-- ddr_frequency_hz => 100E6 +-- ) + PORT MAP + ( + sys_rst_n_in => sys_rst_n_in, + sys_clk_in => sys_clk_in, + sys_btn => btn, + sys_dip => dip, + sys_led => led, + sys_rx => sys_rx, + sys_tx => sys_tx, + sys_lcd_d => sys_lcd_d, + sys_lcd_e => sys_lcd_e, + sys_lcd_rs => sys_lcd_rs, + sys_lcd_rw => sys_lcd_rw, + + sys_sdr_clk_p => sys_sdr_clk_p, + sys_sdr_clk_n => sys_sdr_clk_n, + sys_sdr_cke_q => sys_sdr_cke_q, + sys_sdr_clk_fb => sys_sdr_clk_fb, + sys_sdr_cs_qn => sys_sdr_cs_qn, + sys_sdr_ras_qn => sys_sdr_ras_qn, + sys_sdr_cas_qn => sys_sdr_cas_qn, + sys_sdr_we_qn => sys_sdr_we_qn, + sys_sdr_dm_q => sys_sdr_dm_q, + sys_sdr_dqs_q => sys_sdr_dqs_q, + sys_sdr_ba_q => sys_sdr_ba_q, + sys_sdr_a_q => sys_sdr_a_q, + sys_sdr_data => sys_sdr_data, + sys_error => sys_error + ); + + -- MICRON DDR SDRAM Simulation Model + i_mt46v16m16_0 : entity work.mt46v16m16 + port map ( + dq => std_logic_vector(sys_sdr_data(15 downto 0)), + dqs => std_logic_vector(sys_sdr_dqs_q(1 downto 0)), + addr => std_logic_vector(sys_sdr_a_q), + ba => std_logic_vector(sys_sdr_ba_q), + clk => sys_sdr_clk_p, + clk_n => sys_sdr_clk_n, + cke => sys_sdr_cke_q, + cs_n => sys_sdr_cs_qn, + ras_n => sys_sdr_ras_qn, + cas_n => sys_sdr_cas_qn, + we_n => sys_sdr_we_qn, + dm => std_logic_vector(sys_sdr_dm_q(1 downto 0)) + ); + + -- MICRON DDR SDRAM Simulation Model + i_mt46v16m16_1 : entity work.mt46v16m16 + port map ( + dq => std_logic_vector(sys_sdr_data(31 downto 16)), + dqs => std_logic_vector(sys_sdr_dqs_q(3 downto 2)), + addr => std_logic_vector(sys_sdr_a_q), + ba => std_logic_vector(sys_sdr_ba_q), + clk => sys_sdr_clk_p, + clk_n => sys_sdr_clk_n, + cke => sys_sdr_cke_q, + cs_n => sys_sdr_cs_qn, + ras_n => sys_sdr_ras_qn, + cas_n => sys_sdr_cas_qn, + we_n => sys_sdr_we_qn, + dm => std_logic_vector(sys_sdr_dm_q(3 downto 2)) + ); + + sys_sdr_clk_fb <= sys_sdr_clk_p after 2300 ps; + refresh <= true when falling_edge(sys_sdr_ras_qn) and falling_edge(sys_sdr_cas_qn) and sys_sdr_we_qn='1' else false; + +CLK_GEN: process + begin + wait for CLK_PERIOD/2; + sys_clk_in <= not sys_clk_in; + end process; + +STIMULUS: process + + begin + + wait for 3*CLK_PERIOD; + sys_rst_n_in <= '1'; + wait for 2*CLK_PERIOD; + + + wait; + + end process; + +END; diff --git a/projects/cpu/src/systest/vga_test_irom.vhdl b/projects/cpu/src/systest/vga_test_irom.vhdl new file mode 100644 index 0000000..8f12d8a --- /dev/null +++ b/projects/cpu/src/systest/vga_test_irom.vhdl @@ -0,0 +1,786 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); +END irom; + +ARCHITECTURE vga_test OF irom IS + + type imem_rom_t is array (0 to 724) of inst_t; + + -- Assembled from vga_test.jsm + constant imem_rom : imem_rom_t := + ( + "110000" & X"02D", -- 0x000: JMP 0x02D + "111100" & X"000", -- 0x001: PUSH R00 + "111100" & X"001", -- 0x002: PUSH R01 + "101000" & X"061", -- 0x003: XIN R01, (0x06) + "011001" & X"101", -- 0x004: AND R01, 0x10 + "110001" & X"015", -- 0x005: JZ 0x015 + "101000" & X"020", -- 0x006: XIN R00, (0x02) + "001010" & X"5F1", -- 0x007: MOVC R01, (0x5F) + "001011" & X"010", -- 0x008: MOVC (R00), R01 + "010001" & X"011", -- 0x009: INC R01 + "001111" & X"5E1", -- 0x00A: CMP R01, 0x5E + "111010" & X"00D", -- 0x00B: JNE 0x00D + "000011" & X"1E1", -- 0x00C: MOV R01, 0x1E + "001101" & X"5F1", -- 0x00D: MOVC (0x5F), R01 + "001010" & X"5E0", -- 0x00E: MOVC R00, (0x5E) + "001110" & X"010", -- 0x00F: CMP R00, R01 + "111010" & X"003", -- 0x010: JNE 0x003 + "101000" & X"040", -- 0x011: XIN R00, (0x04) + "011011" & X"200", -- 0x012: OR R00, 0x20 + "100100" & X"040", -- 0x013: XOUT (0x04), R00 + "110000" & X"003", -- 0x014: JMP 0x003 + "111011" & X"019", -- 0x015: CALL 0x019 + "111101" & X"001", -- 0x016: POP R01 + "111101" & X"000", -- 0x017: POP R00 + "111111" & X"000", -- 0x018: RETI + "101000" & X"000", -- 0x019: XIN R00, (0x00) + "011001" & X"010", -- 0x01A: AND R00, 0x01 + "110001" & X"023", -- 0x01B: JZ 0x023 + "000011" & X"140", -- 0x01C: MOV R00, 0x14 + "100101" & X"000", -- 0x01D: XOUT (R00), 0x00 + "010001" & X"010", -- 0x01E: INC R00 + "100101" & X"000", -- 0x01F: XOUT (R00), 0x00 + "010001" & X"010", -- 0x020: INC R00 + "100101" & X"000", -- 0x021: XOUT (R00), 0x00 + "110000" & X"02C", -- 0x022: JMP 0x02C + "101000" & X"000", -- 0x023: XIN R00, (0x00) + "011001" & X"020", -- 0x024: AND R00, 0x02 + "110001" & X"02C", -- 0x025: JZ 0x02C + "000011" & X"140", -- 0x026: MOV R00, 0x14 + "100101" & X"000", -- 0x027: XOUT (R00), 0x00 + "010001" & X"010", -- 0x028: INC R00 + "100101" & X"000", -- 0x029: XOUT (R00), 0x00 + "010001" & X"010", -- 0x02A: INC R00 + "100101" & X"200", -- 0x02B: XOUT (R00), 0x20 + "111110" & X"000", -- 0x02C: RET + "111011" & X"1C6", -- 0x02D: CALL 0x1C6 + "111011" & X"1FB", -- 0x02E: CALL 0x1FB + "000011" & X"000", -- 0x02F: MOV R00, 0x00 + "100100" & X"010", -- 0x030: XOUT (0x01), R00 + "000011" & X"040", -- 0x031: MOV R00, 0x04 + "100100" & X"040", -- 0x032: XOUT (0x04), R00 + "101000" & X"040", -- 0x033: XIN R00, (0x04) + "011011" & X"020", -- 0x034: OR R00, 0x02 + "100100" & X"040", -- 0x035: XOUT (0x04), R00 + "000011" & X"030", -- 0x036: MOV R00, 0x03 + "100110" & X"030", -- 0x037: COUT (0x03), R00 + "000011" & X"010", -- 0x038: MOV R00, 0x01 + "111011" & X"218", -- 0x039: CALL 0x218 + "000011" & X"000", -- 0x03A: MOV R00, 0x00 + "000011" & X"C01", -- 0x03B: MOV R01, 0xC0 + "100100" & X"101", -- 0x03C: XOUT (0x10), R01 + "100100" & X"111", -- 0x03D: XOUT (0x11), R01 + "100100" & X"121", -- 0x03E: XOUT (0x12), R01 + "111011" & X"28C", -- 0x03F: CALL 0x28C + "111011" & X"271", -- 0x040: CALL 0x271 + "000011" & X"031", -- 0x041: MOV R01, 0x03 + "111011" & X"21D", -- 0x042: CALL 0x21D + "000011" & X"031", -- 0x043: MOV R01, 0x03 + "111011" & X"27D", -- 0x044: CALL 0x27D + "000011" & X"001", -- 0x045: MOV R01, 0x00 + "111011" & X"289", -- 0x046: CALL 0x289 + "101000" & X"040", -- 0x047: XIN R00, (0x04) + "011001" & X"CF0", -- 0x048: AND R00, 0xCF + "100100" & X"040", -- 0x049: XOUT (0x04), R00 + "000011" & X"000", -- 0x04A: MOV R00, 0x00 + "001101" & X"010", -- 0x04B: MOVC (0x01), R00 + "111011" & X"080", -- 0x04C: CALL 0x080 + "111011" & X"0D9", -- 0x04D: CALL 0x0D9 + "111011" & X"10D", -- 0x04E: CALL 0x10D + "001010" & X"010", -- 0x04F: MOVC R00, (0x01) + "010001" & X"010", -- 0x050: INC R00 + "001101" & X"010", -- 0x051: MOVC (0x01), R00 + "110000" & X"04D", -- 0x052: JMP 0x04D + "000011" & X"010", -- 0x053: MOV R00, 0x01 + "111011" & X"218", -- 0x054: CALL 0x218 + "000011" & X"0E1", -- 0x055: MOV R01, 0x0E + "111011" & X"21D", -- 0x056: CALL 0x21D + "000011" & X"0E1", -- 0x057: MOV R01, 0x0E + "111011" & X"286", -- 0x058: CALL 0x286 + "000011" & X"001", -- 0x059: MOV R01, 0x00 + "111011" & X"289", -- 0x05A: CALL 0x289 + "000011" & X"000", -- 0x05B: MOV R00, 0x00 + "000011" & X"001", -- 0x05C: MOV R01, 0x00 + "000011" & X"002", -- 0x05D: MOV R02, 0x00 + "111011" & X"16A", -- 0x05E: CALL 0x16A + "000011" & X"800", -- 0x05F: MOV R00, 0x80 + "000011" & X"08F", -- 0x060: MOV R15, 0x08 + "000111" & X"000", -- 0x061: MOVX (R00), 0x00 + "010001" & X"010", -- 0x062: INC R00 + "010101" & X"01F", -- 0x063: DEC R15 + "110010" & X"061", -- 0x064: JNZ 0x061 + "000011" & X"082", -- 0x065: MOV R02, 0x08 + "101000" & X"070", -- 0x066: XIN R00, (0x07) + "100100" & X"010", -- 0x067: XOUT (0x01), R00 + "011001" & X"040", -- 0x068: AND R00, 0x04 + "110010" & X"066", -- 0x069: JNZ 0x066 + "000011" & X"100", -- 0x06A: MOV R00, 0x10 + "100100" & X"070", -- 0x06B: XOUT (0x07), R00 + "010101" & X"022", -- 0x06C: SUB R02, 0x02 + "110010" & X"066", -- 0x06D: JNZ 0x066 + "111011" & X"147", -- 0x06E: CALL 0x147 + "000011" & X"060", -- 0x06F: MOV R00, 0x06 + "100100" & X"070", -- 0x070: XOUT (0x07), R00 + "101000" & X"080", -- 0x071: XIN R00, (0x08) + "001111" & X"F80", -- 0x072: CMP R00, 0xF8 + "111010" & X"07A", -- 0x073: JNE 0x07A + "101000" & X"090", -- 0x074: XIN R00, (0x09) + "001111" & X"FF0", -- 0x075: CMP R00, 0xFF + "111010" & X"07A", -- 0x076: JNE 0x07A + "101000" & X"0A0", -- 0x077: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x078: CMP R00, 0xFF + "111001" & X"07D", -- 0x079: JEQ 0x07D + "000011" & X"080", -- 0x07A: MOV R00, 0x08 + "111011" & X"16E", -- 0x07B: CALL 0x16E + "110000" & X"065", -- 0x07C: JMP 0x065 + "111011" & X"18E", -- 0x07D: CALL 0x18E + "111011" & X"292", -- 0x07E: CALL 0x292 + "111110" & X"000", -- 0x07F: RET + "000011" & X"010", -- 0x080: MOV R00, 0x01 + "111011" & X"218", -- 0x081: CALL 0x218 + "000011" & X"391", -- 0x082: MOV R01, 0x39 + "111011" & X"21D", -- 0x083: CALL 0x21D + "000011" & X"391", -- 0x084: MOV R01, 0x39 + "111011" & X"286", -- 0x085: CALL 0x286 + "000011" & X"001", -- 0x086: MOV R01, 0x00 + "111011" & X"289", -- 0x087: CALL 0x289 + "000011" & X"F80", -- 0x088: MOV R00, 0xF8 + "000011" & X"FF1", -- 0x089: MOV R01, 0xFF + "000011" & X"132", -- 0x08A: MOV R02, 0x13 + "111011" & X"16A", -- 0x08B: CALL 0x16A + "000011" & X"00F", -- 0x08C: MOV R15, 0x00 + "111011" & X"1D2", -- 0x08D: CALL 0x1D2 + "110011" & X"080", -- 0x08E: JC 0x080 + "010001" & X"01F", -- 0x08F: INC R15 + "001111" & X"0AF", -- 0x090: CMP R15, 0x0A + "111010" & X"08D", -- 0x091: JNE 0x08D + "111011" & X"1D2", -- 0x092: CALL 0x1D2 + "110011" & X"080", -- 0x093: JC 0x080 + "010001" & X"01F", -- 0x094: INC R15 + "001101" & X"020", -- 0x095: MOVC (0x02), R00 + "111011" & X"1D2", -- 0x096: CALL 0x1D2 + "110011" & X"080", -- 0x097: JC 0x080 + "010001" & X"01F", -- 0x098: INC R15 + "001101" & X"030", -- 0x099: MOVC (0x03), R00 + "111011" & X"1D2", -- 0x09A: CALL 0x1D2 + "110011" & X"080", -- 0x09B: JC 0x080 + "010001" & X"01F", -- 0x09C: INC R15 + "001101" & X"040", -- 0x09D: MOVC (0x04), R00 + "111011" & X"1D2", -- 0x09E: CALL 0x1D2 + "110011" & X"080", -- 0x09F: JC 0x080 + "010001" & X"01F", -- 0x0A0: INC R15 + "001101" & X"050", -- 0x0A1: MOVC (0x05), R00 + "001010" & X"021", -- 0x0A2: MOVC R01, (0x02) + "111011" & X"1D2", -- 0x0A3: CALL 0x1D2 + "110011" & X"080", -- 0x0A4: JC 0x080 + "010001" & X"01F", -- 0x0A5: INC R15 + "001110" & X"01F", -- 0x0A6: CMP R15, R01 + "111010" & X"0A3", -- 0x0A7: JNE 0x0A3 + "000011" & X"08F", -- 0x0A8: MOV R15, 0x08 + "000011" & X"1D1", -- 0x0A9: MOV R01, 0x1D + "000011" & X"032", -- 0x0AA: MOV R02, 0x03 + "010101" & X"012", -- 0x0AB: DEC R02 + "000010" & X"013", -- 0x0AC: MOV R03, R01 + "111011" & X"1D2", -- 0x0AD: CALL 0x1D2 + "110011" & X"0D7", -- 0x0AE: JC 0x0D7 + "010100" & X"023", -- 0x0AF: SUB R03, R02 + "001011" & X"030", -- 0x0B0: MOVC (R00), R03 + "001111" & X"002", -- 0x0B1: TST R02 + "110010" & X"0AB", -- 0x0B2: JNZ 0x0AB + "010101" & X"031", -- 0x0B3: SUB R01, 0x03 + "010101" & X"01F", -- 0x0B4: DEC R15 + "110010" & X"0AA", -- 0x0B5: JNZ 0x0AA + "000011" & X"082", -- 0x0B6: MOV R02, 0x08 + "000011" & X"061", -- 0x0B7: MOV R01, 0x06 + "000011" & X"803", -- 0x0B8: MOV R03, 0x80 + "001001" & X"010", -- 0x0B9: MOVC R00, (R01) + "000110" & X"030", -- 0x0BA: MOVX (R00), R03 + "010001" & X"011", -- 0x0BB: INC R01 + "010001" & X"013", -- 0x0BC: INC R03 + "001111" & X"863", -- 0x0BD: CMP R03, 0x86 + "111010" & X"0B9", -- 0x0BE: JNE 0x0B9 + "101000" & X"070", -- 0x0BF: XIN R00, (0x07) + "100100" & X"010", -- 0x0C0: XOUT (0x01), R00 + "011001" & X"040", -- 0x0C1: AND R00, 0x04 + "110010" & X"0BF", -- 0x0C2: JNZ 0x0BF + "000011" & X"100", -- 0x0C3: MOV R00, 0x10 + "100100" & X"070", -- 0x0C4: XOUT (0x07), R00 + "010101" & X"022", -- 0x0C5: SUB R02, 0x02 + "110010" & X"0B8", -- 0x0C6: JNZ 0x0B8 + "111011" & X"147", -- 0x0C7: CALL 0x147 + "000011" & X"060", -- 0x0C8: MOV R00, 0x06 + "100100" & X"070", -- 0x0C9: XOUT (0x07), R00 + "111011" & X"18E", -- 0x0CA: CALL 0x18E + "101000" & X"080", -- 0x0CB: XIN R00, (0x08) + "001111" & X"000", -- 0x0CC: TST R00 + "110010" & X"0D4", -- 0x0CD: JNZ 0x0D4 + "101000" & X"090", -- 0x0CE: XIN R00, (0x09) + "001111" & X"000", -- 0x0CF: TST R00 + "110010" & X"0D4", -- 0x0D0: JNZ 0x0D4 + "101000" & X"0A0", -- 0x0D1: XIN R00, (0x0A) + "001111" & X"000", -- 0x0D2: TST R00 + "110001" & X"0D7", -- 0x0D3: JZ 0x0D7 + "000011" & X"080", -- 0x0D4: MOV R00, 0x08 + "111011" & X"17E", -- 0x0D5: CALL 0x17E + "110000" & X"0A8", -- 0x0D6: JMP 0x0A8 + "111011" & X"292", -- 0x0D7: CALL 0x292 + "111110" & X"000", -- 0x0D8: RET + "000011" & X"010", -- 0x0D9: MOV R00, 0x01 + "111011" & X"218", -- 0x0DA: CALL 0x218 + "000011" & X"1D1", -- 0x0DB: MOV R01, 0x1D + "111011" & X"21D", -- 0x0DC: CALL 0x21D + "000011" & X"1D1", -- 0x0DD: MOV R01, 0x1D + "111011" & X"286", -- 0x0DE: CALL 0x286 + "000011" & X"001", -- 0x0DF: MOV R01, 0x00 + "111011" & X"289", -- 0x0E0: CALL 0x289 + "000011" & X"000", -- 0x0E1: MOV R00, 0x00 + "000011" & X"001", -- 0x0E2: MOV R01, 0x00 + "000011" & X"202", -- 0x0E3: MOV R02, 0x20 + "111011" & X"16A", -- 0x0E4: CALL 0x16A + "001010" & X"010", -- 0x0E5: MOVC R00, (0x01) + "001101" & X"000", -- 0x0E6: MOVC (0x00), R00 + "000011" & X"082", -- 0x0E7: MOV R02, 0x08 + "001010" & X"001", -- 0x0E8: MOVC R01, (0x00) + "000011" & X"800", -- 0x0E9: MOV R00, 0x80 + "000011" & X"08F", -- 0x0EA: MOV R15, 0x08 + "000110" & X"001", -- 0x0EB: MOVX (R01), R00 + "010001" & X"010", -- 0x0EC: INC R00 + "010001" & X"011", -- 0x0ED: INC R01 + "010101" & X"01F", -- 0x0EE: DEC R15 + "110010" & X"0EB", -- 0x0EF: JNZ 0x0EB + "101000" & X"070", -- 0x0F0: XIN R00, (0x07) + "100100" & X"010", -- 0x0F1: XOUT (0x01), R00 + "011001" & X"040", -- 0x0F2: AND R00, 0x04 + "110010" & X"0F0", -- 0x0F3: JNZ 0x0F0 + "000011" & X"100", -- 0x0F4: MOV R00, 0x10 + "100100" & X"070", -- 0x0F5: XOUT (0x07), R00 + "001010" & X"000", -- 0x0F6: MOVC R00, (0x00) + "010001" & X"010", -- 0x0F7: INC R00 + "001101" & X"000", -- 0x0F8: MOVC (0x00), R00 + "010101" & X"022", -- 0x0F9: SUB R02, 0x02 + "110010" & X"0E8", -- 0x0FA: JNZ 0x0E8 + "111011" & X"147", -- 0x0FB: CALL 0x147 + "000011" & X"060", -- 0x0FC: MOV R00, 0x06 + "100100" & X"070", -- 0x0FD: XOUT (0x07), R00 + "101000" & X"080", -- 0x0FE: XIN R00, (0x08) + "001111" & X"F80", -- 0x0FF: CMP R00, 0xF8 + "111010" & X"107", -- 0x100: JNE 0x107 + "101000" & X"090", -- 0x101: XIN R00, (0x09) + "001111" & X"FF0", -- 0x102: CMP R00, 0xFF + "111010" & X"107", -- 0x103: JNE 0x107 + "101000" & X"0A0", -- 0x104: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x105: CMP R00, 0xFF + "111001" & X"10A", -- 0x106: JEQ 0x10A + "000011" & X"080", -- 0x107: MOV R00, 0x08 + "111011" & X"16E", -- 0x108: CALL 0x16E + "110000" & X"0E7", -- 0x109: JMP 0x0E7 + "111011" & X"18E", -- 0x10A: CALL 0x18E + "111011" & X"292", -- 0x10B: CALL 0x292 + "111110" & X"000", -- 0x10C: RET + "000011" & X"010", -- 0x10D: MOV R00, 0x01 + "111011" & X"218", -- 0x10E: CALL 0x218 + "000011" & X"2B1", -- 0x10F: MOV R01, 0x2B + "111011" & X"21D", -- 0x110: CALL 0x21D + "000011" & X"2B1", -- 0x111: MOV R01, 0x2B + "111011" & X"286", -- 0x112: CALL 0x286 + "000011" & X"001", -- 0x113: MOV R01, 0x00 + "111011" & X"289", -- 0x114: CALL 0x289 + "000011" & X"000", -- 0x115: MOV R00, 0x00 + "000011" & X"001", -- 0x116: MOV R01, 0x00 + "000011" & X"202", -- 0x117: MOV R02, 0x20 + "111011" & X"16A", -- 0x118: CALL 0x16A + "001010" & X"010", -- 0x119: MOVC R00, (0x01) + "001101" & X"000", -- 0x11A: MOVC (0x00), R00 + "101000" & X"070", -- 0x11B: XIN R00, (0x07) + "100100" & X"010", -- 0x11C: XOUT (0x01), R00 + "011001" & X"200", -- 0x11D: AND R00, 0x20 + "110010" & X"122", -- 0x11E: JNZ 0x122 + "000011" & X"200", -- 0x11F: MOV R00, 0x20 + "100100" & X"070", -- 0x120: XOUT (0x07), R00 + "110000" & X"11B", -- 0x121: JMP 0x11B + "111011" & X"147", -- 0x122: CALL 0x147 + "000011" & X"050", -- 0x123: MOV R00, 0x05 + "100100" & X"070", -- 0x124: XOUT (0x07), R00 + "000011" & X"083", -- 0x125: MOV R03, 0x08 + "101000" & X"070", -- 0x126: XIN R00, (0x07) + "100100" & X"010", -- 0x127: XOUT (0x01), R00 + "011001" & X"200", -- 0x128: AND R00, 0x20 + "110010" & X"126", -- 0x129: JNZ 0x126 + "001010" & X"001", -- 0x12A: MOVC R01, (0x00) + "000011" & X"800", -- 0x12B: MOV R00, 0x80 + "000011" & X"08F", -- 0x12C: MOV R15, 0x08 + "000100" & X"002", -- 0x12D: MOVX R02, (R00) + "001110" & X"012", -- 0x12E: CMP R02, R01 + "111010" & X"15A", -- 0x12F: JNE 0x15A + "010001" & X"010", -- 0x130: INC R00 + "010001" & X"011", -- 0x131: INC R01 + "010101" & X"01F", -- 0x132: DEC R15 + "110010" & X"12D", -- 0x133: JNZ 0x12D + "000011" & X"200", -- 0x134: MOV R00, 0x20 + "100100" & X"070", -- 0x135: XOUT (0x07), R00 + "001010" & X"000", -- 0x136: MOVC R00, (0x00) + "010001" & X"010", -- 0x137: INC R00 + "001101" & X"000", -- 0x138: MOVC (0x00), R00 + "010101" & X"023", -- 0x139: SUB R03, 0x02 + "110010" & X"126", -- 0x13A: JNZ 0x126 + "101000" & X"080", -- 0x13B: XIN R00, (0x08) + "001111" & X"F80", -- 0x13C: CMP R00, 0xF8 + "111010" & X"144", -- 0x13D: JNE 0x144 + "101000" & X"090", -- 0x13E: XIN R00, (0x09) + "001111" & X"FF0", -- 0x13F: CMP R00, 0xFF + "111010" & X"144", -- 0x140: JNE 0x144 + "101000" & X"0A0", -- 0x141: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x142: CMP R00, 0xFF + "111001" & X"14E", -- 0x143: JEQ 0x14E + "000011" & X"080", -- 0x144: MOV R00, 0x08 + "111011" & X"16E", -- 0x145: CALL 0x16E + "110000" & X"122", -- 0x146: JMP 0x122 + "111100" & X"000", -- 0x147: PUSH R00 + "101000" & X"070", -- 0x148: XIN R00, (0x07) + "100100" & X"010", -- 0x149: XOUT (0x01), R00 + "011001" & X"010", -- 0x14A: AND R00, 0x01 + "110010" & X"148", -- 0x14B: JNZ 0x148 + "111101" & X"000", -- 0x14C: POP R00 + "111110" & X"000", -- 0x14D: RET + "000011" & X"010", -- 0x14E: MOV R00, 0x01 + "111011" & X"218", -- 0x14F: CALL 0x218 + "000011" & X"481", -- 0x150: MOV R01, 0x48 + "111011" & X"21D", -- 0x151: CALL 0x21D + "000011" & X"C00", -- 0x152: MOV R00, 0xC0 + "111011" & X"218", -- 0x153: CALL 0x218 + "111011" & X"199", -- 0x154: CALL 0x199 + "000011" & X"481", -- 0x155: MOV R01, 0x48 + "111011" & X"286", -- 0x156: CALL 0x286 + "000011" & X"001", -- 0x157: MOV R01, 0x00 + "111011" & X"289", -- 0x158: CALL 0x289 + "110000" & X"168", -- 0x159: JMP 0x168 + "000011" & X"010", -- 0x15A: MOV R00, 0x01 + "111011" & X"218", -- 0x15B: CALL 0x218 + "000011" & X"521", -- 0x15C: MOV R01, 0x52 + "111011" & X"21D", -- 0x15D: CALL 0x21D + "111011" & X"199", -- 0x15E: CALL 0x199 + "111011" & X"1B1", -- 0x15F: CALL 0x1B1 + "000011" & X"521", -- 0x160: MOV R01, 0x52 + "111011" & X"286", -- 0x161: CALL 0x286 + "000011" & X"001", -- 0x162: MOV R01, 0x00 + "111011" & X"289", -- 0x163: CALL 0x289 + "101000" & X"040", -- 0x164: XIN R00, (0x04) + "011011" & X"100", -- 0x165: OR R00, 0x10 + "100100" & X"040", -- 0x166: XOUT (0x04), R00 + "110000" & X"168", -- 0x167: JMP 0x168 + "111011" & X"292", -- 0x168: CALL 0x292 + "111110" & X"000", -- 0x169: RET + "100100" & X"080", -- 0x16A: XOUT (0x08), R00 + "100100" & X"091", -- 0x16B: XOUT (0x09), R01 + "100100" & X"0A2", -- 0x16C: XOUT (0x0A), R02 + "111110" & X"000", -- 0x16D: RET + "111100" & X"001", -- 0x16E: PUSH R01 + "111100" & X"002", -- 0x16F: PUSH R02 + "111100" & X"003", -- 0x170: PUSH R03 + "101000" & X"081", -- 0x171: XIN R01, (0x08) + "101000" & X"092", -- 0x172: XIN R02, (0x09) + "101000" & X"0A3", -- 0x173: XIN R03, (0x0A) + "010000" & X"001", -- 0x174: ADD R01, R00 + "010011" & X"002", -- 0x175: ADDC R02, 0x00 + "010011" & X"003", -- 0x176: ADDC R03, 0x00 + "100100" & X"081", -- 0x177: XOUT (0x08), R01 + "100100" & X"092", -- 0x178: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x179: XOUT (0x0A), R03 + "111101" & X"003", -- 0x17A: POP R03 + "111101" & X"002", -- 0x17B: POP R02 + "111101" & X"001", -- 0x17C: POP R01 + "111110" & X"000", -- 0x17D: RET + "111100" & X"001", -- 0x17E: PUSH R01 + "111100" & X"002", -- 0x17F: PUSH R02 + "111100" & X"003", -- 0x180: PUSH R03 + "101000" & X"081", -- 0x181: XIN R01, (0x08) + "101000" & X"092", -- 0x182: XIN R02, (0x09) + "101000" & X"0A3", -- 0x183: XIN R03, (0x0A) + "010100" & X"001", -- 0x184: SUB R01, R00 + "010111" & X"002", -- 0x185: SUBC R02, 0x00 + "010111" & X"003", -- 0x186: SUBC R03, 0x00 + "100100" & X"081", -- 0x187: XOUT (0x08), R01 + "100100" & X"092", -- 0x188: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x189: XOUT (0x0A), R03 + "111101" & X"003", -- 0x18A: POP R03 + "111101" & X"002", -- 0x18B: POP R02 + "111101" & X"001", -- 0x18C: POP R01 + "111110" & X"000", -- 0x18D: RET + "000011" & X"C00", -- 0x18E: MOV R00, 0xC0 + "111011" & X"218", -- 0x18F: CALL 0x218 + "111011" & X"199", -- 0x190: CALL 0x199 + "111110" & X"000", -- 0x191: RET + "111100" & X"001", -- 0x192: PUSH R01 + "111011" & X"1F4", -- 0x193: CALL 0x1F4 + "111011" & X"22F", -- 0x194: CALL 0x22F + "000010" & X"010", -- 0x195: MOV R00, R01 + "111011" & X"22F", -- 0x196: CALL 0x22F + "111101" & X"001", -- 0x197: POP R01 + "111110" & X"000", -- 0x198: RET + "111100" & X"000", -- 0x199: PUSH R00 + "101000" & X"0A0", -- 0x19A: XIN R00, (0x0A) + "111011" & X"192", -- 0x19B: CALL 0x192 + "101000" & X"090", -- 0x19C: XIN R00, (0x09) + "111011" & X"192", -- 0x19D: CALL 0x192 + "101000" & X"080", -- 0x19E: XIN R00, (0x08) + "111011" & X"192", -- 0x19F: CALL 0x192 + "111101" & X"000", -- 0x1A0: POP R00 + "111110" & X"000", -- 0x1A1: RET + "111100" & X"000", -- 0x1A2: PUSH R00 + "010001" & X"031", -- 0x1A3: ADD R01, 0x03 + "001001" & X"010", -- 0x1A4: MOVC R00, (R01) + "111011" & X"192", -- 0x1A5: CALL 0x192 + "010101" & X"011", -- 0x1A6: DEC R01 + "001001" & X"010", -- 0x1A7: MOVC R00, (R01) + "111011" & X"192", -- 0x1A8: CALL 0x192 + "010101" & X"011", -- 0x1A9: DEC R01 + "001001" & X"010", -- 0x1AA: MOVC R00, (R01) + "111011" & X"192", -- 0x1AB: CALL 0x192 + "010101" & X"011", -- 0x1AC: DEC R01 + "001001" & X"010", -- 0x1AD: MOVC R00, (R01) + "111011" & X"192", -- 0x1AE: CALL 0x192 + "111101" & X"000", -- 0x1AF: POP R00 + "111110" & X"000", -- 0x1B0: RET + "111100" & X"000", -- 0x1B1: PUSH R00 + "000011" & X"C00", -- 0x1B2: MOV R00, 0xC0 + "111011" & X"218", -- 0x1B3: CALL 0x218 + "000101" & X"870", -- 0x1B4: MOVX R00, (0x87) + "111011" & X"192", -- 0x1B5: CALL 0x192 + "000101" & X"860", -- 0x1B6: MOVX R00, (0x86) + "111011" & X"192", -- 0x1B7: CALL 0x192 + "000101" & X"850", -- 0x1B8: MOVX R00, (0x85) + "111011" & X"192", -- 0x1B9: CALL 0x192 + "000101" & X"840", -- 0x1BA: MOVX R00, (0x84) + "111011" & X"192", -- 0x1BB: CALL 0x192 + "000101" & X"830", -- 0x1BC: MOVX R00, (0x83) + "111011" & X"192", -- 0x1BD: CALL 0x192 + "000101" & X"820", -- 0x1BE: MOVX R00, (0x82) + "111011" & X"192", -- 0x1BF: CALL 0x192 + "000101" & X"810", -- 0x1C0: MOVX R00, (0x81) + "111011" & X"192", -- 0x1C1: CALL 0x192 + "000101" & X"800", -- 0x1C2: MOVX R00, (0x80) + "111011" & X"192", -- 0x1C3: CALL 0x192 + "111101" & X"000", -- 0x1C4: POP R00 + "111110" & X"000", -- 0x1C5: RET + "111100" & X"000", -- 0x1C6: PUSH R00 + "000011" & X"0D0", -- 0x1C7: MOV R00, 0x0D + "100100" & X"130", -- 0x1C8: XOUT (0x13), R00 + "000011" & X"1E0", -- 0x1C9: MOV R00, 0x1E + "001101" & X"5E0", -- 0x1CA: MOVC (0x5E), R00 + "001101" & X"5F0", -- 0x1CB: MOVC (0x5F), R00 + "000011" & X"E80", -- 0x1CC: MOV R00, 0xE8 + "001101" & X"600", -- 0x1CD: MOVC (0x60), R00 + "000011" & X"030", -- 0x1CE: MOV R00, 0x03 + "001101" & X"610", -- 0x1CF: MOVC (0x61), R00 + "111101" & X"000", -- 0x1D0: POP R00 + "111110" & X"000", -- 0x1D1: RET + "111100" & X"001", -- 0x1D2: PUSH R01 + "111100" & X"002", -- 0x1D3: PUSH R02 + "111100" & X"003", -- 0x1D4: PUSH R03 + "001010" & X"602", -- 0x1D5: MOVC R02, (0x60) + "001010" & X"613", -- 0x1D6: MOVC R03, (0x61) + "001010" & X"5E1", -- 0x1D7: MOVC R01, (0x5E) + "001010" & X"5F0", -- 0x1D8: MOVC R00, (0x5F) + "001110" & X"010", -- 0x1D9: CMP R00, R01 + "111001" & X"1E6", -- 0x1DA: JEQ 0x1E6 + "001001" & X"010", -- 0x1DB: MOVC R00, (R01) + "010001" & X"011", -- 0x1DC: INC R01 + "001111" & X"5E1", -- 0x1DD: CMP R01, 0x5E + "111010" & X"1E0", -- 0x1DE: JNE 0x1E0 + "000011" & X"1E1", -- 0x1DF: MOV R01, 0x1E + "001101" & X"5E1", -- 0x1E0: MOVC (0x5E), R01 + "010101" & X"000", -- 0x1E1: CLRC + "111101" & X"003", -- 0x1E2: POP R03 + "111101" & X"002", -- 0x1E3: POP R02 + "111101" & X"001", -- 0x1E4: POP R01 + "111110" & X"000", -- 0x1E5: RET + "111011" & X"2A7", -- 0x1E6: CALL 0x2A7 + "010101" & X"012", -- 0x1E7: DEC R02 + "010111" & X"003", -- 0x1E8: SUBC R03, 0x00 + "110010" & X"1D8", -- 0x1E9: JNZ 0x1D8 + "001111" & X"002", -- 0x1EA: TST R02 + "110010" & X"1D8", -- 0x1EB: JNZ 0x1D8 + "101011" & X"000", -- 0x1EC: SETC + "110000" & X"1E2", -- 0x1ED: JMP 0x1E2 + "011001" & X"0F0", -- 0x1EE: AND R00, 0x0F + "001111" & X"0A0", -- 0x1EF: CMP R00, 0x0A + "110101" & X"1F2", -- 0x1F0: JLT 0x1F2 + "010001" & X"070", -- 0x1F1: ADD R00, 0x07 + "010001" & X"300", -- 0x1F2: ADD R00, 0x30 + "111110" & X"000", -- 0x1F3: RET + "111100" & X"000", -- 0x1F4: PUSH R00 + "111011" & X"1EE", -- 0x1F5: CALL 0x1EE + "000010" & X"001", -- 0x1F6: MOV R01, R00 + "111101" & X"000", -- 0x1F7: POP R00 + "101010" & X"000", -- 0x1F8: SWAP R00 + "111011" & X"1EE", -- 0x1F9: CALL 0x1EE + "111110" & X"000", -- 0x1FA: RET + "000011" & X"002", -- 0x1FB: MOV R02, 0x00 + "000011" & X"030", -- 0x1FC: MOV R00, 0x03 + "111011" & X"247", -- 0x1FD: CALL 0x247 + "111011" & X"2A0", -- 0x1FE: CALL 0x2A0 + "000011" & X"002", -- 0x1FF: MOV R02, 0x00 + "000011" & X"030", -- 0x200: MOV R00, 0x03 + "111011" & X"247", -- 0x201: CALL 0x247 + "111011" & X"2A0", -- 0x202: CALL 0x2A0 + "000011" & X"002", -- 0x203: MOV R02, 0x00 + "000011" & X"020", -- 0x204: MOV R00, 0x02 + "111011" & X"247", -- 0x205: CALL 0x247 + "111011" & X"2A7", -- 0x206: CALL 0x2A7 + "000011" & X"280", -- 0x207: MOV R00, 0x28 + "111011" & X"218", -- 0x208: CALL 0x218 + "000011" & X"0C0", -- 0x209: MOV R00, 0x0C + "111011" & X"218", -- 0x20A: CALL 0x218 + "000011" & X"060", -- 0x20B: MOV R00, 0x06 + "111011" & X"218", -- 0x20C: CALL 0x218 + "000011" & X"010", -- 0x20D: MOV R00, 0x01 + "111011" & X"218", -- 0x20E: CALL 0x218 + "111110" & X"000", -- 0x20F: RET + "111100" & X"000", -- 0x210: PUSH R00 + "111011" & X"23B", -- 0x211: CALL 0x23B + "011001" & X"800", -- 0x212: AND R00, 0x80 + "110001" & X"216", -- 0x213: JZ 0x216 + "111011" & X"2BE", -- 0x214: CALL 0x2BE + "110000" & X"211", -- 0x215: JMP 0x211 + "111101" & X"000", -- 0x216: POP R00 + "111110" & X"000", -- 0x217: RET + "111100" & X"002", -- 0x218: PUSH R02 + "000011" & X"002", -- 0x219: MOV R02, 0x00 + "111011" & X"234", -- 0x21A: CALL 0x234 + "111101" & X"002", -- 0x21B: POP R02 + "111110" & X"000", -- 0x21C: RET + "111100" & X"000", -- 0x21D: PUSH R00 + "000100" & X"010", -- 0x21E: MOVX R00, (R01) + "010001" & X"011", -- 0x21F: INC R01 + "001111" & X"000", -- 0x220: TST R00 + "110001" & X"224", -- 0x221: JZ 0x224 + "111011" & X"22F", -- 0x222: CALL 0x22F + "110000" & X"21E", -- 0x223: JMP 0x21E + "111101" & X"000", -- 0x224: POP R00 + "111110" & X"000", -- 0x225: RET + "111100" & X"000", -- 0x226: PUSH R00 + "001001" & X"010", -- 0x227: MOVC R00, (R01) + "010001" & X"011", -- 0x228: INC R01 + "001111" & X"000", -- 0x229: TST R00 + "110001" & X"22D", -- 0x22A: JZ 0x22D + "111011" & X"22F", -- 0x22B: CALL 0x22F + "110000" & X"227", -- 0x22C: JMP 0x227 + "111101" & X"000", -- 0x22D: POP R00 + "111110" & X"000", -- 0x22E: RET + "111100" & X"002", -- 0x22F: PUSH R02 + "000011" & X"402", -- 0x230: MOV R02, 0x40 + "111011" & X"234", -- 0x231: CALL 0x234 + "111101" & X"002", -- 0x232: POP R02 + "111110" & X"000", -- 0x233: RET + "111011" & X"210", -- 0x234: CALL 0x210 + "111100" & X"000", -- 0x235: PUSH R00 + "101010" & X"000", -- 0x236: SWAP R00 + "111011" & X"247", -- 0x237: CALL 0x247 + "111101" & X"000", -- 0x238: POP R00 + "111011" & X"247", -- 0x239: CALL 0x247 + "111110" & X"000", -- 0x23A: RET + "111100" & X"002", -- 0x23B: PUSH R02 + "000011" & X"002", -- 0x23C: MOV R02, 0x00 + "111011" & X"240", -- 0x23D: CALL 0x240 + "111101" & X"002", -- 0x23E: POP R02 + "111110" & X"000", -- 0x23F: RET + "111011" & X"25A", -- 0x240: CALL 0x25A + "101010" & X"000", -- 0x241: SWAP R00 + "111100" & X"000", -- 0x242: PUSH R00 + "111011" & X"25A", -- 0x243: CALL 0x25A + "111101" & X"002", -- 0x244: POP R02 + "011010" & X"020", -- 0x245: OR R00, R02 + "111110" & X"000", -- 0x246: RET + "111100" & X"001", -- 0x247: PUSH R01 + "011001" & X"0F0", -- 0x248: AND R00, 0x0F + "000010" & X"001", -- 0x249: MOV R01, R00 + "011010" & X"021", -- 0x24A: OR R01, R02 + "100100" & X"031", -- 0x24B: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x24C: CALL 0x2BE + "000010" & X"001", -- 0x24D: MOV R01, R00 + "011010" & X"021", -- 0x24E: OR R01, R02 + "011011" & X"801", -- 0x24F: OR R01, 0x80 + "100100" & X"031", -- 0x250: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x251: CALL 0x2BE + "000010" & X"001", -- 0x252: MOV R01, R00 + "011010" & X"021", -- 0x253: OR R01, R02 + "100100" & X"031", -- 0x254: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x255: CALL 0x2BE + "011011" & X"201", -- 0x256: OR R01, 0x20 + "100100" & X"031", -- 0x257: XOUT (0x03), R01 + "111101" & X"001", -- 0x258: POP R01 + "111110" & X"000", -- 0x259: RET + "111100" & X"001", -- 0x25A: PUSH R01 + "000011" & X"201", -- 0x25B: MOV R01, 0x20 + "011010" & X"021", -- 0x25C: OR R01, R02 + "100100" & X"031", -- 0x25D: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x25E: CALL 0x2BE + "000011" & X"201", -- 0x25F: MOV R01, 0x20 + "011010" & X"021", -- 0x260: OR R01, R02 + "011011" & X"801", -- 0x261: OR R01, 0x80 + "100100" & X"031", -- 0x262: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x263: CALL 0x2BE + "101000" & X"030", -- 0x264: XIN R00, (0x03) + "011001" & X"0F0", -- 0x265: AND R00, 0x0F + "000011" & X"201", -- 0x266: MOV R01, 0x20 + "011010" & X"021", -- 0x267: OR R01, R02 + "100100" & X"031", -- 0x268: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x269: CALL 0x2BE + "111101" & X"001", -- 0x26A: POP R01 + "111110" & X"000", -- 0x26B: RET + "111100" & X"000", -- 0x26C: PUSH R00 + "000011" & X"020", -- 0x26D: MOV R00, 0x02 + "100100" & X"0E0", -- 0x26E: XOUT (0x0E), R00 + "111101" & X"000", -- 0x26F: POP R00 + "111110" & X"000", -- 0x270: RET + "111100" & X"000", -- 0x271: PUSH R00 + "000011" & X"010", -- 0x272: MOV R00, 0x01 + "100100" & X"0E0", -- 0x273: XOUT (0x0E), R00 + "111101" & X"000", -- 0x274: POP R00 + "111110" & X"000", -- 0x275: RET + "111011" & X"28C", -- 0x276: CALL 0x28C + "100100" & X"0C1", -- 0x277: XOUT (0x0C), R01 + "100100" & X"0B0", -- 0x278: XOUT (0x0B), R00 + "111110" & X"000", -- 0x279: RET + "111011" & X"28C", -- 0x27A: CALL 0x28C + "100100" & X"0D0", -- 0x27B: XOUT (0x0D), R00 + "111110" & X"000", -- 0x27C: RET + "111100" & X"000", -- 0x27D: PUSH R00 + "000100" & X"010", -- 0x27E: MOVX R00, (R01) + "010001" & X"011", -- 0x27F: INC R01 + "001111" & X"000", -- 0x280: TST R00 + "110001" & X"284", -- 0x281: JZ 0x284 + "111011" & X"27A", -- 0x282: CALL 0x27A + "110000" & X"27E", -- 0x283: JMP 0x27E + "111101" & X"000", -- 0x284: POP R00 + "111110" & X"000", -- 0x285: RET + "111011" & X"26C", -- 0x286: CALL 0x26C + "111011" & X"27D", -- 0x287: CALL 0x27D + "111110" & X"000", -- 0x288: RET + "111011" & X"27D", -- 0x289: CALL 0x27D + "111011" & X"26C", -- 0x28A: CALL 0x26C + "111110" & X"000", -- 0x28B: RET + "111100" & X"000", -- 0x28C: PUSH R00 + "101000" & X"0E0", -- 0x28D: XIN R00, (0x0E) + "011001" & X"020", -- 0x28E: AND R00, 0x02 + "110001" & X"28D", -- 0x28F: JZ 0x28D + "111101" & X"000", -- 0x290: POP R00 + "111110" & X"000", -- 0x291: RET + "111100" & X"00F", -- 0x292: PUSH R15 + "000011" & X"0AF", -- 0x293: MOV R15, 0x0A + "111011" & X"299", -- 0x294: CALL 0x299 + "010101" & X"01F", -- 0x295: DEC R15 + "110010" & X"294", -- 0x296: JNZ 0x294 + "111101" & X"00F", -- 0x297: POP R15 + "111110" & X"000", -- 0x298: RET + "111100" & X"00F", -- 0x299: PUSH R15 + "000011" & X"0AF", -- 0x29A: MOV R15, 0x0A + "111011" & X"2A0", -- 0x29B: CALL 0x2A0 + "010101" & X"01F", -- 0x29C: DEC R15 + "110010" & X"29B", -- 0x29D: JNZ 0x29B + "111101" & X"00F", -- 0x29E: POP R15 + "111110" & X"000", -- 0x29F: RET + "111100" & X"00F", -- 0x2A0: PUSH R15 + "000011" & X"0AF", -- 0x2A1: MOV R15, 0x0A + "111011" & X"2A7", -- 0x2A2: CALL 0x2A7 + "010101" & X"01F", -- 0x2A3: DEC R15 + "110010" & X"2A2", -- 0x2A4: JNZ 0x2A2 + "111101" & X"00F", -- 0x2A5: POP R15 + "111110" & X"000", -- 0x2A6: RET + "111100" & X"00F", -- 0x2A7: PUSH R15 + "000011" & X"0AF", -- 0x2A8: MOV R15, 0x0A + "111011" & X"2AE", -- 0x2A9: CALL 0x2AE + "010101" & X"01F", -- 0x2AA: DEC R15 + "110010" & X"2A9", -- 0x2AB: JNZ 0x2A9 + "111101" & X"00F", -- 0x2AC: POP R15 + "111110" & X"000", -- 0x2AD: RET + "111100" & X"00F", -- 0x2AE: PUSH R15 + "000011" & X"0AF", -- 0x2AF: MOV R15, 0x0A + "111011" & X"2B5", -- 0x2B0: CALL 0x2B5 + "010101" & X"01F", -- 0x2B1: DEC R15 + "110010" & X"2B0", -- 0x2B2: JNZ 0x2B0 + "111101" & X"00F", -- 0x2B3: POP R15 + "111110" & X"000", -- 0x2B4: RET + "111100" & X"00F", -- 0x2B5: PUSH R15 + "000011" & X"63F", -- 0x2B6: MOV R15, 0x63 + "000000" & X"000", -- 0x2B7: NOP + "000000" & X"000", -- 0x2B8: NOP + "000000" & X"000", -- 0x2B9: NOP + "010101" & X"01F", -- 0x2BA: DEC R15 + "110010" & X"2B7", -- 0x2BB: JNZ 0x2B7 + "111101" & X"00F", -- 0x2BC: POP R15 + "111110" & X"000", -- 0x2BD: RET + "111100" & X"00F", -- 0x2BE: PUSH R15 + "000011" & X"09F", -- 0x2BF: MOV R15, 0x09 + "000000" & X"000", -- 0x2C0: NOP + "000000" & X"000", -- 0x2C1: NOP + "000000" & X"000", -- 0x2C2: NOP + "010101" & X"01F", -- 0x2C3: DEC R15 + "110010" & X"2C0", -- 0x2C4: JNZ 0x2C0 + "111101" & X"00F", -- 0x2C5: POP R15 + "111110" & X"000", -- 0x2C6: RET + "111100" & X"001", -- 0x2C7: PUSH R01 + "101000" & X"061", -- 0x2C8: XIN R01, (0x06) + "011001" & X"021", -- 0x2C9: AND R01, 0x02 + "110010" & X"2C8", -- 0x2CA: JNZ 0x2C8 + "100100" & X"020", -- 0x2CB: XOUT (0x02), R00 + "111101" & X"001", -- 0x2CC: POP R01 + "111110" & X"000", -- 0x2CD: RET + "111100" & X"001", -- 0x2CE: PUSH R01 + "101000" & X"061", -- 0x2CF: XIN R01, (0x06) + "011001" & X"101", -- 0x2D0: AND R01, 0x10 + "110001" & X"2CF", -- 0x2D1: JZ 0x2CF + "101000" & X"020", -- 0x2D2: XIN R00, (0x02) + "111101" & X"001", -- 0x2D3: POP R01 + "111110" & X"000" -- 0x2D4: RET + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +end vga_test; + diff --git a/projects/cpu/src/systest/vga_test_irom_ld.vhdl b/projects/cpu/src/systest/vga_test_irom_ld.vhdl new file mode 100644 index 0000000..9d936db --- /dev/null +++ b/projects/cpu/src/systest/vga_test_irom_ld.vhdl @@ -0,0 +1,1181 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY irom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in inst_addr_t; + dout : out inst_t + ); + +END irom; + +ARCHITECTURE loadable OF irom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from vga_test.jsm + type imem_rom_t is array (0 to 1023) of inst_t; + signal imem_rom : imem_rom_t := + ( + "110000" & X"02D", -- 0x000: JMP 0x02D + "111100" & X"000", -- 0x001: PUSH R00 + "111100" & X"001", -- 0x002: PUSH R01 + "101000" & X"061", -- 0x003: XIN R01, (0x06) + "011001" & X"101", -- 0x004: AND R01, 0x10 + "110001" & X"015", -- 0x005: JZ 0x015 + "101000" & X"020", -- 0x006: XIN R00, (0x02) + "001010" & X"5F1", -- 0x007: MOVC R01, (0x5F) + "001011" & X"010", -- 0x008: MOVC (R00), R01 + "010001" & X"011", -- 0x009: INC R01 + "001111" & X"5E1", -- 0x00A: CMP R01, 0x5E + "111010" & X"00D", -- 0x00B: JNE 0x00D + "000011" & X"1E1", -- 0x00C: MOV R01, 0x1E + "001101" & X"5F1", -- 0x00D: MOVC (0x5F), R01 + "001010" & X"5E0", -- 0x00E: MOVC R00, (0x5E) + "001110" & X"010", -- 0x00F: CMP R00, R01 + "111010" & X"003", -- 0x010: JNE 0x003 + "101000" & X"040", -- 0x011: XIN R00, (0x04) + "011011" & X"200", -- 0x012: OR R00, 0x20 + "100100" & X"040", -- 0x013: XOUT (0x04), R00 + "110000" & X"003", -- 0x014: JMP 0x003 + "111011" & X"019", -- 0x015: CALL 0x019 + "111101" & X"001", -- 0x016: POP R01 + "111101" & X"000", -- 0x017: POP R00 + "111111" & X"000", -- 0x018: RETI + "101000" & X"000", -- 0x019: XIN R00, (0x00) + "011001" & X"010", -- 0x01A: AND R00, 0x01 + "110001" & X"023", -- 0x01B: JZ 0x023 + "000011" & X"140", -- 0x01C: MOV R00, 0x14 + "100101" & X"000", -- 0x01D: XOUT (R00), 0x00 + "010001" & X"010", -- 0x01E: INC R00 + "100101" & X"000", -- 0x01F: XOUT (R00), 0x00 + "010001" & X"010", -- 0x020: INC R00 + "100101" & X"000", -- 0x021: XOUT (R00), 0x00 + "110000" & X"02C", -- 0x022: JMP 0x02C + "101000" & X"000", -- 0x023: XIN R00, (0x00) + "011001" & X"020", -- 0x024: AND R00, 0x02 + "110001" & X"02C", -- 0x025: JZ 0x02C + "000011" & X"140", -- 0x026: MOV R00, 0x14 + "100101" & X"000", -- 0x027: XOUT (R00), 0x00 + "010001" & X"010", -- 0x028: INC R00 + "100101" & X"000", -- 0x029: XOUT (R00), 0x00 + "010001" & X"010", -- 0x02A: INC R00 + "100101" & X"200", -- 0x02B: XOUT (R00), 0x20 + "111110" & X"000", -- 0x02C: RET + "111011" & X"1C6", -- 0x02D: CALL 0x1C6 + "111011" & X"1FB", -- 0x02E: CALL 0x1FB + "000011" & X"000", -- 0x02F: MOV R00, 0x00 + "100100" & X"010", -- 0x030: XOUT (0x01), R00 + "000011" & X"040", -- 0x031: MOV R00, 0x04 + "100100" & X"040", -- 0x032: XOUT (0x04), R00 + "101000" & X"040", -- 0x033: XIN R00, (0x04) + "011011" & X"020", -- 0x034: OR R00, 0x02 + "100100" & X"040", -- 0x035: XOUT (0x04), R00 + "000011" & X"030", -- 0x036: MOV R00, 0x03 + "100110" & X"030", -- 0x037: COUT (0x03), R00 + "000011" & X"010", -- 0x038: MOV R00, 0x01 + "111011" & X"218", -- 0x039: CALL 0x218 + "000011" & X"000", -- 0x03A: MOV R00, 0x00 + "000011" & X"C01", -- 0x03B: MOV R01, 0xC0 + "100100" & X"101", -- 0x03C: XOUT (0x10), R01 + "100100" & X"111", -- 0x03D: XOUT (0x11), R01 + "100100" & X"121", -- 0x03E: XOUT (0x12), R01 + "111011" & X"28C", -- 0x03F: CALL 0x28C + "111011" & X"271", -- 0x040: CALL 0x271 + "000011" & X"031", -- 0x041: MOV R01, 0x03 + "111011" & X"21D", -- 0x042: CALL 0x21D + "000011" & X"031", -- 0x043: MOV R01, 0x03 + "111011" & X"27D", -- 0x044: CALL 0x27D + "000011" & X"001", -- 0x045: MOV R01, 0x00 + "111011" & X"289", -- 0x046: CALL 0x289 + "101000" & X"040", -- 0x047: XIN R00, (0x04) + "011001" & X"CF0", -- 0x048: AND R00, 0xCF + "100100" & X"040", -- 0x049: XOUT (0x04), R00 + "000011" & X"000", -- 0x04A: MOV R00, 0x00 + "001101" & X"010", -- 0x04B: MOVC (0x01), R00 + "111011" & X"080", -- 0x04C: CALL 0x080 + "111011" & X"0D9", -- 0x04D: CALL 0x0D9 + "111011" & X"10D", -- 0x04E: CALL 0x10D + "001010" & X"010", -- 0x04F: MOVC R00, (0x01) + "010001" & X"010", -- 0x050: INC R00 + "001101" & X"010", -- 0x051: MOVC (0x01), R00 + "110000" & X"04D", -- 0x052: JMP 0x04D + "000011" & X"010", -- 0x053: MOV R00, 0x01 + "111011" & X"218", -- 0x054: CALL 0x218 + "000011" & X"0E1", -- 0x055: MOV R01, 0x0E + "111011" & X"21D", -- 0x056: CALL 0x21D + "000011" & X"0E1", -- 0x057: MOV R01, 0x0E + "111011" & X"286", -- 0x058: CALL 0x286 + "000011" & X"001", -- 0x059: MOV R01, 0x00 + "111011" & X"289", -- 0x05A: CALL 0x289 + "000011" & X"000", -- 0x05B: MOV R00, 0x00 + "000011" & X"001", -- 0x05C: MOV R01, 0x00 + "000011" & X"002", -- 0x05D: MOV R02, 0x00 + "111011" & X"16A", -- 0x05E: CALL 0x16A + "000011" & X"800", -- 0x05F: MOV R00, 0x80 + "000011" & X"08F", -- 0x060: MOV R15, 0x08 + "000111" & X"000", -- 0x061: MOVX (R00), 0x00 + "010001" & X"010", -- 0x062: INC R00 + "010101" & X"01F", -- 0x063: DEC R15 + "110010" & X"061", -- 0x064: JNZ 0x061 + "000011" & X"082", -- 0x065: MOV R02, 0x08 + "101000" & X"070", -- 0x066: XIN R00, (0x07) + "100100" & X"010", -- 0x067: XOUT (0x01), R00 + "011001" & X"040", -- 0x068: AND R00, 0x04 + "110010" & X"066", -- 0x069: JNZ 0x066 + "000011" & X"100", -- 0x06A: MOV R00, 0x10 + "100100" & X"070", -- 0x06B: XOUT (0x07), R00 + "010101" & X"022", -- 0x06C: SUB R02, 0x02 + "110010" & X"066", -- 0x06D: JNZ 0x066 + "111011" & X"147", -- 0x06E: CALL 0x147 + "000011" & X"060", -- 0x06F: MOV R00, 0x06 + "100100" & X"070", -- 0x070: XOUT (0x07), R00 + "101000" & X"080", -- 0x071: XIN R00, (0x08) + "001111" & X"F80", -- 0x072: CMP R00, 0xF8 + "111010" & X"07A", -- 0x073: JNE 0x07A + "101000" & X"090", -- 0x074: XIN R00, (0x09) + "001111" & X"FF0", -- 0x075: CMP R00, 0xFF + "111010" & X"07A", -- 0x076: JNE 0x07A + "101000" & X"0A0", -- 0x077: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x078: CMP R00, 0xFF + "111001" & X"07D", -- 0x079: JEQ 0x07D + "000011" & X"080", -- 0x07A: MOV R00, 0x08 + "111011" & X"16E", -- 0x07B: CALL 0x16E + "110000" & X"065", -- 0x07C: JMP 0x065 + "111011" & X"18E", -- 0x07D: CALL 0x18E + "111011" & X"292", -- 0x07E: CALL 0x292 + "111110" & X"000", -- 0x07F: RET + "000011" & X"010", -- 0x080: MOV R00, 0x01 + "111011" & X"218", -- 0x081: CALL 0x218 + "000011" & X"391", -- 0x082: MOV R01, 0x39 + "111011" & X"21D", -- 0x083: CALL 0x21D + "000011" & X"391", -- 0x084: MOV R01, 0x39 + "111011" & X"286", -- 0x085: CALL 0x286 + "000011" & X"001", -- 0x086: MOV R01, 0x00 + "111011" & X"289", -- 0x087: CALL 0x289 + "000011" & X"F80", -- 0x088: MOV R00, 0xF8 + "000011" & X"FF1", -- 0x089: MOV R01, 0xFF + "000011" & X"132", -- 0x08A: MOV R02, 0x13 + "111011" & X"16A", -- 0x08B: CALL 0x16A + "000011" & X"00F", -- 0x08C: MOV R15, 0x00 + "111011" & X"1D2", -- 0x08D: CALL 0x1D2 + "110011" & X"080", -- 0x08E: JC 0x080 + "010001" & X"01F", -- 0x08F: INC R15 + "001111" & X"0AF", -- 0x090: CMP R15, 0x0A + "111010" & X"08D", -- 0x091: JNE 0x08D + "111011" & X"1D2", -- 0x092: CALL 0x1D2 + "110011" & X"080", -- 0x093: JC 0x080 + "010001" & X"01F", -- 0x094: INC R15 + "001101" & X"020", -- 0x095: MOVC (0x02), R00 + "111011" & X"1D2", -- 0x096: CALL 0x1D2 + "110011" & X"080", -- 0x097: JC 0x080 + "010001" & X"01F", -- 0x098: INC R15 + "001101" & X"030", -- 0x099: MOVC (0x03), R00 + "111011" & X"1D2", -- 0x09A: CALL 0x1D2 + "110011" & X"080", -- 0x09B: JC 0x080 + "010001" & X"01F", -- 0x09C: INC R15 + "001101" & X"040", -- 0x09D: MOVC (0x04), R00 + "111011" & X"1D2", -- 0x09E: CALL 0x1D2 + "110011" & X"080", -- 0x09F: JC 0x080 + "010001" & X"01F", -- 0x0A0: INC R15 + "001101" & X"050", -- 0x0A1: MOVC (0x05), R00 + "001010" & X"021", -- 0x0A2: MOVC R01, (0x02) + "111011" & X"1D2", -- 0x0A3: CALL 0x1D2 + "110011" & X"080", -- 0x0A4: JC 0x080 + "010001" & X"01F", -- 0x0A5: INC R15 + "001110" & X"01F", -- 0x0A6: CMP R15, R01 + "111010" & X"0A3", -- 0x0A7: JNE 0x0A3 + "000011" & X"08F", -- 0x0A8: MOV R15, 0x08 + "000011" & X"1D1", -- 0x0A9: MOV R01, 0x1D + "000011" & X"032", -- 0x0AA: MOV R02, 0x03 + "010101" & X"012", -- 0x0AB: DEC R02 + "000010" & X"013", -- 0x0AC: MOV R03, R01 + "111011" & X"1D2", -- 0x0AD: CALL 0x1D2 + "110011" & X"0D7", -- 0x0AE: JC 0x0D7 + "010100" & X"023", -- 0x0AF: SUB R03, R02 + "001011" & X"030", -- 0x0B0: MOVC (R00), R03 + "001111" & X"002", -- 0x0B1: TST R02 + "110010" & X"0AB", -- 0x0B2: JNZ 0x0AB + "010101" & X"031", -- 0x0B3: SUB R01, 0x03 + "010101" & X"01F", -- 0x0B4: DEC R15 + "110010" & X"0AA", -- 0x0B5: JNZ 0x0AA + "000011" & X"082", -- 0x0B6: MOV R02, 0x08 + "000011" & X"061", -- 0x0B7: MOV R01, 0x06 + "000011" & X"803", -- 0x0B8: MOV R03, 0x80 + "001001" & X"010", -- 0x0B9: MOVC R00, (R01) + "000110" & X"030", -- 0x0BA: MOVX (R00), R03 + "010001" & X"011", -- 0x0BB: INC R01 + "010001" & X"013", -- 0x0BC: INC R03 + "001111" & X"863", -- 0x0BD: CMP R03, 0x86 + "111010" & X"0B9", -- 0x0BE: JNE 0x0B9 + "101000" & X"070", -- 0x0BF: XIN R00, (0x07) + "100100" & X"010", -- 0x0C0: XOUT (0x01), R00 + "011001" & X"040", -- 0x0C1: AND R00, 0x04 + "110010" & X"0BF", -- 0x0C2: JNZ 0x0BF + "000011" & X"100", -- 0x0C3: MOV R00, 0x10 + "100100" & X"070", -- 0x0C4: XOUT (0x07), R00 + "010101" & X"022", -- 0x0C5: SUB R02, 0x02 + "110010" & X"0B8", -- 0x0C6: JNZ 0x0B8 + "111011" & X"147", -- 0x0C7: CALL 0x147 + "000011" & X"060", -- 0x0C8: MOV R00, 0x06 + "100100" & X"070", -- 0x0C9: XOUT (0x07), R00 + "111011" & X"18E", -- 0x0CA: CALL 0x18E + "101000" & X"080", -- 0x0CB: XIN R00, (0x08) + "001111" & X"000", -- 0x0CC: TST R00 + "110010" & X"0D4", -- 0x0CD: JNZ 0x0D4 + "101000" & X"090", -- 0x0CE: XIN R00, (0x09) + "001111" & X"000", -- 0x0CF: TST R00 + "110010" & X"0D4", -- 0x0D0: JNZ 0x0D4 + "101000" & X"0A0", -- 0x0D1: XIN R00, (0x0A) + "001111" & X"000", -- 0x0D2: TST R00 + "110001" & X"0D7", -- 0x0D3: JZ 0x0D7 + "000011" & X"080", -- 0x0D4: MOV R00, 0x08 + "111011" & X"17E", -- 0x0D5: CALL 0x17E + "110000" & X"0A8", -- 0x0D6: JMP 0x0A8 + "111011" & X"292", -- 0x0D7: CALL 0x292 + "111110" & X"000", -- 0x0D8: RET + "000011" & X"010", -- 0x0D9: MOV R00, 0x01 + "111011" & X"218", -- 0x0DA: CALL 0x218 + "000011" & X"1D1", -- 0x0DB: MOV R01, 0x1D + "111011" & X"21D", -- 0x0DC: CALL 0x21D + "000011" & X"1D1", -- 0x0DD: MOV R01, 0x1D + "111011" & X"286", -- 0x0DE: CALL 0x286 + "000011" & X"001", -- 0x0DF: MOV R01, 0x00 + "111011" & X"289", -- 0x0E0: CALL 0x289 + "000011" & X"000", -- 0x0E1: MOV R00, 0x00 + "000011" & X"001", -- 0x0E2: MOV R01, 0x00 + "000011" & X"202", -- 0x0E3: MOV R02, 0x20 + "111011" & X"16A", -- 0x0E4: CALL 0x16A + "001010" & X"010", -- 0x0E5: MOVC R00, (0x01) + "001101" & X"000", -- 0x0E6: MOVC (0x00), R00 + "000011" & X"082", -- 0x0E7: MOV R02, 0x08 + "001010" & X"001", -- 0x0E8: MOVC R01, (0x00) + "000011" & X"800", -- 0x0E9: MOV R00, 0x80 + "000011" & X"08F", -- 0x0EA: MOV R15, 0x08 + "000110" & X"001", -- 0x0EB: MOVX (R01), R00 + "010001" & X"010", -- 0x0EC: INC R00 + "010001" & X"011", -- 0x0ED: INC R01 + "010101" & X"01F", -- 0x0EE: DEC R15 + "110010" & X"0EB", -- 0x0EF: JNZ 0x0EB + "101000" & X"070", -- 0x0F0: XIN R00, (0x07) + "100100" & X"010", -- 0x0F1: XOUT (0x01), R00 + "011001" & X"040", -- 0x0F2: AND R00, 0x04 + "110010" & X"0F0", -- 0x0F3: JNZ 0x0F0 + "000011" & X"100", -- 0x0F4: MOV R00, 0x10 + "100100" & X"070", -- 0x0F5: XOUT (0x07), R00 + "001010" & X"000", -- 0x0F6: MOVC R00, (0x00) + "010001" & X"010", -- 0x0F7: INC R00 + "001101" & X"000", -- 0x0F8: MOVC (0x00), R00 + "010101" & X"022", -- 0x0F9: SUB R02, 0x02 + "110010" & X"0E8", -- 0x0FA: JNZ 0x0E8 + "111011" & X"147", -- 0x0FB: CALL 0x147 + "000011" & X"060", -- 0x0FC: MOV R00, 0x06 + "100100" & X"070", -- 0x0FD: XOUT (0x07), R00 + "101000" & X"080", -- 0x0FE: XIN R00, (0x08) + "001111" & X"F80", -- 0x0FF: CMP R00, 0xF8 + "111010" & X"107", -- 0x100: JNE 0x107 + "101000" & X"090", -- 0x101: XIN R00, (0x09) + "001111" & X"FF0", -- 0x102: CMP R00, 0xFF + "111010" & X"107", -- 0x103: JNE 0x107 + "101000" & X"0A0", -- 0x104: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x105: CMP R00, 0xFF + "111001" & X"10A", -- 0x106: JEQ 0x10A + "000011" & X"080", -- 0x107: MOV R00, 0x08 + "111011" & X"16E", -- 0x108: CALL 0x16E + "110000" & X"0E7", -- 0x109: JMP 0x0E7 + "111011" & X"18E", -- 0x10A: CALL 0x18E + "111011" & X"292", -- 0x10B: CALL 0x292 + "111110" & X"000", -- 0x10C: RET + "000011" & X"010", -- 0x10D: MOV R00, 0x01 + "111011" & X"218", -- 0x10E: CALL 0x218 + "000011" & X"2B1", -- 0x10F: MOV R01, 0x2B + "111011" & X"21D", -- 0x110: CALL 0x21D + "000011" & X"2B1", -- 0x111: MOV R01, 0x2B + "111011" & X"286", -- 0x112: CALL 0x286 + "000011" & X"001", -- 0x113: MOV R01, 0x00 + "111011" & X"289", -- 0x114: CALL 0x289 + "000011" & X"000", -- 0x115: MOV R00, 0x00 + "000011" & X"001", -- 0x116: MOV R01, 0x00 + "000011" & X"202", -- 0x117: MOV R02, 0x20 + "111011" & X"16A", -- 0x118: CALL 0x16A + "001010" & X"010", -- 0x119: MOVC R00, (0x01) + "001101" & X"000", -- 0x11A: MOVC (0x00), R00 + "101000" & X"070", -- 0x11B: XIN R00, (0x07) + "100100" & X"010", -- 0x11C: XOUT (0x01), R00 + "011001" & X"200", -- 0x11D: AND R00, 0x20 + "110010" & X"122", -- 0x11E: JNZ 0x122 + "000011" & X"200", -- 0x11F: MOV R00, 0x20 + "100100" & X"070", -- 0x120: XOUT (0x07), R00 + "110000" & X"11B", -- 0x121: JMP 0x11B + "111011" & X"147", -- 0x122: CALL 0x147 + "000011" & X"050", -- 0x123: MOV R00, 0x05 + "100100" & X"070", -- 0x124: XOUT (0x07), R00 + "000011" & X"083", -- 0x125: MOV R03, 0x08 + "101000" & X"070", -- 0x126: XIN R00, (0x07) + "100100" & X"010", -- 0x127: XOUT (0x01), R00 + "011001" & X"200", -- 0x128: AND R00, 0x20 + "110010" & X"126", -- 0x129: JNZ 0x126 + "001010" & X"001", -- 0x12A: MOVC R01, (0x00) + "000011" & X"800", -- 0x12B: MOV R00, 0x80 + "000011" & X"08F", -- 0x12C: MOV R15, 0x08 + "000100" & X"002", -- 0x12D: MOVX R02, (R00) + "001110" & X"012", -- 0x12E: CMP R02, R01 + "111010" & X"15A", -- 0x12F: JNE 0x15A + "010001" & X"010", -- 0x130: INC R00 + "010001" & X"011", -- 0x131: INC R01 + "010101" & X"01F", -- 0x132: DEC R15 + "110010" & X"12D", -- 0x133: JNZ 0x12D + "000011" & X"200", -- 0x134: MOV R00, 0x20 + "100100" & X"070", -- 0x135: XOUT (0x07), R00 + "001010" & X"000", -- 0x136: MOVC R00, (0x00) + "010001" & X"010", -- 0x137: INC R00 + "001101" & X"000", -- 0x138: MOVC (0x00), R00 + "010101" & X"023", -- 0x139: SUB R03, 0x02 + "110010" & X"126", -- 0x13A: JNZ 0x126 + "101000" & X"080", -- 0x13B: XIN R00, (0x08) + "001111" & X"F80", -- 0x13C: CMP R00, 0xF8 + "111010" & X"144", -- 0x13D: JNE 0x144 + "101000" & X"090", -- 0x13E: XIN R00, (0x09) + "001111" & X"FF0", -- 0x13F: CMP R00, 0xFF + "111010" & X"144", -- 0x140: JNE 0x144 + "101000" & X"0A0", -- 0x141: XIN R00, (0x0A) + "001111" & X"FF0", -- 0x142: CMP R00, 0xFF + "111001" & X"14E", -- 0x143: JEQ 0x14E + "000011" & X"080", -- 0x144: MOV R00, 0x08 + "111011" & X"16E", -- 0x145: CALL 0x16E + "110000" & X"122", -- 0x146: JMP 0x122 + "111100" & X"000", -- 0x147: PUSH R00 + "101000" & X"070", -- 0x148: XIN R00, (0x07) + "100100" & X"010", -- 0x149: XOUT (0x01), R00 + "011001" & X"010", -- 0x14A: AND R00, 0x01 + "110010" & X"148", -- 0x14B: JNZ 0x148 + "111101" & X"000", -- 0x14C: POP R00 + "111110" & X"000", -- 0x14D: RET + "000011" & X"010", -- 0x14E: MOV R00, 0x01 + "111011" & X"218", -- 0x14F: CALL 0x218 + "000011" & X"481", -- 0x150: MOV R01, 0x48 + "111011" & X"21D", -- 0x151: CALL 0x21D + "000011" & X"C00", -- 0x152: MOV R00, 0xC0 + "111011" & X"218", -- 0x153: CALL 0x218 + "111011" & X"199", -- 0x154: CALL 0x199 + "000011" & X"481", -- 0x155: MOV R01, 0x48 + "111011" & X"286", -- 0x156: CALL 0x286 + "000011" & X"001", -- 0x157: MOV R01, 0x00 + "111011" & X"289", -- 0x158: CALL 0x289 + "110000" & X"168", -- 0x159: JMP 0x168 + "000011" & X"010", -- 0x15A: MOV R00, 0x01 + "111011" & X"218", -- 0x15B: CALL 0x218 + "000011" & X"521", -- 0x15C: MOV R01, 0x52 + "111011" & X"21D", -- 0x15D: CALL 0x21D + "111011" & X"199", -- 0x15E: CALL 0x199 + "111011" & X"1B1", -- 0x15F: CALL 0x1B1 + "000011" & X"521", -- 0x160: MOV R01, 0x52 + "111011" & X"286", -- 0x161: CALL 0x286 + "000011" & X"001", -- 0x162: MOV R01, 0x00 + "111011" & X"289", -- 0x163: CALL 0x289 + "101000" & X"040", -- 0x164: XIN R00, (0x04) + "011011" & X"100", -- 0x165: OR R00, 0x10 + "100100" & X"040", -- 0x166: XOUT (0x04), R00 + "110000" & X"168", -- 0x167: JMP 0x168 + "111011" & X"292", -- 0x168: CALL 0x292 + "111110" & X"000", -- 0x169: RET + "100100" & X"080", -- 0x16A: XOUT (0x08), R00 + "100100" & X"091", -- 0x16B: XOUT (0x09), R01 + "100100" & X"0A2", -- 0x16C: XOUT (0x0A), R02 + "111110" & X"000", -- 0x16D: RET + "111100" & X"001", -- 0x16E: PUSH R01 + "111100" & X"002", -- 0x16F: PUSH R02 + "111100" & X"003", -- 0x170: PUSH R03 + "101000" & X"081", -- 0x171: XIN R01, (0x08) + "101000" & X"092", -- 0x172: XIN R02, (0x09) + "101000" & X"0A3", -- 0x173: XIN R03, (0x0A) + "010000" & X"001", -- 0x174: ADD R01, R00 + "010011" & X"002", -- 0x175: ADDC R02, 0x00 + "010011" & X"003", -- 0x176: ADDC R03, 0x00 + "100100" & X"081", -- 0x177: XOUT (0x08), R01 + "100100" & X"092", -- 0x178: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x179: XOUT (0x0A), R03 + "111101" & X"003", -- 0x17A: POP R03 + "111101" & X"002", -- 0x17B: POP R02 + "111101" & X"001", -- 0x17C: POP R01 + "111110" & X"000", -- 0x17D: RET + "111100" & X"001", -- 0x17E: PUSH R01 + "111100" & X"002", -- 0x17F: PUSH R02 + "111100" & X"003", -- 0x180: PUSH R03 + "101000" & X"081", -- 0x181: XIN R01, (0x08) + "101000" & X"092", -- 0x182: XIN R02, (0x09) + "101000" & X"0A3", -- 0x183: XIN R03, (0x0A) + "010100" & X"001", -- 0x184: SUB R01, R00 + "010111" & X"002", -- 0x185: SUBC R02, 0x00 + "010111" & X"003", -- 0x186: SUBC R03, 0x00 + "100100" & X"081", -- 0x187: XOUT (0x08), R01 + "100100" & X"092", -- 0x188: XOUT (0x09), R02 + "100100" & X"0A3", -- 0x189: XOUT (0x0A), R03 + "111101" & X"003", -- 0x18A: POP R03 + "111101" & X"002", -- 0x18B: POP R02 + "111101" & X"001", -- 0x18C: POP R01 + "111110" & X"000", -- 0x18D: RET + "000011" & X"C00", -- 0x18E: MOV R00, 0xC0 + "111011" & X"218", -- 0x18F: CALL 0x218 + "111011" & X"199", -- 0x190: CALL 0x199 + "111110" & X"000", -- 0x191: RET + "111100" & X"001", -- 0x192: PUSH R01 + "111011" & X"1F4", -- 0x193: CALL 0x1F4 + "111011" & X"22F", -- 0x194: CALL 0x22F + "000010" & X"010", -- 0x195: MOV R00, R01 + "111011" & X"22F", -- 0x196: CALL 0x22F + "111101" & X"001", -- 0x197: POP R01 + "111110" & X"000", -- 0x198: RET + "111100" & X"000", -- 0x199: PUSH R00 + "101000" & X"0A0", -- 0x19A: XIN R00, (0x0A) + "111011" & X"192", -- 0x19B: CALL 0x192 + "101000" & X"090", -- 0x19C: XIN R00, (0x09) + "111011" & X"192", -- 0x19D: CALL 0x192 + "101000" & X"080", -- 0x19E: XIN R00, (0x08) + "111011" & X"192", -- 0x19F: CALL 0x192 + "111101" & X"000", -- 0x1A0: POP R00 + "111110" & X"000", -- 0x1A1: RET + "111100" & X"000", -- 0x1A2: PUSH R00 + "010001" & X"031", -- 0x1A3: ADD R01, 0x03 + "001001" & X"010", -- 0x1A4: MOVC R00, (R01) + "111011" & X"192", -- 0x1A5: CALL 0x192 + "010101" & X"011", -- 0x1A6: DEC R01 + "001001" & X"010", -- 0x1A7: MOVC R00, (R01) + "111011" & X"192", -- 0x1A8: CALL 0x192 + "010101" & X"011", -- 0x1A9: DEC R01 + "001001" & X"010", -- 0x1AA: MOVC R00, (R01) + "111011" & X"192", -- 0x1AB: CALL 0x192 + "010101" & X"011", -- 0x1AC: DEC R01 + "001001" & X"010", -- 0x1AD: MOVC R00, (R01) + "111011" & X"192", -- 0x1AE: CALL 0x192 + "111101" & X"000", -- 0x1AF: POP R00 + "111110" & X"000", -- 0x1B0: RET + "111100" & X"000", -- 0x1B1: PUSH R00 + "000011" & X"C00", -- 0x1B2: MOV R00, 0xC0 + "111011" & X"218", -- 0x1B3: CALL 0x218 + "000101" & X"870", -- 0x1B4: MOVX R00, (0x87) + "111011" & X"192", -- 0x1B5: CALL 0x192 + "000101" & X"860", -- 0x1B6: MOVX R00, (0x86) + "111011" & X"192", -- 0x1B7: CALL 0x192 + "000101" & X"850", -- 0x1B8: MOVX R00, (0x85) + "111011" & X"192", -- 0x1B9: CALL 0x192 + "000101" & X"840", -- 0x1BA: MOVX R00, (0x84) + "111011" & X"192", -- 0x1BB: CALL 0x192 + "000101" & X"830", -- 0x1BC: MOVX R00, (0x83) + "111011" & X"192", -- 0x1BD: CALL 0x192 + "000101" & X"820", -- 0x1BE: MOVX R00, (0x82) + "111011" & X"192", -- 0x1BF: CALL 0x192 + "000101" & X"810", -- 0x1C0: MOVX R00, (0x81) + "111011" & X"192", -- 0x1C1: CALL 0x192 + "000101" & X"800", -- 0x1C2: MOVX R00, (0x80) + "111011" & X"192", -- 0x1C3: CALL 0x192 + "111101" & X"000", -- 0x1C4: POP R00 + "111110" & X"000", -- 0x1C5: RET + "111100" & X"000", -- 0x1C6: PUSH R00 + "000011" & X"0D0", -- 0x1C7: MOV R00, 0x0D + "100100" & X"130", -- 0x1C8: XOUT (0x13), R00 + "000011" & X"1E0", -- 0x1C9: MOV R00, 0x1E + "001101" & X"5E0", -- 0x1CA: MOVC (0x5E), R00 + "001101" & X"5F0", -- 0x1CB: MOVC (0x5F), R00 + "000011" & X"E80", -- 0x1CC: MOV R00, 0xE8 + "001101" & X"600", -- 0x1CD: MOVC (0x60), R00 + "000011" & X"030", -- 0x1CE: MOV R00, 0x03 + "001101" & X"610", -- 0x1CF: MOVC (0x61), R00 + "111101" & X"000", -- 0x1D0: POP R00 + "111110" & X"000", -- 0x1D1: RET + "111100" & X"001", -- 0x1D2: PUSH R01 + "111100" & X"002", -- 0x1D3: PUSH R02 + "111100" & X"003", -- 0x1D4: PUSH R03 + "001010" & X"602", -- 0x1D5: MOVC R02, (0x60) + "001010" & X"613", -- 0x1D6: MOVC R03, (0x61) + "001010" & X"5E1", -- 0x1D7: MOVC R01, (0x5E) + "001010" & X"5F0", -- 0x1D8: MOVC R00, (0x5F) + "001110" & X"010", -- 0x1D9: CMP R00, R01 + "111001" & X"1E6", -- 0x1DA: JEQ 0x1E6 + "001001" & X"010", -- 0x1DB: MOVC R00, (R01) + "010001" & X"011", -- 0x1DC: INC R01 + "001111" & X"5E1", -- 0x1DD: CMP R01, 0x5E + "111010" & X"1E0", -- 0x1DE: JNE 0x1E0 + "000011" & X"1E1", -- 0x1DF: MOV R01, 0x1E + "001101" & X"5E1", -- 0x1E0: MOVC (0x5E), R01 + "010101" & X"000", -- 0x1E1: CLRC + "111101" & X"003", -- 0x1E2: POP R03 + "111101" & X"002", -- 0x1E3: POP R02 + "111101" & X"001", -- 0x1E4: POP R01 + "111110" & X"000", -- 0x1E5: RET + "111011" & X"2A7", -- 0x1E6: CALL 0x2A7 + "010101" & X"012", -- 0x1E7: DEC R02 + "010111" & X"003", -- 0x1E8: SUBC R03, 0x00 + "110010" & X"1D8", -- 0x1E9: JNZ 0x1D8 + "001111" & X"002", -- 0x1EA: TST R02 + "110010" & X"1D8", -- 0x1EB: JNZ 0x1D8 + "101011" & X"000", -- 0x1EC: SETC + "110000" & X"1E2", -- 0x1ED: JMP 0x1E2 + "011001" & X"0F0", -- 0x1EE: AND R00, 0x0F + "001111" & X"0A0", -- 0x1EF: CMP R00, 0x0A + "110101" & X"1F2", -- 0x1F0: JLT 0x1F2 + "010001" & X"070", -- 0x1F1: ADD R00, 0x07 + "010001" & X"300", -- 0x1F2: ADD R00, 0x30 + "111110" & X"000", -- 0x1F3: RET + "111100" & X"000", -- 0x1F4: PUSH R00 + "111011" & X"1EE", -- 0x1F5: CALL 0x1EE + "000010" & X"001", -- 0x1F6: MOV R01, R00 + "111101" & X"000", -- 0x1F7: POP R00 + "101010" & X"000", -- 0x1F8: SWAP R00 + "111011" & X"1EE", -- 0x1F9: CALL 0x1EE + "111110" & X"000", -- 0x1FA: RET + "000011" & X"002", -- 0x1FB: MOV R02, 0x00 + "000011" & X"030", -- 0x1FC: MOV R00, 0x03 + "111011" & X"247", -- 0x1FD: CALL 0x247 + "111011" & X"2A0", -- 0x1FE: CALL 0x2A0 + "000011" & X"002", -- 0x1FF: MOV R02, 0x00 + "000011" & X"030", -- 0x200: MOV R00, 0x03 + "111011" & X"247", -- 0x201: CALL 0x247 + "111011" & X"2A0", -- 0x202: CALL 0x2A0 + "000011" & X"002", -- 0x203: MOV R02, 0x00 + "000011" & X"020", -- 0x204: MOV R00, 0x02 + "111011" & X"247", -- 0x205: CALL 0x247 + "111011" & X"2A7", -- 0x206: CALL 0x2A7 + "000011" & X"280", -- 0x207: MOV R00, 0x28 + "111011" & X"218", -- 0x208: CALL 0x218 + "000011" & X"0C0", -- 0x209: MOV R00, 0x0C + "111011" & X"218", -- 0x20A: CALL 0x218 + "000011" & X"060", -- 0x20B: MOV R00, 0x06 + "111011" & X"218", -- 0x20C: CALL 0x218 + "000011" & X"010", -- 0x20D: MOV R00, 0x01 + "111011" & X"218", -- 0x20E: CALL 0x218 + "111110" & X"000", -- 0x20F: RET + "111100" & X"000", -- 0x210: PUSH R00 + "111011" & X"23B", -- 0x211: CALL 0x23B + "011001" & X"800", -- 0x212: AND R00, 0x80 + "110001" & X"216", -- 0x213: JZ 0x216 + "111011" & X"2BE", -- 0x214: CALL 0x2BE + "110000" & X"211", -- 0x215: JMP 0x211 + "111101" & X"000", -- 0x216: POP R00 + "111110" & X"000", -- 0x217: RET + "111100" & X"002", -- 0x218: PUSH R02 + "000011" & X"002", -- 0x219: MOV R02, 0x00 + "111011" & X"234", -- 0x21A: CALL 0x234 + "111101" & X"002", -- 0x21B: POP R02 + "111110" & X"000", -- 0x21C: RET + "111100" & X"000", -- 0x21D: PUSH R00 + "000100" & X"010", -- 0x21E: MOVX R00, (R01) + "010001" & X"011", -- 0x21F: INC R01 + "001111" & X"000", -- 0x220: TST R00 + "110001" & X"224", -- 0x221: JZ 0x224 + "111011" & X"22F", -- 0x222: CALL 0x22F + "110000" & X"21E", -- 0x223: JMP 0x21E + "111101" & X"000", -- 0x224: POP R00 + "111110" & X"000", -- 0x225: RET + "111100" & X"000", -- 0x226: PUSH R00 + "001001" & X"010", -- 0x227: MOVC R00, (R01) + "010001" & X"011", -- 0x228: INC R01 + "001111" & X"000", -- 0x229: TST R00 + "110001" & X"22D", -- 0x22A: JZ 0x22D + "111011" & X"22F", -- 0x22B: CALL 0x22F + "110000" & X"227", -- 0x22C: JMP 0x227 + "111101" & X"000", -- 0x22D: POP R00 + "111110" & X"000", -- 0x22E: RET + "111100" & X"002", -- 0x22F: PUSH R02 + "000011" & X"402", -- 0x230: MOV R02, 0x40 + "111011" & X"234", -- 0x231: CALL 0x234 + "111101" & X"002", -- 0x232: POP R02 + "111110" & X"000", -- 0x233: RET + "111011" & X"210", -- 0x234: CALL 0x210 + "111100" & X"000", -- 0x235: PUSH R00 + "101010" & X"000", -- 0x236: SWAP R00 + "111011" & X"247", -- 0x237: CALL 0x247 + "111101" & X"000", -- 0x238: POP R00 + "111011" & X"247", -- 0x239: CALL 0x247 + "111110" & X"000", -- 0x23A: RET + "111100" & X"002", -- 0x23B: PUSH R02 + "000011" & X"002", -- 0x23C: MOV R02, 0x00 + "111011" & X"240", -- 0x23D: CALL 0x240 + "111101" & X"002", -- 0x23E: POP R02 + "111110" & X"000", -- 0x23F: RET + "111011" & X"25A", -- 0x240: CALL 0x25A + "101010" & X"000", -- 0x241: SWAP R00 + "111100" & X"000", -- 0x242: PUSH R00 + "111011" & X"25A", -- 0x243: CALL 0x25A + "111101" & X"002", -- 0x244: POP R02 + "011010" & X"020", -- 0x245: OR R00, R02 + "111110" & X"000", -- 0x246: RET + "111100" & X"001", -- 0x247: PUSH R01 + "011001" & X"0F0", -- 0x248: AND R00, 0x0F + "000010" & X"001", -- 0x249: MOV R01, R00 + "011010" & X"021", -- 0x24A: OR R01, R02 + "100100" & X"031", -- 0x24B: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x24C: CALL 0x2BE + "000010" & X"001", -- 0x24D: MOV R01, R00 + "011010" & X"021", -- 0x24E: OR R01, R02 + "011011" & X"801", -- 0x24F: OR R01, 0x80 + "100100" & X"031", -- 0x250: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x251: CALL 0x2BE + "000010" & X"001", -- 0x252: MOV R01, R00 + "011010" & X"021", -- 0x253: OR R01, R02 + "100100" & X"031", -- 0x254: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x255: CALL 0x2BE + "011011" & X"201", -- 0x256: OR R01, 0x20 + "100100" & X"031", -- 0x257: XOUT (0x03), R01 + "111101" & X"001", -- 0x258: POP R01 + "111110" & X"000", -- 0x259: RET + "111100" & X"001", -- 0x25A: PUSH R01 + "000011" & X"201", -- 0x25B: MOV R01, 0x20 + "011010" & X"021", -- 0x25C: OR R01, R02 + "100100" & X"031", -- 0x25D: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x25E: CALL 0x2BE + "000011" & X"201", -- 0x25F: MOV R01, 0x20 + "011010" & X"021", -- 0x260: OR R01, R02 + "011011" & X"801", -- 0x261: OR R01, 0x80 + "100100" & X"031", -- 0x262: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x263: CALL 0x2BE + "101000" & X"030", -- 0x264: XIN R00, (0x03) + "011001" & X"0F0", -- 0x265: AND R00, 0x0F + "000011" & X"201", -- 0x266: MOV R01, 0x20 + "011010" & X"021", -- 0x267: OR R01, R02 + "100100" & X"031", -- 0x268: XOUT (0x03), R01 + "111011" & X"2BE", -- 0x269: CALL 0x2BE + "111101" & X"001", -- 0x26A: POP R01 + "111110" & X"000", -- 0x26B: RET + "111100" & X"000", -- 0x26C: PUSH R00 + "000011" & X"020", -- 0x26D: MOV R00, 0x02 + "100100" & X"0E0", -- 0x26E: XOUT (0x0E), R00 + "111101" & X"000", -- 0x26F: POP R00 + "111110" & X"000", -- 0x270: RET + "111100" & X"000", -- 0x271: PUSH R00 + "000011" & X"010", -- 0x272: MOV R00, 0x01 + "100100" & X"0E0", -- 0x273: XOUT (0x0E), R00 + "111101" & X"000", -- 0x274: POP R00 + "111110" & X"000", -- 0x275: RET + "111011" & X"28C", -- 0x276: CALL 0x28C + "100100" & X"0C1", -- 0x277: XOUT (0x0C), R01 + "100100" & X"0B0", -- 0x278: XOUT (0x0B), R00 + "111110" & X"000", -- 0x279: RET + "111011" & X"28C", -- 0x27A: CALL 0x28C + "100100" & X"0D0", -- 0x27B: XOUT (0x0D), R00 + "111110" & X"000", -- 0x27C: RET + "111100" & X"000", -- 0x27D: PUSH R00 + "000100" & X"010", -- 0x27E: MOVX R00, (R01) + "010001" & X"011", -- 0x27F: INC R01 + "001111" & X"000", -- 0x280: TST R00 + "110001" & X"284", -- 0x281: JZ 0x284 + "111011" & X"27A", -- 0x282: CALL 0x27A + "110000" & X"27E", -- 0x283: JMP 0x27E + "111101" & X"000", -- 0x284: POP R00 + "111110" & X"000", -- 0x285: RET + "111011" & X"26C", -- 0x286: CALL 0x26C + "111011" & X"27D", -- 0x287: CALL 0x27D + "111110" & X"000", -- 0x288: RET + "111011" & X"27D", -- 0x289: CALL 0x27D + "111011" & X"26C", -- 0x28A: CALL 0x26C + "111110" & X"000", -- 0x28B: RET + "111100" & X"000", -- 0x28C: PUSH R00 + "101000" & X"0E0", -- 0x28D: XIN R00, (0x0E) + "011001" & X"020", -- 0x28E: AND R00, 0x02 + "110001" & X"28D", -- 0x28F: JZ 0x28D + "111101" & X"000", -- 0x290: POP R00 + "111110" & X"000", -- 0x291: RET + "111100" & X"00F", -- 0x292: PUSH R15 + "000011" & X"0AF", -- 0x293: MOV R15, 0x0A + "111011" & X"299", -- 0x294: CALL 0x299 + "010101" & X"01F", -- 0x295: DEC R15 + "110010" & X"294", -- 0x296: JNZ 0x294 + "111101" & X"00F", -- 0x297: POP R15 + "111110" & X"000", -- 0x298: RET + "111100" & X"00F", -- 0x299: PUSH R15 + "000011" & X"0AF", -- 0x29A: MOV R15, 0x0A + "111011" & X"2A0", -- 0x29B: CALL 0x2A0 + "010101" & X"01F", -- 0x29C: DEC R15 + "110010" & X"29B", -- 0x29D: JNZ 0x29B + "111101" & X"00F", -- 0x29E: POP R15 + "111110" & X"000", -- 0x29F: RET + "111100" & X"00F", -- 0x2A0: PUSH R15 + "000011" & X"0AF", -- 0x2A1: MOV R15, 0x0A + "111011" & X"2A7", -- 0x2A2: CALL 0x2A7 + "010101" & X"01F", -- 0x2A3: DEC R15 + "110010" & X"2A2", -- 0x2A4: JNZ 0x2A2 + "111101" & X"00F", -- 0x2A5: POP R15 + "111110" & X"000", -- 0x2A6: RET + "111100" & X"00F", -- 0x2A7: PUSH R15 + "000011" & X"0AF", -- 0x2A8: MOV R15, 0x0A + "111011" & X"2AE", -- 0x2A9: CALL 0x2AE + "010101" & X"01F", -- 0x2AA: DEC R15 + "110010" & X"2A9", -- 0x2AB: JNZ 0x2A9 + "111101" & X"00F", -- 0x2AC: POP R15 + "111110" & X"000", -- 0x2AD: RET + "111100" & X"00F", -- 0x2AE: PUSH R15 + "000011" & X"0AF", -- 0x2AF: MOV R15, 0x0A + "111011" & X"2B5", -- 0x2B0: CALL 0x2B5 + "010101" & X"01F", -- 0x2B1: DEC R15 + "110010" & X"2B0", -- 0x2B2: JNZ 0x2B0 + "111101" & X"00F", -- 0x2B3: POP R15 + "111110" & X"000", -- 0x2B4: RET + "111100" & X"00F", -- 0x2B5: PUSH R15 + "000011" & X"63F", -- 0x2B6: MOV R15, 0x63 + "000000" & X"000", -- 0x2B7: NOP + "000000" & X"000", -- 0x2B8: NOP + "000000" & X"000", -- 0x2B9: NOP + "010101" & X"01F", -- 0x2BA: DEC R15 + "110010" & X"2B7", -- 0x2BB: JNZ 0x2B7 + "111101" & X"00F", -- 0x2BC: POP R15 + "111110" & X"000", -- 0x2BD: RET + "111100" & X"00F", -- 0x2BE: PUSH R15 + "000011" & X"09F", -- 0x2BF: MOV R15, 0x09 + "000000" & X"000", -- 0x2C0: NOP + "000000" & X"000", -- 0x2C1: NOP + "000000" & X"000", -- 0x2C2: NOP + "010101" & X"01F", -- 0x2C3: DEC R15 + "110010" & X"2C0", -- 0x2C4: JNZ 0x2C0 + "111101" & X"00F", -- 0x2C5: POP R15 + "111110" & X"000", -- 0x2C6: RET + "111100" & X"001", -- 0x2C7: PUSH R01 + "101000" & X"061", -- 0x2C8: XIN R01, (0x06) + "011001" & X"021", -- 0x2C9: AND R01, 0x02 + "110010" & X"2C8", -- 0x2CA: JNZ 0x2C8 + "100100" & X"020", -- 0x2CB: XOUT (0x02), R00 + "111101" & X"001", -- 0x2CC: POP R01 + "111110" & X"000", -- 0x2CD: RET + "111100" & X"001", -- 0x2CE: PUSH R01 + "101000" & X"061", -- 0x2CF: XIN R01, (0x06) + "011001" & X"101", -- 0x2D0: AND R01, 0x10 + "110001" & X"2CF", -- 0x2D1: JZ 0x2CF + "101000" & X"020", -- 0x2D2: XIN R00, (0x02) + "111101" & X"001", -- 0x2D3: POP R01 + "111110" & X"000", -- 0x2D4: RET + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000", + "000000" & X"000" + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : inst_addr_t; + signal jtag_ld_dout : inst_t; + signal jtag_ld_din : inst_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (31 downto 0); + constant id : unsigned (31 downto 0) := X"BABE" & X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst1 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 1 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-inst_addr_t'length+1); + jtag_ld_din <= user_regi(inst_t'length-1 downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto inst_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= imem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + imem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= imem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/src/systest/vga_test_xrom.vhdl b/projects/cpu/src/systest/vga_test_xrom.vhdl new file mode 100644 index 0000000..0024ec0 --- /dev/null +++ b/projects/cpu/src/systest/vga_test_xrom.vhdl @@ -0,0 +1,317 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: The ROM file for use in your VHDL design +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library work; +use work.cpu_pkg.all; + +-- JASM_ROM_INSERT_HERE +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); +END xrom; + +ARCHITECTURE vga_test OF xrom IS + + type xmem_rom_t is array (0 to 255) of dmem_data_t; + + -- Assembled from vga_test.jsm + constant xmem_rom : xmem_rom_t := + ( + X"0D", -- 0x00 + X"0A", -- 0x01 + X"00", -- 0x02 + X"53", -- 0x03 + X"44", -- 0x04 + X"52", -- 0x05 + X"41", -- 0x06 + X"4D", -- 0x07 + X"20", -- 0x08 + X"54", -- 0x09 + X"65", -- 0x0A + X"73", -- 0x0B + X"74", -- 0x0C + X"00", -- 0x0D + X"43", -- 0x0E + X"6C", -- 0x0F + X"65", -- 0x10 + X"61", -- 0x11 + X"72", -- 0x12 + X"69", -- 0x13 + X"6E", -- 0x14 + X"67", -- 0x15 + X"20", -- 0x16 + X"53", -- 0x17 + X"44", -- 0x18 + X"52", -- 0x19 + X"41", -- 0x1A + X"4D", -- 0x1B + X"00", -- 0x1C + X"57", -- 0x1D + X"72", -- 0x1E + X"69", -- 0x1F + X"74", -- 0x20 + X"69", -- 0x21 + X"6E", -- 0x22 + X"67", -- 0x23 + X"20", -- 0x24 + X"53", -- 0x25 + X"44", -- 0x26 + X"52", -- 0x27 + X"41", -- 0x28 + X"4D", -- 0x29 + X"00", -- 0x2A + X"52", -- 0x2B + X"65", -- 0x2C + X"61", -- 0x2D + X"64", -- 0x2E + X"69", -- 0x2F + X"6E", -- 0x30 + X"67", -- 0x31 + X"20", -- 0x32 + X"53", -- 0x33 + X"44", -- 0x34 + X"52", -- 0x35 + X"41", -- 0x36 + X"4D", -- 0x37 + X"00", -- 0x38 + X"52", -- 0x39 + X"65", -- 0x3A + X"61", -- 0x3B + X"64", -- 0x3C + X"69", -- 0x3D + X"6E", -- 0x3E + X"67", -- 0x3F + X"20", -- 0x40 + X"42", -- 0x41 + X"69", -- 0x42 + X"74", -- 0x43 + X"6D", -- 0x44 + X"61", -- 0x45 + X"70", -- 0x46 + X"00", -- 0x47 + X"56", -- 0x48 + X"65", -- 0x49 + X"72", -- 0x4A + X"69", -- 0x4B + X"66", -- 0x4C + X"79", -- 0x4D + X"20", -- 0x4E + X"4F", -- 0x4F + X"4B", -- 0x50 + X"00", -- 0x51 + X"46", -- 0x52 + X"61", -- 0x53 + X"69", -- 0x54 + X"6C", -- 0x55 + X"65", -- 0x56 + X"64", -- 0x57 + X"20", -- 0x58 + X"61", -- 0x59 + X"74", -- 0x5A + X"20", -- 0x5B + X"00", -- 0x5C + X"2E", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + +begin + +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +end vga_test; + diff --git a/projects/cpu/src/systest/vga_test_xrom_ld.vhdl b/projects/cpu/src/systest/vga_test_xrom_ld.vhdl new file mode 100644 index 0000000..3f12592 --- /dev/null +++ b/projects/cpu/src/systest/vga_test_xrom_ld.vhdl @@ -0,0 +1,413 @@ +------------------------------------------------------------------------- +-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL +-- This file: loadable ROM +-- +-- Copyright (C) 2007 J. Ahrensfeld +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . +-- +-- For questions and ideas, please contact the author at jens@jayfield.org +-- +-------------------------------------------------------------------------- + +LIBRARY ieee; +use IEEE.STD_LOGIC_1164.ALL; +USE ieee.numeric_std.ALL; + +library UNISIM; +use UNISIM.VComponents.all; + +library work; +use work.cpu_pkg.all; + +ENTITY xrom IS + Port ( + clk : in STD_LOGIC; + ce : in STD_LOGIC; + addr : in dmem_addr_t; + dout : out dmem_data_t + ); + +END xrom; + +ARCHITECTURE loadable OF xrom IS + + -- JASM_ROM_INSERT_HERE + + -- Assembled from vga_test.jsm + type xmem_rom_t is array (0 to 255) of dmem_data_t; + signal xmem_rom : xmem_rom_t := + ( + X"0D", -- 0x00 + X"0A", -- 0x01 + X"00", -- 0x02 + X"53", -- 0x03 + X"44", -- 0x04 + X"52", -- 0x05 + X"41", -- 0x06 + X"4D", -- 0x07 + X"20", -- 0x08 + X"54", -- 0x09 + X"65", -- 0x0A + X"73", -- 0x0B + X"74", -- 0x0C + X"00", -- 0x0D + X"43", -- 0x0E + X"6C", -- 0x0F + X"65", -- 0x10 + X"61", -- 0x11 + X"72", -- 0x12 + X"69", -- 0x13 + X"6E", -- 0x14 + X"67", -- 0x15 + X"20", -- 0x16 + X"53", -- 0x17 + X"44", -- 0x18 + X"52", -- 0x19 + X"41", -- 0x1A + X"4D", -- 0x1B + X"00", -- 0x1C + X"57", -- 0x1D + X"72", -- 0x1E + X"69", -- 0x1F + X"74", -- 0x20 + X"69", -- 0x21 + X"6E", -- 0x22 + X"67", -- 0x23 + X"20", -- 0x24 + X"53", -- 0x25 + X"44", -- 0x26 + X"52", -- 0x27 + X"41", -- 0x28 + X"4D", -- 0x29 + X"00", -- 0x2A + X"52", -- 0x2B + X"65", -- 0x2C + X"61", -- 0x2D + X"64", -- 0x2E + X"69", -- 0x2F + X"6E", -- 0x30 + X"67", -- 0x31 + X"20", -- 0x32 + X"53", -- 0x33 + X"44", -- 0x34 + X"52", -- 0x35 + X"41", -- 0x36 + X"4D", -- 0x37 + X"00", -- 0x38 + X"52", -- 0x39 + X"65", -- 0x3A + X"61", -- 0x3B + X"64", -- 0x3C + X"69", -- 0x3D + X"6E", -- 0x3E + X"67", -- 0x3F + X"20", -- 0x40 + X"42", -- 0x41 + X"69", -- 0x42 + X"74", -- 0x43 + X"6D", -- 0x44 + X"61", -- 0x45 + X"70", -- 0x46 + X"00", -- 0x47 + X"56", -- 0x48 + X"65", -- 0x49 + X"72", -- 0x4A + X"69", -- 0x4B + X"66", -- 0x4C + X"79", -- 0x4D + X"20", -- 0x4E + X"4F", -- 0x4F + X"4B", -- 0x50 + X"00", -- 0x51 + X"46", -- 0x52 + X"61", -- 0x53 + X"69", -- 0x54 + X"6C", -- 0x55 + X"65", -- 0x56 + X"64", -- 0x57 + X"20", -- 0x58 + X"61", -- 0x59 + X"74", -- 0x5A + X"20", -- 0x5B + X"00", -- 0x5C + X"2E", -- 0x5D + X"00", -- 0x5E + X"00", -- 0x5F + X"00", -- 0x60 + X"00", -- 0x61 + X"00", -- 0x62 + X"00", -- 0x63 + X"00", -- 0x64 + X"00", -- 0x65 + X"00", -- 0x66 + X"00", -- 0x67 + X"00", -- 0x68 + X"00", -- 0x69 + X"00", -- 0x6A + X"00", -- 0x6B + X"00", -- 0x6C + X"00", -- 0x6D + X"00", -- 0x6E + X"00", -- 0x6F + X"00", -- 0x70 + X"00", -- 0x71 + X"00", -- 0x72 + X"00", -- 0x73 + X"00", -- 0x74 + X"00", -- 0x75 + X"00", -- 0x76 + X"00", -- 0x77 + X"00", -- 0x78 + X"00", -- 0x79 + X"00", -- 0x7A + X"00", -- 0x7B + X"00", -- 0x7C + X"00", -- 0x7D + X"00", -- 0x7E + X"00", -- 0x7F + X"00", -- 0x80 + X"00", -- 0x81 + X"00", -- 0x82 + X"00", -- 0x83 + X"00", -- 0x84 + X"00", -- 0x85 + X"00", -- 0x86 + X"00", -- 0x87 + X"00", -- 0x88 + X"00", -- 0x89 + X"00", -- 0x8A + X"00", -- 0x8B + X"00", -- 0x8C + X"00", -- 0x8D + X"00", -- 0x8E + X"00", -- 0x8F + X"00", -- 0x90 + X"00", -- 0x91 + X"00", -- 0x92 + X"00", -- 0x93 + X"00", -- 0x94 + X"00", -- 0x95 + X"00", -- 0x96 + X"00", -- 0x97 + X"00", -- 0x98 + X"00", -- 0x99 + X"00", -- 0x9A + X"00", -- 0x9B + X"00", -- 0x9C + X"00", -- 0x9D + X"00", -- 0x9E + X"00", -- 0x9F + X"00", -- 0xA0 + X"00", -- 0xA1 + X"00", -- 0xA2 + X"00", -- 0xA3 + X"00", -- 0xA4 + X"00", -- 0xA5 + X"00", -- 0xA6 + X"00", -- 0xA7 + X"00", -- 0xA8 + X"00", -- 0xA9 + X"00", -- 0xAA + X"00", -- 0xAB + X"00", -- 0xAC + X"00", -- 0xAD + X"00", -- 0xAE + X"00", -- 0xAF + X"00", -- 0xB0 + X"00", -- 0xB1 + X"00", -- 0xB2 + X"00", -- 0xB3 + X"00", -- 0xB4 + X"00", -- 0xB5 + X"00", -- 0xB6 + X"00", -- 0xB7 + X"00", -- 0xB8 + X"00", -- 0xB9 + X"00", -- 0xBA + X"00", -- 0xBB + X"00", -- 0xBC + X"00", -- 0xBD + X"00", -- 0xBE + X"00", -- 0xBF + X"00", -- 0xC0 + X"00", -- 0xC1 + X"00", -- 0xC2 + X"00", -- 0xC3 + X"00", -- 0xC4 + X"00", -- 0xC5 + X"00", -- 0xC6 + X"00", -- 0xC7 + X"00", -- 0xC8 + X"00", -- 0xC9 + X"00", -- 0xCA + X"00", -- 0xCB + X"00", -- 0xCC + X"00", -- 0xCD + X"00", -- 0xCE + X"00", -- 0xCF + X"00", -- 0xD0 + X"00", -- 0xD1 + X"00", -- 0xD2 + X"00", -- 0xD3 + X"00", -- 0xD4 + X"00", -- 0xD5 + X"00", -- 0xD6 + X"00", -- 0xD7 + X"00", -- 0xD8 + X"00", -- 0xD9 + X"00", -- 0xDA + X"00", -- 0xDB + X"00", -- 0xDC + X"00", -- 0xDD + X"00", -- 0xDE + X"00", -- 0xDF + X"00", -- 0xE0 + X"00", -- 0xE1 + X"00", -- 0xE2 + X"00", -- 0xE3 + X"00", -- 0xE4 + X"00", -- 0xE5 + X"00", -- 0xE6 + X"00", -- 0xE7 + X"00", -- 0xE8 + X"00", -- 0xE9 + X"00", -- 0xEA + X"00", -- 0xEB + X"00", -- 0xEC + X"00", -- 0xED + X"00", -- 0xEE + X"00", -- 0xEF + X"00", -- 0xF0 + X"00", -- 0xF1 + X"00", -- 0xF2 + X"00", -- 0xF3 + X"00", -- 0xF4 + X"00", -- 0xF5 + X"00", -- 0xF6 + X"00", -- 0xF7 + X"00", -- 0xF8 + X"00", -- 0xF9 + X"00", -- 0xFA + X"00", -- 0xFB + X"00", -- 0xFC + X"00", -- 0xFD + X"00", -- 0xFE + X"00" -- 0xFF + ); + + signal jtag_ld_clk : STD_LOGIC; + signal jtag_ld_we : STD_LOGIC; + signal jtag_ld_addr : dmem_addr_t; + signal jtag_ld_dout : dmem_data_t; + signal jtag_ld_din : dmem_data_t; + signal bs_rst, bs_sel, bs_shift, bs_tdi, bs_tdo : std_logic; + signal bs_capture, bs_clk0, bs_clk1, bs_update0, bs_update1 : std_logic; + signal user_regi, user_rego : unsigned (15 downto 0); + constant id : unsigned (15 downto 0) := X"BEEF"; + +begin + +-------------------------------------------------------------------------- +-- Virtex-4: JTAG Loader +-------------------------------------------------------------------------- + i00_BUFG : BUFG + port map + ( + O => bs_clk1, + I => bs_clk0 + ); + + i01_BUFG : BUFG + port map + ( + O => bs_update1, + I => bs_update0 + ); + + BSCAN_VIRTEX4_inst2 : BSCAN_VIRTEX4 + generic map + ( + JTAG_CHAIN => 2 -- Value to set BSCAN site of device. Possible values: (1,2,3 or 4) + ) + port map + ( + CAPTURE => bs_capture, -- CAPTURE output from TAP controller + DRCK => bs_clk0, -- Data register output for USER functions + RESET => bs_rst, -- Reset output from TAP controller + SEL => bs_sel, -- USER active output + SHIFT => bs_shift, -- SHIFT output from TAP controller + TDI => bs_tdi, -- TDI output from TAP controller + UPDATE => bs_update0, -- UPDATE output from TAP controller + TDO => bs_tdo -- Data input for USER function + ); + + jtag_ld_addr <= user_regi(user_regi'left downto user_regi'left-dmem_data_t'length+1); + jtag_ld_din <= user_regi(dmem_data_t'left downto 0); + jtag_ld_clk <= bs_update1; + jtag_ld_we <= bs_sel; + +sipo: + process (bs_rst, bs_clk1, bs_tdi, bs_shift) + begin + if bs_rst = '1' then + user_regi <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_regi <= bs_tdi & user_regi(user_regi'left downto 1); + end if; + end if; + end process; + +piso: + process (bs_rst, bs_clk1, bs_shift, user_rego) + begin + bs_tdo <= user_rego(0); + if bs_rst = '1' then + user_rego <= (others => '0'); + elsif rising_edge(bs_clk1) then + if bs_shift = '1' then + user_rego <= user_rego(0) & user_rego(user_rego'left downto 1); + else + user_rego <= (user_rego'left downto dmem_data_t'length => '0') & jtag_ld_dout; +-- user_rego <= id; + end if; + end if; + end process; + +-------------------------------------------------------------------------- +-- ROM Read/Write +-------------------------------------------------------------------------- +PROM_READ: + process(clk, ce) + begin + if rising_edge(clk) and ce = '1' then + dout <= xmem_rom(to_integer(addr)); + end if; + end process; + +PROM_WRITE: + process(jtag_ld_clk, jtag_ld_we) + begin + if rising_edge(jtag_ld_clk) then + if jtag_ld_we = '1' then + xmem_rom(to_integer(jtag_ld_addr)) <= jtag_ld_din; + else + jtag_ld_dout <= xmem_rom(to_integer(jtag_ld_addr)); + end if; + end if; + end process; + +-------------------------------------------------------------------------- +end loadable; diff --git a/projects/cpu/syn/ise91/systest/project/systest.lso b/projects/cpu/syn/ise91/systest/project/systest.lso new file mode 100644 index 0000000..22de730 --- /dev/null +++ b/projects/cpu/syn/ise91/systest/project/systest.lso @@ -0,0 +1 @@ +work diff --git a/projects/cpu/syn/ise91/systest/project/systest.prj b/projects/cpu/syn/ise91/systest/project/systest.prj new file mode 100644 index 0000000..2968956 --- /dev/null +++ b/projects/cpu/syn/ise91/systest/project/systest.prj @@ -0,0 +1,34 @@ +vhdl work "../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/vga_types.vhd" +vhdl work "../../src/systest/sdram_config.vhd" +vhdl work "../../../../lib/misc/utils_pkg.vhd" +vhdl work "../../../../lib/FIFO/src/gray_counter.vhd" +vhdl work "../../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/vga_sync.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/dpram.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_types.vhd" +vhdl work "../../../../lib/FIFO/src/sync_fifo_ctrl.vhd" +vhdl work "../../../../lib/FIFO/src/async_fifo_ctrl.vhd" +vhdl work "../../src/systest/vga_test_irom_ld.vhdl" +vhdl work "../../../../lib/uart/kcuart_tx.vhd" +vhdl work "../../../../lib/uart/kcuart_rx.vhd" +vhdl work "../../../../lib/uart/bbfifo_16x8.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/linefifo.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/clkgen_virtex4.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_cmd.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/reset_virtex4.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/fifo_sync.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/ddr_phy_virtex4.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/clockgen_virtex4.vhd" +vhdl work "../../src/systest/vga_test_xrom_ld.vhdl" +vhdl work "../../src/systest/cpu_embedded.vhd" +vhdl work "../../../../lib/uart/uart_tx.vhd" +vhdl work "../../../../lib/uart/uart_rx.vhd" +vhdl work "../../../../lib/misc/lcd_port.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd" +vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd" +vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_4/src/sdram_ctrl_top.vhd" +vhdl work "../../src/systest/systest.vhd" diff --git a/projects/cpu/syn/ise91/systest/project/systest.ucf b/projects/cpu/syn/ise91/systest/project/systest.ucf new file mode 100644 index 0000000..0492f71 --- /dev/null +++ b/projects/cpu/syn/ise91/systest/project/systest.ucf @@ -0,0 +1,337 @@ +# +# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" +# SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR +# XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION +# AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION +# OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS +# IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, +# AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE +# FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY +# WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE +# IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR +# REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF +# INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE. +# +# (c) Copyright 2005 Xilinx, Inc. +# All rights reserved. +# + +CONFIG STEPPING = "ES"; + +# Bus clock nets +NET "clk" TNM_NET = "clk"; +TIMESPEC "TS_clk" = PERIOD "clk" 9.9 ns HIGH 50 %; + +NET "inst_vga_backend/inst_clkgen/vga_clk0" TNM_NET = "vga_clk"; +TIMESPEC TS_unrelate = FROM clk TO vga_clk TIG; + +NET "sys_clk_in" LOC = "AE14"; +#NET sys_clk_in IOSTANDARD = LVCMOS33; +NET "sys_rst_n_in" LOC = "D6"; +NET sys_rst_n_in PULLUP; +NET "sys_rst_n_in" TIG; +NET "rst" TIG; + +# Locate DCM/BUFG - Tools can probably figure them out automatically +# but just LOC them down to be safe +#INST inst_ddr_sdr/ctrl.inst_DCM_BASE_0 LOC = DCM_ADV_X0Y2; +#INST inst_ddr_sdr/ctrl.inst_DCM_BASE_1 LOC = DCM_ADV_X0Y1; + +//////////////////////////////////////////////////////////////////////////// +// Misc Board Signals +//////////////////////////////////////////////////////////////////////////// + +NET sys_error<0> LOC = V6; +NET sys_error<1> LOC = L24; +#NET sys_error<*> IOSTANDARD = LVCMOS33; +NET sys_error<*> DRIVE = 2; +NET sys_error<*> TIG; + +//////////////////////////////////////////////////////////////////////////// +// RS-232 +//////////////////////////////////////////////////////////////////////////// +NET sys_rx LOC = W2; +#NET sys_rx IOSTANDARD = LVCMOS33; +NET sys_rx TIG; +NET "sys_tx" LOC = "W1"; +#NET sys_tx IOSTANDARD = LVCMOS33; +NET "sys_tx" TIG; + +//////////////////////////////////////////////////////////////////////////// +// Buttons, LEDs, and DIP Switches +//////////////////////////////////////////////////////////////////////////// +# GPLED 0-3 +NET "sys_led<0>" LOC = "G5"; #GPLED0 +NET "sys_led<1>" LOC = "G6"; #GPLED1 +NET "sys_led<2>" LOC = "A11"; #GPLED2 +NET "sys_led<3>" LOC = "A12"; #GPLED3 +# North-East-South-West-Center LEDs +NET "sys_led<4>" LOC = "F9"; # W LED +NET "sys_led<5>" LOC = "E2"; # N LED +NET "sys_led<6>" LOC = "E10"; # E LED +NET "sys_led<7>" LOC = "A5"; # S LED +NET "sys_led<8>" LOC = "C6"; # C LED +NET "sys_led<*>" TIG; +NET "sys_led<*>" SLEW = SLOW; +NET "sys_led<*>" DRIVE = 2; +#NET "sys_led<*>" IOSTANDARD = LVCMOS33; +# North-East-South-West-Center Buttons +NET "sys_btn<0>" LOC = "E9"; # W Button +NET "sys_btn<1>" LOC = "E7"; # N Button +NET "sys_btn<2>" LOC = "F10"; # E Button +NET "sys_btn<3>" LOC = "A6"; # S Button +NET "sys_btn<4>" LOC = "B6"; # C Button +NET "sys_btn<*>" TIG; +NET "sys_btn<*>" PULLDOWN; +#NET "sys_btn<*>" IOSTANDARD = LVCMOS33; +# Dip Switches 1-8 +NET "sys_dip<7>" LOC = "U24"; # DIP SW 8 +NET "sys_dip<6>" LOC = "U25"; # DIP SW 7 +NET "sys_dip<5>" LOC = "V23"; # DIP SW 6 +NET "sys_dip<4>" LOC = "U23"; # DIP SW 5 +NET "sys_dip<3>" LOC = "U26"; # DIP SW 4 +NET "sys_dip<2>" LOC = "T26"; # DIP SW 3 +NET "sys_dip<1>" LOC = "R19"; # DIP SW 2 +NET "sys_dip<0>" LOC = "R20"; # DIP SW 1 +NET "sys_dip<*>" PULLDOWN; +#NET "sys_dip<*>" IOSTANDARD = LVCMOS33; +NET "sys_dip<*>" TIG; +//////////////////////////////////////////////////////////////////////////// +// LCD +//////////////////////////////////////////////////////////////////////////// +NET sys_lcd_e LOC = AE13; # LCD_E +#NET sys_lcd_e IOSTANDARD = LVCMOS33; +NET sys_lcd_e SLEW = SLOW; +NET sys_lcd_e DRIVE = 2; +NET sys_lcd_e TIG; +NET sys_lcd_rs LOC = AC17; # LCD_RS +#NET sys_lcd_rs IOSTANDARD = LVCMOS33; +NET sys_lcd_rs SLEW = SLOW; +NET sys_lcd_rs DRIVE = 2; +NET sys_lcd_rs TIG; +NET sys_lcd_rw LOC = AB17; # LCD_RW +#NET sys_lcd_rw IOSTANDARD = LVCMOS33; +NET sys_lcd_rw SLEW = SLOW; +NET sys_lcd_rw DRIVE = 2; +NET sys_lcd_rw TIG; +NET sys_lcd_d<3> LOC = AF12; # LCD_DB7 +NET sys_lcd_d<2> LOC = AE12; # LCD_DB6 +NET sys_lcd_d<1> LOC = AC10; # LCD_DB5 +NET sys_lcd_d<0> LOC = AB10; # LCD_DB4 +#NET sys_lcd_d<*> IOSTANDARD = LVCMOS33; +NET sys_lcd_d<*> SLEW = SLOW; +NET sys_lcd_d<*> DRIVE = 2; +NET sys_lcd_d<*> PULLDOWN; +NET sys_lcd_d<*> TIG; + +#------------------------------------------------------------------------------ +# IO Pad Location Constraints / Properties for DDR Controllers +#------------------------------------------------------------------------------ + +NET sys_sdr_a_q<0> LOC = C26; # DDR_A0 +NET sys_sdr_a_q<1> LOC = E17; # DDR_A1 +NET sys_sdr_a_q<2> LOC = D18; # DDR_A2 +NET sys_sdr_a_q<3> LOC = C19; # DDR_A3 +NET sys_sdr_a_q<4> LOC = F17; # DDR_A4 +NET sys_sdr_a_q<5> LOC = B18; # DDR_A5 +NET sys_sdr_a_q<6> LOC = B20; # DDR_A6 +NET sys_sdr_a_q<7> LOC = C20; # DDR_A7 +NET sys_sdr_a_q<8> LOC = D20; # DDR_A8 +NET sys_sdr_a_q<9> LOC = C21; # DDR_A9 +NET sys_sdr_a_q<10> LOC = A18; # DDR_A10 +NET sys_sdr_a_q<11> LOC = B21; # DDR_A11 +NET sys_sdr_a_q<12> LOC = A24; # DDR_A12 +NET sys_sdr_ba_q<0> LOC = B12; # DDR_BA0 +NET sys_sdr_ba_q<1> LOC = A16; # DDR_BA1 +NET sys_sdr_cas_qn LOC = F23; # DDR_CAS_N +NET sys_sdr_cke_q LOC = G22; # DDR_CKE +NET sys_sdr_cs_qn LOC = G21; # DDR_CS_N +NET sys_sdr_ras_qn LOC = F24; # DDR_RAS_N +NET sys_sdr_we_qn LOC = A23; # DDR_WE_N + +NET sys_sdr_clk_p LOC = A10; # DDR_CK1_P +NET sys_sdr_clk_fb LOC = B13; # DDR_CK1_P (FEEDBACK) +NET sys_sdr_clk_n LOC = B10; # DDR_CK1_N + +NET sys_sdr_dm_q<0> LOC = G19; # DDR_DM0 +NET sys_sdr_dm_q<1> LOC = G24; # DDR_DM1 +NET sys_sdr_dm_q<2> LOC = G20; # DDR_DM2 +NET sys_sdr_dm_q<3> LOC = C22; # DDR_DM3 + +NET sys_sdr_dqs_q<0> LOC = D25; # DDR_DQS0 +NET sys_sdr_dqs_q<1> LOC = G18; # DDR_DQS1 +NET sys_sdr_dqs_q<2> LOC = G17; # DDR_DQS2 +NET sys_sdr_dqs_q<3> LOC = D26; # DDR_DQS3 + +NET sys_sdr_data<0> LOC = H20; # DDR_D0 +NET sys_sdr_data<1> LOC = E23; # DDR_D1 +NET sys_sdr_data<2> LOC = H26; # DDR_D2 +NET sys_sdr_data<3> LOC = H22; # DDR_D3 +NET sys_sdr_data<4> LOC = E25; # DDR_D4 +NET sys_sdr_data<5> LOC = E26; # DDR_D5 +NET sys_sdr_data<6> LOC = F26; # DDR_D6 +NET sys_sdr_data<7> LOC = E24; # DDR_D7 +NET sys_sdr_data<8> LOC = E20; # DDR_D8 +NET sys_sdr_data<9> LOC = A22; # DDR_D9 +NET sys_sdr_data<10> LOC = C23; # DDR_D10 +NET sys_sdr_data<11> LOC = C24; # DDR_D11 +NET sys_sdr_data<12> LOC = A20; # DDR_D12 +NET sys_sdr_data<13> LOC = A21; # DDR_D13 +NET sys_sdr_data<14> LOC = D24; # DDR_D14 +NET sys_sdr_data<15> LOC = E18; # DDR_D15 +NET sys_sdr_data<16> LOC = F18; # DDR_D16 +NET sys_sdr_data<17> LOC = A19; # DDR_D17 +NET sys_sdr_data<18> LOC = F19; # DDR_D18 +NET sys_sdr_data<19> LOC = B23; # DDR_D19 +NET sys_sdr_data<20> LOC = E21; # DDR_D20 +NET sys_sdr_data<21> LOC = D22; # DDR_D21 +NET sys_sdr_data<22> LOC = D23; # DDR_D22 +NET sys_sdr_data<23> LOC = B24; # DDR_D23 +NET sys_sdr_data<24> LOC = E22; # DDR_D24 +NET sys_sdr_data<25> LOC = F20; # DDR_D25 +NET sys_sdr_data<26> LOC = H23; # DDR_D26 +NET sys_sdr_data<27> LOC = G25; # DDR_D27 +NET sys_sdr_data<28> LOC = G26; # DDR_D28 +NET sys_sdr_data<29> LOC = H25; # DDR_D29 +NET sys_sdr_data<30> LOC = H24; # DDR_D30 +NET sys_sdr_data<31> LOC = H21; # DDR_D31 + +NET sys_sdr_a_q<*> IOSTANDARD = SSTL2_I; +NET sys_sdr_a_q<*> FAST; + +NET sys_sdr_ba_q<*> IOSTANDARD = SSTL2_I; +NET sys_sdr_ba_q<*> FAST; + +NET sys_sdr_cas_qn IOSTANDARD = SSTL2_I; +NET sys_sdr_cas_qn FAST; + +NET sys_sdr_cke_q IOSTANDARD = SSTL2_I; +NET sys_sdr_cke_q FAST; + +NET sys_sdr_clk_p IOSTANDARD = SSTL2_I; +NET sys_sdr_clk_p FAST; +NET sys_sdr_clk_fb IOSTANDARD = LVCMOS25; +NET sys_sdr_clk_fb IOBDELAY = NONE; +NET sys_sdr_clk_n IOSTANDARD = SSTL2_I; +NET sys_sdr_clk_n FAST; + +NET sys_sdr_cas_qn IOSTANDARD = SSTL2_I; +NET sys_sdr_cas_qn FAST; + +NET sys_sdr_cs_qn IOSTANDARD = SSTL2_I; +NET sys_sdr_cs_qn FAST; + +NET sys_sdr_ras_qn IOSTANDARD = SSTL2_I; +NET sys_sdr_ras_qn FAST; + +NET sys_sdr_we_qn IOSTANDARD = SSTL2_I; +NET sys_sdr_we_qn FAST; + +NET sys_sdr_dqs_q<*> IOSTANDARD = SSTL2_II; +NET sys_sdr_dqs_q<*> IOBDELAY = NONE; +NET sys_sdr_dqs_q<*> FAST; + +NET sys_sdr_dm_q<*> IOSTANDARD = SSTL2_II; +NET sys_sdr_dm_q<*> IOBDELAY = NONE; +NET sys_sdr_dm_q<*> FAST; + +NET sys_sdr_data<*> IOSTANDARD = SSTL2_II; +NET sys_sdr_data<*> IOBDELAY = NONE; +NET sys_sdr_data<*> FAST; + +#NET "sys_sdr_data<*>" OFFSET=OUT 2.5 ns BEFORE "sys_sdr_clk_n"; + + +# Timing Constraint for DDR Feedback Clock +NET sys_sdr_clk_fb FEEDBACK = 1 ns NET sys_sdr_clk_p; + +#------------------------------------------------------------------------------ +# IO Pad Location Constraints / Properties for TFT VGA LCD Controller +#------------------------------------------------------------------------------ + +NET sys_vga_blue<0> LOC = M21; # VGA_B0 +NET sys_vga_blue<1> LOC = M26; # VGA_B1 +NET sys_vga_blue<2> LOC = L26; # VGA_B2 +NET sys_vga_blue<3> LOC = C5; # VGA_B3 +NET sys_vga_blue<4> LOC = C7; # VGA_B4 +NET sys_vga_blue<5> LOC = B7; # VGA_B5 +NET sys_vga_blue<6> LOC = G8; # VGA_B6 +NET sys_vga_blue<7> LOC = F8; # VGA_B7 +#NET sys_vga_blue<*> IOSTANDARD = LVCMOS33; +NET sys_vga_blue<*> SLEW = FAST; +NET sys_vga_blue<*> DRIVE = 8; + +NET sys_vga_clk LOC = AF8; +NET sys_vga_clk IOSTANDARD = LVDCI_25; +NET sys_vga_clk SLEW = FAST; +NET sys_vga_clk DRIVE = 8; + +NET sys_vga_green<0> LOC = M22; # VGA_G0 +NET sys_vga_green<1> LOC = M23; # VGA_G1 +NET sys_vga_green<2> LOC = M20; # VGA_G2 +NET sys_vga_green<3> LOC = E4; # VGA_G3 +NET sys_vga_green<4> LOC = D3; # VGA_G4 +NET sys_vga_green<5> LOC = H7; # VGA_G5 +NET sys_vga_green<6> LOC = H8; # VGA_G6 +NET sys_vga_green<7> LOC = C1; # VGA_G7 +#NET sys_vga_green<*> IOSTANDARD = LVCMOS33; +NET sys_vga_green<*> SLEW = FAST; +NET sys_vga_green<*> DRIVE = 8; + +NET sys_vga_hsync LOC = C10; +NET sys_vga_hsync SLEW = FAST; +NET sys_vga_hsync DRIVE = 8; +#NET sys_vga_hsync IOSTANDARD = LVCMOS33; + +NET sys_vga_red<0> LOC = N23; #VGA_R0 +NET sys_vga_red<1> LOC = N24; #VGA_R1 +NET sys_vga_red<2> LOC = N25; #VGA_R2 +NET sys_vga_red<3> LOC = C2; #VGA_R3 +NET sys_vga_red<4> LOC = G7; #VGA_R4 +NET sys_vga_red<5> LOC = F7; #VGA_R5 +NET sys_vga_red<6> LOC = E5; #VGA_R6 +NET sys_vga_red<7> LOC = E6; #VGA_R7 +#NET sys_vga_red<*> IOSTANDARD = LVCMOS33; +NET sys_vga_red<*> SLEW = FAST; +NET sys_vga_red<*> DRIVE = 8; + +NET sys_vga_vsync LOC = A8; +NET sys_vga_vsync SLEW = FAST; +NET sys_vga_vsync DRIVE = 8; +#NET sys_vga_vsync IOSTANDARD = LVCMOS33; + +NET sys_vga_blank_n LOC = M24; +NET sys_vga_blank_n SLEW = FAST; +NET sys_vga_blank_n DRIVE = 8; +#NET sys_vga_blank_n IOSTANDARD = LVCMOS33; + +NET sys_vga_sync_n LOC = L23; +NET sys_vga_sync_n SLEW = FAST; +NET sys_vga_sync_n DRIVE = 8; +#NET sys_vga_sync_n IOSTANDARD = LVCMOS33; + +#------------------------------------------------------------------------------ +# IO Pad Location Constraints / Properties for PS/2 Ports +#------------------------------------------------------------------------------ + +#Keyboard +NET sys_keyb_clk LOC = D2; +NET sys_keyb_clk SLEW = SLOW; +NET sys_keyb_clk DRIVE = 2; +NET sys_keyb_clk TIG; +NET sys_keyb_data LOC = G9; +NET sys_keyb_data SLEW = SLOW; +NET sys_keyb_data DRIVE = 2; +NET sys_keyb_data TIG; + +#Mouse +NET sys_mouse_clk LOC = B14; +NET sys_mouse_clk SLEW = SLOW; +NET sys_mouse_clk DRIVE = 2; +NET sys_mouse_clk TIG; +NET sys_mouse_data LOC = C14; +NET sys_mouse_data SLEW = SLOW; +NET sys_mouse_data DRIVE = 2; +NET sys_mouse_data TIG; + diff --git a/projects/cpu/syn/ise91/systest/project/systest.ut b/projects/cpu/syn/ise91/systest/project/systest.ut new file mode 100644 index 0000000..e6a6dd5 --- /dev/null +++ b/projects/cpu/syn/ise91/systest/project/systest.ut @@ -0,0 +1,33 @@ +-w +-g DebugBitstream:No +-g Binary:no +-g CRC:Enable +-g ConfigRate:4 +-g CclkPin:PullUp +-g M0Pin:PullUp +-g M1Pin:PullUp +-g M2Pin:PullUp +-g ProgPin:PullUp +-g DonePin:PullUp +-g InitPin:Pullup +-g CsPin:Pullup +-g DinPin:Pullup +-g BusyPin:Pullup +-g RdWrPin:Pullup +-g TckPin:PullUp +-g TdiPin:PullUp +-g TdoPin:PullUp +-g TmsPin:PullUp +-g UnusedPin:PullDown +-g UserID:0xBEEFBABE +-g DCIUpdateMode:AsRequired +-g StartUpClk:JtagClk +-g DONE_cycle:4 +-g GTS_cycle:5 +-g GWE_cycle:6 +-g LCK_cycle:NoWait +-g Match_cycle:Auto +-g Security:None +-g DonePipe:No +-g DriveDone:No +-g Encrypt:No diff --git a/projects/cpu/syn/ise91/systest/project/systest.xst b/projects/cpu/syn/ise91/systest/project/systest.xst new file mode 100644 index 0000000..fafe648 --- /dev/null +++ b/projects/cpu/syn/ise91/systest/project/systest.xst @@ -0,0 +1,59 @@ +set -tmpdir "./xst/projnav.tmp" +set -xsthdpdir "./xst" +run +-ifn systest.prj +-ifmt mixed +-ofn systest +-ofmt NGC +-p xc4vsx35-10-ff668 +-top systest +-opt_mode Speed +-opt_level 1 +-power NO +-iuc NO +-lso systest.lso +-keep_hierarchy NO +-rtlview Yes +-glob_opt AllClockNets +-read_cores YES +-write_timing_constraints NO +-cross_clock_analysis NO +-hierarchy_separator / +-bus_delimiter <> +-case maintain +-slice_utilization_ratio 100 +-bram_utilization_ratio 100 +-dsp_utilization_ratio 100 +-verilog2001 YES +-fsm_extract YES -fsm_encoding Auto +-safe_implementation No +-fsm_style lut +-ram_extract Yes +-ram_style Auto +-rom_extract Yes +-mux_style Auto +-decoder_extract YES +-priority_extract YES +-shreg_extract YES +-shift_extract YES +-xor_collapse YES +-rom_style Auto +-auto_bram_packing NO +-mux_extract YES +-resource_sharing YES +-async_to_sync NO +-use_dsp48 auto +-iobuf YES +-max_fanout 500 +-bufg 32 +-bufr 24 +-register_duplication YES +-register_balancing No +-slice_packing YES +-optimize_primitives NO +-use_clock_enable Auto +-use_sync_set Auto +-use_sync_reset Auto +-iob auto +-equivalent_register_removal NO +-slice_utilization_ratio_maxmargin 5