From 822059724f8eefc42055421771293d9b72d40ce5 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Sat, 3 Oct 2009 17:17:26 +0000 Subject: [PATCH] update Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@499 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/CPUs/MIPS/dist/tmpl/notes.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/lib/CPUs/MIPS/dist/tmpl/notes.txt b/lib/CPUs/MIPS/dist/tmpl/notes.txt index e059343..04057c7 100644 --- a/lib/CPUs/MIPS/dist/tmpl/notes.txt +++ b/lib/CPUs/MIPS/dist/tmpl/notes.txt @@ -28,6 +28,12 @@ Changes in release 12 - Status register bit 'RE'= 1 (bit 25) reverses endianess in user-mode - Status register bit 'TS' (TLB Shutdown, bit 21) is tied high to indicate the absence of a MMU. - uart_wb.vhd: added interrupt enable +- Interrupt pending flags (IP) are not anymore masked by Interrupt mask flags (IM) in H/W. + Masking has to be done in S/W. H/W masking was removed because it isn't MIPS-compliant. +- added NMI pin (more MIPS compliant). Asserting causes exception. Exception vector is reset (0xBFC00000). + Using NMI as reset is dangerous because periphery is not reseted. + Unitialized/unreseted periphery may cause trouble (e.g. firing unwanted interrupts) +- Bootloader: Startup now invalidates I/D-Caches at boot ----------------------------------------------------------------- Changes in release 11