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git-svn-id: http://moon:8086/svn/vhdl/trunk@229 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2009-01-11 18:14:31 +00:00
parent 4e2cb68237
commit 5483606f74
1 changed files with 1 additions and 1 deletions
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lib/filter/src/fir_stage_sys.vhd
+1 -1
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@@ -124,7 +124,7 @@ begin
------------------------------------------------------------ ------------------------------------------------------------
proc_pipe_reg: process(clk, xin, hin, mult_pipe(0)) proc_pipe_reg: process(clk, xin, hin, mult_pipe(0))
begin begin
mult_pipe(0) <= resize(xin * hin, mult_pipe(0)); mult_pipe(0) <= resize(xin * hin, mult_pipe(0), fixed_wrap, fixed_truncate);
if rising_edge(clk) then if rising_edge(clk) then
if ce = '1' then if ce = '1' then
for i in 1 to mult_latency loop for i in 1 to mult_latency loop