git-svn-id: http://moon:8086/svn/vhdl/trunk@1429 cc03376c-175c-47c8-b038-4cd826a8556b
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## NOTE: Do not edit this file.
## Auto generated by Project Navigator for VHDL Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module vconfig
vcom -87 -explicit vconfig_timesim.vhd
vcom -93 -explicit vconfig_tb.vhd
vsim -t 1ps -sdfmax /UUT=vconfig_timesim.sdf -lib work vconfig_tb
do vconfig_tb.udo
view wave
add wave *
view structure
view signals
run 6000ns
## End