- use dpram_xxx_ra for synthesis

- fixed do file for post synthesis simulation


git-svn-id: http://moon:8086/svn/vhdl/trunk@1083 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2015-05-14 20:45:05 +00:00
parent 5c6c1fd1cd
commit 182e68126e
5 changed files with 26 additions and 38 deletions
+4 -14
View File
@@ -3,15 +3,8 @@
vlib work
# RAMS
vcom -explicit -93 "../../../misc/dpram_2w2r1c_sim.vhd"
vcom -explicit -93 "../../../misc/dpram_2w2r.vhd"
vcom -explicit -93 "../../../misc/dpram_1w2r1c_sim.vhd"
vcom -explicit -93 "../../../misc/dpram_1w1r.vhd"
vcom -explicit -93 "../../../misc/dpram_1w1r1c_sim.vhd"
vcom -explicit -93 "../../../misc/dpram_1w1r2c_sim.vhd"
vcom -explicit -93 "../../../misc/dpram_2w2r2c_sim.vhd"
vcom -explicit -93 "../../../rams/dpram_2w2r2c_ra_sim.vhd"
vcom -explicit -93 "../../../rams/dpram_1w1r2c_ra_sim.vhd"
# FIFOS
vcom -explicit -93 "../../../FIFO/src/fifo_ctrl_pkg.vhd"
@@ -22,11 +15,8 @@ vcom -explicit -93 "../../../FIFO/src/fifo_async_ctrl.vhd"
vcom -explicit -93 "../../../FIFO/src/fifo_async.vhd"
# UART
vcom -explicit -93 "../../../uart/bbfifo_16x8.vhd"
vcom -explicit -93 "../../../uart/kcuart_rx.vhd"
vcom -explicit -93 "../../../uart/kcuart_tx.vhd"
vcom -explicit -93 "../../../uart/uart_rx.vhd"
vcom -explicit -93 "../../../uart/uart_tx.vhd"
vcom -explicit -93 "../../../uart/uart_rx_sim.vhd"
vcom -explicit -93 "../../../uart/uart_tx_sim.vhd"
vcom -explicit -93 "../../../uart/uart_wb.vhd"
# GPIO