jens aef8406ae8 Improved templ

2022-09-10 10:40:58 +02:00

Common

Pass EXTRA_OPTS to GHDL

2022-09-10 08:25:14 +02:00

lib

Improved templ

2022-09-10 10:40:58 +02:00

projects

- fixed Make path

2022-09-09 19:52:47 +02:00

defs.mk

Reafctored defs.mk

2022-09-08 09:10:32 +02:00

Makefile

- refactored ISE makefiles

2021-03-29 12:49:42 +00:00

S

Description

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23 MiB

Languages

VHDL 90.1%

Verilog 4.2%

Tcl 2.5%

SystemVerilog 0.8%

IGOR Pro 0.5%

Other 1.5%