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Reafctored defs.mk

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This commit is contained in:
jens
2022-09-08 09:10:32 +02:00
parent 0e235ab598
commit 96280bb78a
61 changed files with 61 additions and 61 deletions
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Common/make/defs.mk
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@@ -1,2 +0,0 @@
LIB_PATH := $(VHDL_HOME)/lib
defs.mk
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@@ -0,0 +1,2 @@
LIB_PATH := $(VHDL_HOME)/lib
VHDL_MAKE_HOME := $(VHDL_HOME)/Common/make
lib/CPUs/JCpu/Makefile
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
TOOL_PATH := $(VHDL_HOME)/tools/jcpu
.PHONY: install uninstall
lib/CPUs/JCpu/ghdl/cpu_itest.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
lib/CPUs/JCpu/ghdl/jcpu_core.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := JCPU_CORE
lib/CPUs/JCpu/ghdl/mul8x8.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
lib/CPUs/JCpu/ghdl/reti_issue.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
lib/CPUs/JCpu/ghdl/tb_cpu_embedded.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include jcpu_core.inc
lib/CPUs/JCpu/ghdl/tb_cpu_embedded_with_uart.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(VHDL_HOME)/lib/uart/ghdl/uart_sim.inc
include jcpu_core.inc
lib/CPUs/MIPS/ghdl/mips_core.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/CPUs/MIPS/ghdl/tb_mips_top.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include mips_core.inc
lib/FIFO/ghdl/fifo_async.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIFO_ASYNC
lib/FIFO/ghdl/fifo_sync.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIFO_SYNC
lib/FIFO/ghdl/tb_fifo_async.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include fifo_async.inc
ROOT_PATH := ../../..
lib/FIFO/ghdl/tb_fifo_sync.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include fifo_sync.inc
ROOT_PATH := ../../..
lib/FIFO/ghdl/tb_gray_counter.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
SRCS += $(LIB_PATH)/FIFO/src/gray_counter.vhd
lib/FIFO/ghdl/tb_reg_stage.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
SRCS += $(LIB_PATH)/FIFO/src/reg_stage.vhd
SRCS += $(LIB_PATH)/FIFO/src/tb_reg_stage.vhd
lib/JBUS/busmaster/ghdl/busmaster_async.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
# -----------------------------------------------------------
PKG_NAME := BUSMASTER_ASYNC
lib/JBUS/busmaster/ghdl/busmaster_sync.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
# -----------------------------------------------------------
PKG_NAME := BUSMASTER_SYNC
lib/JBUS/busmaster/ghdl/tb_busmaster_async.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/JBUS/busmaster/ghdl/busmaster_async.inc
SRCS += $(BUSMASTER_ASYNC_SRCS)
lib/JBUS/busmaster/ghdl/tb_busmaster_sync.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/JBUS/busmaster/ghdl/busmaster_sync.inc
SRCS += $(BUSMASTER_SYNC_SRCS)
lib/JBUS/dmac/ghdl/tb_dmac_sync.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
MOD_PATH := $(LIB_PATH)/JBUS
lib/JBUS/memory/ghdl/tb_ram_wb.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
MOD_PATH := $(LIB_PATH)/JBUS/memory
lib/JBUS/memory/ghdl/tb_rom_wb.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
MOD_PATH := $(LIB_PATH)/JBUS/memory
lib/SDRAM/ddr_sdr_v1_5/ghdl/tb_ctrl_ddr_wb32.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/SDRAM/ddr_sdr_v1_5/ghdl/tb_ctrl_ddr_wb64.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/VGA_ctrl/ghdl/tb_vga_frontend_jb32.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include vga_frontend_jb32.inc
lib/VGA_ctrl/ghdl/tb_vga_frontend_jb64.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include vga_frontend_jb64.inc
lib/VGA_ctrl/ghdl/vga_backend.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := VGA_BACKEND
lib/VGA_ctrl/ghdl/vga_frontend_jb32.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include vga_backend.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/VGA_ctrl/ghdl/vga_frontend_jb64.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/VGA_ctrl/ghdl/vga_backend.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/emac/ghdl/emac_jbus.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/emac/ghdl/emac_tx.inc
include $(LIB_PATH)/emac/ghdl/emac_rx.inc
lib/emac/ghdl/emac_rx.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/emac/ghdl/emac_tx.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/emac/ghdl/tb_emac_top_jb.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include emac_jbus.inc
SRCS := $(EMAC_JBUS_SRCS)
lib/filter/ghdl/fir_iterative.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIR_ITERATIVE
lib/filter/ghdl/fir_parallel.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIR_PARALLEL
lib/filter/ghdl/fir_semi_parallel.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIR_SEMI_PARALLEL
lib/filter/ghdl/tb_fir_iterative.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include fir_iterative.inc
ROOT_PATH := ../../..
lib/filter/ghdl/tb_fir_parallel.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include fir_parallel.inc
ROOT_PATH := ../../..
lib/filter/ghdl/tb_fir_semi_parallel.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include fir_semi_parallel.inc
ROOT_PATH := ../../..
lib/filter/ghdl/tb_fir_stage.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
lib/filter/ghdl/tb_fir_stage_sys.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += $(LIB_PATH)/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
lib/ps2_port/ghdl/tb_ps2_core.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
MOD_PATH := $(VHDL_HOME)/lib/ps2_port
lib/radio/cordic/ghdl/cordic_iterative.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := CORDIC_ITERATIVE
lib/radio/cordic/ghdl/cordic_pipe.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := CORDIC_PIPE
lib/radio/cordic/ghdl/tb_cordic_iterative_top.make
+1 -1
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@@ -1,5 +1,5 @@
# -------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include cordic_iterative.inc
# -------------------------------------------------
lib/radio/cordic/ghdl/tb_cordic_pipe_top.make
+1 -1
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@@ -1,5 +1,5 @@
# -------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include cordic_pipe.inc
# -------------------------------------------------
lib/radio/ddc/ghdl/tb_ddc.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/filter/ghdl/fir_semi_parallel.inc
lib/radio/ddc/ghdl/tb_syn_ddc.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
lib/radio/decimator/CIC/ghdl/cic_decim_pipe.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := CIC_DECIM_PIPE
lib/radio/decimator/CIC/ghdl/tb_cic_decim_pipe.make
+1 -1
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@@ -1,4 +1,4 @@
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include cic_decim_pipe.inc
SRCS += $(CIC_DECIM_PIPE_SRCS)
lib/radio/nco/ghdl/mix_cordic_pipe.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/radio/cordic/ghdl/cordic_pipe.inc
# -----------------------------------------------------------
PKG_NAME := MIX_CORDIC_PIPE
lib/radio/nco/ghdl/nco_lut.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := NCO_LUT
lib/radio/nco/ghdl/tb_mix_cordic.make
+1 -1
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@@ -1,5 +1,5 @@
# -------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/radio/nco/ghdl/mix_cordic_pipe.inc
# -------------------------------------------------
lib/radio/nco/ghdl/tb_nco_cordic.make
+1 -1
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@@ -1,5 +1,5 @@
# -------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/radio/nco/ghdl/mix_cordic_pipe.inc
# -------------------------------------------------
lib/radio/nco/ghdl/tb_nco_lut.make
+1 -1
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@@ -1,5 +1,5 @@
# -------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/radio/nco/ghdl/nco_lut.inc
# -------------------------------------------------
lib/uart/ghdl/tb_uart_generic.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(VHDL_HOME)/lib/uart/ghdl/uart_generic.inc
lib/uart/ghdl/tb_uart_sim.make
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
include $(VHDL_HOME)/lib/uart/ghdl/uart_sim.inc
lib/uart/ghdl/uart_generic.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := UART_GENERIC
lib/uart/ghdl/uart_sim.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
include $(VHDL_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := UART_SIM