jens 9c12bc9640 - added RAM-based architecture ...

git-svn-id: http://moon:8086/svn/vhdl/trunk@207 cc03376c-175c-47c8-b038-4cd826a8556b

2009-01-05 10:06:37 +00:00

Common

- Intital revision

2008-10-26 23:52:49 +00:00

lib

- added RAM-based architecture

2009-01-05 10:06:37 +00:00

projects/mips_sys

- added AC-97 controller

2008-11-01 21:52:59 +00:00

S

Description

No description provided

23 MiB

Languages

VHDL 90.1%

Verilog 4.2%

Tcl 2.5%

SystemVerilog 0.8%

IGOR Pro 0.5%

Other 1.5%