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06bc5d193edb039dd38e0eae69e61a6a95195eb2
vhdl
/
lib
/
SDRAM
/
ddr_sdr_v1_5
/
sim
T
History
jens
bd65d611dd
- adedd single data rate SDRAM
...
git-svn-id:
http://moon:8086/svn/vhdl/trunk@1211
cc03376c-175c-47c8-b038-4cd826a8556b
2015-05-24 12:54:57 +00:00
..
tb_ctrl_ddr_wb32.fdo
- renamed config constants
2015-05-24 10:39:18 +00:00
tb_ctrl_ddr_wb32.wdo
- sdram_ctrl_frontend_wb32.vhd.vhd implements J-Bus interface and exports abstract PHY interface
2015-05-24 09:29:34 +00:00
tb_ctrl_ddr_wb64.fdo
- renamed config constants
2015-05-24 10:39:18 +00:00
tb_ctrl_ddr_wb64.wdo
- fixed
2015-05-24 09:10:18 +00:00
tb_ctrl_sdr_wb32.fdo
- adedd single data rate SDRAM
2015-05-24 12:54:57 +00:00
tb_ctrl_sdr_wb32.wdo
- adedd single data rate SDRAM
2015-05-24 12:54:57 +00:00