- added

git-svn-id: http://moon:8086/svn/vhdl/trunk@1414 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-21 10:47:01 +00:00
parent 32440f7db9
commit ea60299d26
80 changed files with 37322 additions and 0 deletions
@@ -0,0 +1,215 @@
+; -------------------------------------------------
+; Register definitions
+; -------------------------------------------------
+include "../../../lib/jasm/cregs.inc.jsm"
+include "xregs.inc.jsm"
+
+; -------------------------------------------------
+; Constants
+; -------------------------------------------------
+addr_incr:		equ		2
+addr_lsb_max:	equ		0x08
+
+; External RAM/ROM
+				xmem	
+				org		0x80
+sdram_data:		db		8		; SDRAM data window at X:0x80
+
+; Internal RAM
+				cmem	0
+round:			db		1
+
+; -------------------------------------------------
+; Program
+; -------------------------------------------------
+				code
+reset:			org		0x000
+				jmp		main
+		
+; -------------------------------------------------
+; ISR
+; -------------------------------------------------
+				org		0x001
+				reti
+
+; -------------------------------------------------
+; Main
+; -------------------------------------------------
+main:			mov		R0, 0x00
+				xout	(led_port), R0
+				xin		R0, (ctrl_reg)
+				and		R0, 0xCF
+				xout	(ctrl_reg), R0				
+		
+				; Wait until SDRAM ready
+poll_bsy_fin:	xin		R0, (sdram_reg)
+				and		R0, SDRAM_STAT_BUSY
+				jnz		poll_bsy_fin
+				
+				jmp		do_clear
+; ----------------------------------------------------------
+; SDRAM clear
+; ----------------------------------------------------------
+do_clear:		
+				; Set SDRAM address register to 0
+				call	AddrCnt_Init
+				
+				; Fill SDR Buffer with zeros
+				mov		R0, sdram_data
+				mov		R15, 8
+buf_clr_loop:	movx	(R0), 0
+				inc		R0
+				dec		R15
+				jnz		buf_clr_loop
+
+sdr_clear:		xin		R0, (sdram_addr+0)
+				cmp		R0, addr_lsb_max
+				jeq		clear_finished
+				
+				; Wait finished last write
+poll_clear_fin:	xin		R0, (sdram_reg)
+				and		R0, SDRAM_STAT_WRITE_BUSY
+				jnz		poll_clear_fin
+
+				; Start SDR write
+				mov		R0, sdram_reg
+				xout	(R0), SDRAM_CTRL_WRITE_REQUEST
+
+				; Advance address counter
+				mov		R0, addr_incr
+				call	AddrCnt_Adv
+
+				jmp		sdr_clear
+
+clear_finished:
+				
+; ----------------------------------------------------------
+; SDRAM Write
+; ----------------------------------------------------------
+do_write:
+				; Set SDRAM address register to 0
+				call	AddrCnt_Init
+				mov		R0, 0
+				movc	(round), R0
+				
+sdr_write:		xin		R0, (sdram_addr+0)
+				cmp		R0, addr_lsb_max
+				jeq		write_finished
+				
+				; Fill SDR Buffer
+				movc	R1, (round)
+force_no_err:	mov		R0, sdram_data
+				mov		R15, 8
+write_loop:		movx	(R0), R1
+				inc		R0
+				inc		R1
+				dec		R15
+				jnz		write_loop
+				
+				; Wait finished last write
+poll_write_fin:	xin		R0, (sdram_reg)
+				and		R0, SDRAM_STAT_WRITE_BUSY
+				jnz		poll_write_fin
+
+				nop	
+
+				; Start SDR write
+				mov		R0, sdram_reg
+				xout	(R0), SDRAM_CTRL_WRITE_REQUEST
+
+				; Advance address counter
+				mov		R0, addr_incr
+				call	AddrCnt_Adv
+				movc	R0, (round)
+				inc		R0
+				movc	(round), R0
+
+				jmp		sdr_write
+
+write_finished:	
+
+; ----------------------------------------------------------
+; SDRAM Verify
+; ----------------------------------------------------------
+do_read:			
+				; Set SDRAM address register to 0
+				call	AddrCnt_Init				
+				mov		R0, 0
+				movc	(round), R0
+
+sdr_read:		xin		R0, (sdram_addr+0)
+				cmp		R0, addr_lsb_max
+				jeq		read_finished
+
+				; Start SDR read
+				mov		R0, sdram_reg
+				xout	(R0), SDRAM_CTRL_READ_REQUEST
+
+				; Wait last read
+poll_read_fin:	xin		R0, (sdram_reg)
+				and		R0, SDRAM_STAT_READ_BUSY
+				jnz		poll_read_fin
+
+read_back_mem:	
+				; Verify SDR Buffer
+				movc	R1, (round)
+				mov		R0, sdram_data
+				mov		R15, 8
+read_loop:		movx	R2, (R0)
+				cmp		R2, R1
+				jne		verify_error
+				inc		R0
+				inc		R1
+				dec		R15
+				jnz		read_loop
+				
+				; Advance address counter
+				mov		R0, addr_incr
+				call	AddrCnt_Adv
+				movc	R0, (round)
+				inc		R0
+				movc	(round), R0
+				jmp		sdr_read
+
+; ----------------------------------------------------------
+read_finished:
+no_error:		jmp		ende
+				
+verify_error:	xin		R0, (ctrl_reg)
+				or		R0, 0x10
+				xout	(ctrl_reg), R0
+				jmp		ende
+
+ende:			jmp		ende
+				
+; -------------------------------------------------
+AddrCnt_Init:	push	R0
+				mov		R0, 0x00
+				xout	(sdram_addr+0), R0
+				xout	(sdram_addr+1), R0
+				xout	(sdram_addr+2), R0
+				pop		R0
+				ret
+
+; -------------------------------------------------
+; Parameter
+; R0: increment value
+AddrCnt_Adv:	push	R1
+				push	R2
+				push	R3
+				xin		R1, (sdram_addr+0)
+				xin		R2, (sdram_addr+1)
+				xin		R3, (sdram_addr+2)
+				add		R1, R0
+				addc	R2, 0
+				addc	R3, 0
+				xout	(sdram_addr+0), R1
+				xout	(sdram_addr+1), R2
+				xout	(sdram_addr+2), R3
+				pop		R3
+				pop		R2
+				pop		R1
+				ret
+				
+; -------------------------------------------------
+