- added force TX-interrupt register bit (0x200)
Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@530 cc03376c-175c-47c8-b038-4cd826a8556b
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@@ -78,6 +78,7 @@ ARCHITECTURE behavior OF uart_wb IS
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signal tx_complete : std_logic;
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signal tx_complete : std_logic;
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signal tx_empty : std_logic;
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signal tx_empty : std_logic;
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signal tx_busy : std_logic;
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signal tx_busy : std_logic;
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signal force_irq_tx : std_logic;
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begin
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begin
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@@ -90,6 +91,7 @@ registers_write:
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if rising_edge(CLK_I) then
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if rising_edge(CLK_I) then
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reg_we_uart_tx <= '0';
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reg_we_uart_tx <= '0';
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irq_tx_ack <= '0';
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irq_tx_ack <= '0';
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force_irq_tx <= '0';
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if RST_I = '1' then
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if RST_I = '1' then
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reg_uart_baud <= to_unsigned(53, 16);
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reg_uart_baud <= to_unsigned(53, 16);
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rx_int_en <= '0';
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rx_int_en <= '0';
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@@ -105,6 +107,7 @@ registers_write:
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rx_int_en <= DAT_I(6);
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rx_int_en <= DAT_I(6);
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tx_int_en <= DAT_I(5);
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tx_int_en <= DAT_I(5);
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irq_tx_ack <= DAT_I(8);
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irq_tx_ack <= DAT_I(8);
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force_irq_tx <= DAT_I(9);
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when "0010" =>
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when "0010" =>
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reg_uart_baud <= DAT_I(15 downto 0);
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reg_uart_baud <= DAT_I(15 downto 0);
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@@ -168,7 +171,9 @@ tx_interrupt:
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elsif irq_tx_ack = '1' then
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elsif irq_tx_ack = '1' then
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irq_tx <= '0';
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irq_tx <= '0';
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else
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else
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if tx_empty = '0' then
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if force_irq_tx = '1' then
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irq_tx <= tx_int_en;
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elsif tx_empty = '0' then
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tx_busy <= '1';
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tx_busy <= '1';
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elsif tx_busy = '1' then
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elsif tx_busy = '1' then
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irq_tx <= tx_int_en;
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irq_tx <= tx_int_en;
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