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git-svn-id: http://moon:8086/svn/vhdl/trunk@1416 cc03376c-175c-47c8-b038-4cd826a8556b
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+-- ProjNav VHDL simulation template: testbench.udo
+-- You may edit this file after the line that starts with
+-- '-- START' to customize your simulation
+-- START user-defined simulation commands