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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@613 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-11-05 17:13:42 +00:00
parent 84b52da6e1
commit c9ba66b646
2 changed files with 2 additions and 4 deletions
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projects/mips_sys/ise101/mips_sys/mips_sys.prj
+1 -2
View File
@@ -30,15 +30,14 @@ vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
vhdl work "../../../../lib/misc/async_types.vhd"
vhdl work "../../../../lib/FIFO/src/fifo_sync.vhd"
vhdl work "../../../../lib/ac97_ctrl/src/core/ac_io.vhd"
vhdl work "../../src/clockgen_virtex4.vhd"
vhdl work "../../src/async_defs.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/vga_frontend64.vhd"
vhdl work "../../../../lib/VGA_ctrl/src/clkgen_virtex4.vhd"
vhdl work "../../../../lib/uart/uart_wb.vhd"
vhdl work "../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd"
vhdl work "../../../../lib/misc/rom_wb.vhd"
vhdl work "../../../../lib/misc/lcd_port.vhd"
vhdl work "../../../../lib/misc/gpio_wb.vhd"
vhdl work "../../../../lib/misc/clockgen_virtex4.vhd"
vhdl work "../../../../lib/misc/async_port_wb.vhd"
vhdl work "../../../../lib/CPUs/MIPS/src/core/mips_types.vhd"
vhdl work "../../../../lib/ac97_ctrl/src/core/ac97_wb.vhd"
projects/mips_sys/ise101/mips_sys/mips_sys_vhdl.prj
+1 -2
View File
@@ -30,15 +30,14 @@ vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_top.vhd"
vhdl work "W:\vhdl\lib\misc\async_types.vhd"
vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync.vhd"
vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac_io.vhd"
vhdl work "W:\vhdl\projects\mips_sys\src\clockgen_virtex4.vhd"
vhdl work "W:\vhdl\projects\mips_sys\src\async_defs.vhd"
vhdl work "W:\vhdl\lib\VGA_ctrl\src\vga_frontend64.vhd"
vhdl work "W:\vhdl\lib\VGA_ctrl\src\clkgen_virtex4.vhd"
vhdl work "W:\vhdl\lib\uart\uart_wb.vhd"
vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_5\src\sdram_ctrl_frontend64_wb.vhd"
vhdl work "W:\vhdl\lib\misc\rom_wb.vhd"
vhdl work "W:\vhdl\lib\misc\lcd_port.vhd"
vhdl work "W:\vhdl\lib\misc\gpio_wb.vhd"
vhdl work "W:\vhdl\lib\misc\clockgen_virtex4.vhd"
vhdl work "W:\vhdl\lib\misc\async_port_wb.vhd"
vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_types.vhd"
vhdl work "W:\vhdl\lib\ac97_ctrl\src\core\ac97_wb.vhd"