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- generic for cache sizes

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- JBus-ports are unsigned instead of word_t
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git-svn-id: http://moon:8086/svn/vhdl/trunk@279 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-01-24 14:10:59 +00:00
parent 4a79ecce80
commit c3507638c1
1 changed files with 13 additions and 9 deletions
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lib/CPUs/MIPS/src/core/mips_top.vhd
+13 -9
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@@ -29,6 +29,11 @@ library work;
use work.mips_types.all;
entity mips_top is
Generic
(
icache_size : natural := 4096; -- words
dcache_size : natural := 4096 -- words
);
Port
(
debug : out unsigned(1 downto 0);
@@ -36,9 +41,9 @@ entity mips_top is
CLK_I : in STD_LOGIC;
ACK_I : in STD_LOGIC;
SRDY_I : in STD_LOGIC;
ADDR_O : out word_t;
DAT_I : in word_t;
DAT_O : out word_t;
ADDR_O : out unsigned(31 downto 0);
DAT_I : in unsigned(31 downto 0);
DAT_O : out unsigned(31 downto 0);
WE_O : out STD_LOGIC;
SEL_O : out unsigned(3 downto 0);
CYC_O : out STD_LOGIC;
@@ -87,7 +92,6 @@ architecture rtl of mips_top is
signal dmem_din : word_t;
signal dmem_be : unsigned(3 downto 0);
COMPONENT biu
GENERIC
(
@@ -100,9 +104,9 @@ architecture rtl of mips_top is
CLK_I : in STD_LOGIC;
ACK_I : in STD_LOGIC;
SRDY_I : in STD_LOGIC;
ADDR_O : out word_t;
DAT_I : in word_t;
DAT_O : out word_t;
ADDR_O : out unsigned(31 downto 0);
DAT_I : in unsigned(31 downto 0);
DAT_O : out unsigned(31 downto 0);
WE_O : out STD_LOGIC;
SEL_O : out unsigned(3 downto 0);
CYC_O : out STD_LOGIC;
@@ -155,8 +159,8 @@ inst_pipeline: pipeline
inst_biu: biu
GENERIC MAP
(
icache_size => 4096, -- words
dcache_size => 4096 -- words
icache_size => icache_size, -- words
dcache_size => dcache_size -- words
)
PORT MAP
(