- debug output is now record

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git-svn-id: http://moon:8086/svn/vhdl/trunk@999 cc03376c-175c-47c8-b038-4cd826a8556b

projects/mips_sys/src/mips_sys_sim.vhd

@@ -317,7 +317,7 @@ ARCHITECTURE behavior OF mips_sys IS
 	signal usb_inten	: std_logic;
 	signal phy_inten	: std_logic;
 
-	signal debug		: unsigned(1 downto 0);
+	signal debug		: chip_debug_t;
 
 	-- DDR SDRAM
 	constant BURST_LEN	: natural := 2;
@@ -362,7 +362,8 @@ BEGIN
 	sys_phy_mdio			<= gpo_0(31);
 
 	eb						<= sys_dip(7);
-	sys_error				<= debug;
+	sys_error(0)			<= debug.imem_err;
+	sys_error(1)			<= debug.dmem_err;
 	nmi						<= not sys_rst_n_in;
 	rst_in 					<= not sys_rst_n_in and sys_btn(0) and sys_btn(2);
 	sys_flash_byten			<= '1';
@@ -597,6 +598,7 @@ inst_rom_wb : entity work.rom_wb
 		RST_I	=> RST_O,
 		CYC_I	=> CYC_I_rom,
 		STB_I	=> STB_O,
+		WE_I	=> WE_O,
 		ACK_O	=> ACK_O_rom,
 		MRDY_I	=> MRDY_O,
 		SRDY_O	=> SRDY_O_rom,