- partially fixed DCM nightmare
git-svn-id: http://moon:8086/svn/vhdl/trunk@1178 cc03376c-175c-47c8-b038-4cd826a8556b
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@@ -46,8 +46,10 @@ NET "RST_O" TIG;
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# Locate DCM/BUFG - Tools can probably figure them out automatically
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# but just LOC them down to be safe
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#INST inst_clockgen/inst_DCM_BASE_0 LOC = DCM_ADV_X0Y4;
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#INST inst_clockgen/inst_DCM_BASE_1 LOC = DCM_ADV_X0Y3;
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INST "inst_clockgen_cpu/inst_DCM_FX" LOC = DCM_ADV_X0Y2;
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INST "inst_clockgen_vga/inst_DCM_FX" LOC = DCM_ADV_X0Y1;
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INST "*/inst_sdram_clk/inst_DCM_BASE_0" LOC = DCM_ADV_X0Y6;
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INST "*/inst_sdram_clk/inst_DCM_BASE_1" LOC = DCM_ADV_X0Y7;
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# ---------------------------------------------------------------------------------
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# Floor planning
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@@ -921,7 +921,7 @@ inst_clockgen_cpu : entity work.clockgen
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clk_out => CLK_O
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);
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inst_clocken_vga : entity work.clockgen
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inst_clockgen_vga : entity work.clockgen
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GENERIC MAP
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(
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clk_in_freq => sys_freq_in,
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@@ -949,7 +949,7 @@ inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
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RST_I => RST_O,
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CLK_I => CLK_O,
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SDRAM_CLK_I => sys_clk_in,
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SDRAM_CLK_I => CLK_O,
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SDRAM_CLK_FB_I => sys_sdr_clk_fb,
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CYC_I => CYC_I_sdram,
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