diff --git a/projects/mips_sys/ise101/mips_sys/project/mips_sys.ucf b/projects/mips_sys/ise101/mips_sys/project/mips_sys.ucf
index dc8dcaf..8240808 100644
--- a/projects/mips_sys/ise101/mips_sys/project/mips_sys.ucf
+++ b/projects/mips_sys/ise101/mips_sys/project/mips_sys.ucf
@@ -46,8 +46,10 @@ NET "RST_O" TIG;
 
 # Locate DCM/BUFG - Tools can probably figure them out automatically
 #                   but just LOC them down to be safe
-#INST inst_clockgen/inst_DCM_BASE_0 LOC = DCM_ADV_X0Y4;
-#INST inst_clockgen/inst_DCM_BASE_1 LOC = DCM_ADV_X0Y3;
+INST "inst_clockgen_cpu/inst_DCM_FX" LOC = DCM_ADV_X0Y2;
+INST "inst_clockgen_vga/inst_DCM_FX" LOC = DCM_ADV_X0Y1;
+INST "*/inst_sdram_clk/inst_DCM_BASE_0" LOC = DCM_ADV_X0Y6;
+INST "*/inst_sdram_clk/inst_DCM_BASE_1" LOC = DCM_ADV_X0Y7;
 
 # ---------------------------------------------------------------------------------
 # Floor planning
diff --git a/projects/mips_sys/src/mips_sys.vhd b/projects/mips_sys/src/mips_sys.vhd
index 569bf2c..c639947 100644
--- a/projects/mips_sys/src/mips_sys.vhd
+++ b/projects/mips_sys/src/mips_sys.vhd
@@ -921,7 +921,7 @@ inst_clockgen_cpu : entity work.clockgen
 		clk_out				=> CLK_O
 	);
 
-inst_clocken_vga : entity work.clockgen
+inst_clockgen_vga : entity work.clockgen
 	GENERIC MAP
 	(
 		clk_in_freq			=> sys_freq_in,
@@ -949,7 +949,7 @@ inst_sdram_ctrl_frontend_wb : entity work.sdram_ctrl_frontend64_wb
 		RST_I				=> RST_O,
 		CLK_I				=> CLK_O,
 
-		SDRAM_CLK_I			=> sys_clk_in,
+		SDRAM_CLK_I			=> CLK_O,
 		SDRAM_CLK_FB_I		=> sys_sdr_clk_fb,
 		
 		CYC_I				=> CYC_I_sdram,