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- changes due to packing of resx, resy and fps into one 32-bit register

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git-svn-id: http://moon:8086/svn/vhdl/trunk@651 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-11-09 19:15:25 +00:00
parent 18c24e29f6
commit 9975fbd6cc
1 changed files with 2 additions and 11 deletions
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lib/VGA_ctrl/src/tb_vga_frontend64.vhd
+2 -11
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@@ -187,21 +187,12 @@ STIMULUS: process
wait until rising_edge(CLK_O) and SRDY_I = '1'; wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0'; STB_O <= '0';
-- Read resolution X -- Read resolution
CYC_O <= '1'; CYC_O <= '1';
wait until rising_edge(CLK_O) and SRDY_I = '1'; wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '1'; STB_O <= '1';
WE_O <= '0'; WE_O <= '0';
ADDR_O <= X"0000_0018"; ADDR_O <= X"0000_0014";
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0';
-- Read resolution Y
CYC_O <= '1';
wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '1';
WE_O <= '0';
ADDR_O <= X"0000_001C";
wait until rising_edge(CLK_O) and SRDY_I = '1'; wait until rising_edge(CLK_O) and SRDY_I = '1';
STB_O <= '0'; STB_O <= '0';