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- renamed buffers to fb_front and fb_back

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- fb_front is writable by host only if msten = '0'. fb_back is writable by host every time.
- fb_front and fb_back are changed after complete frame. Controller can issue buffer-change Interrupt
- packed resx, resy and fps into one 32-bit register
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git-svn-id: http://moon:8086/svn/vhdl/trunk@650 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-11-09 19:14:49 +00:00
parent 5fbb10f98d
commit 18c24e29f6
1 changed files with 33 additions and 35 deletions
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lib/VGA_ctrl/src/vga_frontend64.vhd
+33 -35
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@@ -128,10 +128,11 @@ architecture Behavioral of vga_frontend64 is
signal bufchg_irq_en : std_logic;
signal bufchg_flag : std_logic;
signal bufchg_flag_ack : std_logic;
signal vga_mem_off_last : unsigned(31 downto 0);
signal vga_mem_off_curr : unsigned(31 downto 0);
signal vga_mem_off_0 : unsigned(31 downto 0);
signal vga_mem_off_1 : unsigned(31 downto 0);
signal host_fb_back_we : std_logic;
signal vga_fb_back : unsigned(31 downto 0);
signal vga_fb_front : unsigned(31 downto 0);
signal host_fb_front : unsigned(31 downto 0);
signal host_fb_back : unsigned(31 downto 0);
signal vga_scan_rdy : std_logic;
signal vga_master_en : std_logic;
signal request_cnt_rst : std_logic;
@@ -348,28 +349,31 @@ read_counter:
pixel_counter:
process(CLK_I)
variable pixel_cnt : natural range 0 to MAX_REQUEST_CNT/2-1;
variable curr : unsigned(31 downto 0);
variable last : unsigned(31 downto 0);
variable front : unsigned(31 downto 0);
variable back : unsigned(31 downto 0);
begin
if rising_edge(CLK_I) then
bufchg <= '0';
if pixel_cnt_rst = '1' then
pixel_cnt := 0;
curr := vga_mem_off_0;
last := vga_mem_off_1;
front := host_fb_front;
back := host_fb_back;
elsif request_cnt_en = '1' and SRDY_I = '1' then
if pixel_cnt /= MAX_REQUEST_CNT/2-1 then
pixel_cnt := pixel_cnt + 1;
else
pixel_cnt := 0;
curr := vga_mem_off_last;
last := vga_mem_off_curr;
front := vga_fb_back;
back := vga_fb_front;
bufchg <= '1';
end if;
end if;
vga_mem_off_curr <= curr;
vga_mem_off_last <= last;
ADDR_O <= curr + (to_unsigned(pixel_cnt, 29) & "000");
if host_fb_back_we = '1' then
back := host_fb_back;
end if;
vga_fb_front <= front;
vga_fb_back <= back;
ADDR_O <= front + (to_unsigned(pixel_cnt, 29) & "000");
end if;
end process;
@@ -448,25 +452,17 @@ registers_read:
when "0100" =>
SDAT_O <= to_unsigned(cg_color);
-- sys_vga_resx 20
-- sys_vga_res 20
when "0101" =>
SDAT_O(15 downto 0) <= to_unsigned(tsvga.ts_h.ncyc_scan, 16);
SDAT_O <= to_unsigned(tsvga.nfps, 8) & to_unsigned(tsvga.ts_v.ncyc_scan, 12) & to_unsigned(tsvga.ts_h.ncyc_scan, 12);
-- sys_vga_resy 24
-- sys_vga_fb_front 24
when "0110" =>
SDAT_O(15 downto 0) <= to_unsigned(tsvga.ts_v.ncyc_scan, 16);
SDAT_O <= vga_fb_front;
-- sys_vga_fps 28
-- sys_vga_fb_back 28
when "0111" =>
SDAT_O(15 downto 0) <= to_unsigned(tsvga.nfps, 16);
-- sys_vga_moffs_curr 32
when "1000" =>
SDAT_O <= vga_mem_off_curr;
-- sys_vga_moffs_last 36
when "1001" =>
SDAT_O <= vga_mem_off_last;
SDAT_O <= vga_fb_back;
when others => null;
end case;
@@ -485,12 +481,13 @@ registers_write:
cg_clr_screen <= '0';
cg_clr_line <= '0';
bufchg_flag_ack <= '0';
host_fb_back_we <= '0';
if RST_I = '1' then
cg_din <= (others => '0');
vga_master_en <= '0';
bufchg_irq_en <= '0';
vga_mem_off_0 <= X"40000000";
vga_mem_off_1 <= X"40004000";
host_fb_front <= X"40000000";
host_fb_back <= X"40004000";
cg_color <= (X"FF", X"FF", X"FF", X"FF");
elsif (STB_I and CYC_I and WE_I) = '1' then
case ADDR_I(5 downto 2) is
@@ -522,13 +519,14 @@ registers_write:
when "0100" =>
cg_color <= to_color_t(SDAT_I(31 downto 0));
-- sys_vga_moffs0 32
when "1000" =>
vga_mem_off_0 <= SDAT_I(31 downto 2) & "00";
-- sys_vga_fb_front 24
when "0110" =>
host_fb_front <= SDAT_I(31 downto 2) & "00";
-- sys_vga_moffs1 36
when "1001" =>
vga_mem_off_1 <= SDAT_I(31 downto 2) & "00";
-- sys_vga_fb_back 28
when "0111" =>
host_fb_back_we <= '1';
host_fb_back <= SDAT_I(31 downto 2) & "00";
when others => null;
end case;