- try to add clock buffer constraint

git-svn-id: http://moon:8086/svn/vhdl/trunk@1619 cc03376c-175c-47c8-b038-4cd826a8556b
2021-04-02 12:42:01 +00:00
parent 51f295d37f
commit 8e7477b83b
1 changed files with 6 additions and 0 deletions
@@ -12,3 +12,9 @@ BEGIN MODEL biu
 	INST inst_write_fifo ram_style = distributed;
 END;
 BEGIN MODEL mips_top
 	NET cpu_clk clock_buffer = true;
 	NET cpu_clk buffer_type	= bufg;
 	NET CLK_I clock_buffer = true;
 	NET CLK_I buffer_type = bufg;
 END;