- try to add clock buffer constraint
git-svn-id: http://moon:8086/svn/vhdl/trunk@1619 cc03376c-175c-47c8-b038-4cd826a8556b
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@@ -12,3 +12,9 @@ BEGIN MODEL biu
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INST inst_write_fifo ram_style = distributed;
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END;
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BEGIN MODEL mips_top
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NET cpu_clk clock_buffer = true;
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NET cpu_clk buffer_type = bufg;
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NET CLK_I clock_buffer = true;
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NET CLK_I buffer_type = bufg;
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END;
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