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- added missing IPF project files

Browse Source 
- improved GHDL build script

git-svn-id: http://moon:8086/svn/vhdl/trunk@1432 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2021-03-21 15:38:01 +00:00
parent ed3b12acda
commit 85c1156549
18 changed files with 96 additions and 840 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Common/make/ghdl.mk
+49 -30
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@@ -1,59 +1,78 @@
# NAME
# BUILD_DIR
# -------------------------------------------------
# Global options
# -------------------------------------------------
# SRCS
# ENTITY_RUN
# WITH_VCD
# WITH_VCD ?= y
TARGET ?= default
ENTITY ?= default
WORK_DIR ?= work
WORK_LIB ?= work
LANG_STD ?= 93c
IEEE_STD ?= standard
RUN_TIME ?= 1000ns
GHDL := ghdl
GHDL_GCC := ghdl-gcc
SIM_FILE-$(WITH_VCD) := $(BUILD_DIR)/$(NAME).vcd
SIM_FILE-$(WITH_FST) := $(BUILD_DIR)/$(NAME).fst
SIM_FILE-$(WITH_GHW) := $(BUILD_DIR)/$(NAME).ghw
BUILD_DIR := build/$(TARGET)
SIM_FILE-$(WITH_VCD) := $(BUILD_DIR)/$(TARGET).vcd
SIM_FILE-$(WITH_FST) := $(BUILD_DIR)/$(TARGET).fst
SIM_FILE-$(WITH_GHW) := $(BUILD_DIR)/$(TARGET).ghw
GTK_OPTS-$(WITH_VCD) := --vcd=$(SIM_FILE-y)
GTK_OPTS-$(WITH_FST) := --fst=$(SIM_FILE-y)
GTK_OPTS-$(WITH_GHW) := --wave=$(SIM_FILE-y)
RUN_OPTS := --assert-level=error
TS := ps
RUN_OPTS := --stop-time=$(RUN_TIME)
GHDL_OPTS := --work=$(WORK_LIB) --workdir=$(BUILD_DIR)/$(WORK_DIR) --std=$(LANG_STD) --ieee=$(IEEE_STD)
all: analyze
$(BUILD_DIR):
$(BUILD_DIR)/$(WORK_DIR):
mkdir -p $@
analyze: $(BUILD_DIR) $(SRCS)
$(GHDL) -a --work=$(NAME) --workdir=$(BUILD_DIR) --time-resolution=$(TS) $(SRCS)
syntax:
$(GHDL) -s $(GHDL_OPTS) $(SRCS)
import:
$(GHDL) -i $(GHDL_OPTS) $(SRCS)
analyze: $(BUILD_DIR)/$(WORK_DIR) $(SRCS)
$(GHDL) -a $(GHDL_OPTS) $(SRCS)
anaborate: $(BUILD_DIR) $(SRCS)
$(GHDL_GCC) -c -o $(BUILD_DIR)/$(NAME) -Wc,O2 --work=$(NAME) --workdir=$(BUILD_DIR) $(SRCS) -e $(ENTITY_RUN)
-$(BUILD_DIR)/$(NAME) $(GTK_OPTS-y) $(RUN_OPTS) >$(BUILD_DIR)/$(NAME).log
anaborate: $(BUILD_DIR)/$(WORK_DIR) $(SRCS)
$(GHDL) -c $(GHDL_OPTS) -o $(BUILD_DIR)/$(TARGET) $(SRCS) -e $(ENTITY)
makeunit: analyze
$(GHDL) -m $(GHDL_OPTS) $(ENTITY)
elaborate: analyze
$(GHDL) -e $(GHDL_OPTS) $(ENTITY)
run: analyze
-$(GHDL) -r --work=$(NAME) --workdir=$(BUILD_DIR) --time-resolution=$(TS) $(ENTITY_RUN) $(RUN_OPTS)
$(GHDL) -r $(GHDL_OPTS) $(ENTITY) $(RUN_OPTS)
run_wave: analyze
-$(GHDL) -r --work=$(NAME) --workdir=$(BUILD_DIR) --time-resolution=$(TS) $(ENTITY_RUN) $(GTK_OPTS-y) $(RUN_OPTS) >$(BUILD_DIR)/$(NAME).log
run_show: analyze
$(GHDL) -r $(GHDL_OPTS) $(ENTITY) $(RUN_OPTS) $(GTK_OPTS-y) >$(BUILD_DIR)/$(TARGET).log
wave: run_wave
exec gtkwave -f $(SIM_FILE-y) -a $(BUILD_DIR)/$(NAME).gtkw &
synth: analyze
$(GHDL) --synth --work=$(NAME) --workdir=$(BUILD_DIR) $(ENTITY_SYN)
$(GHDL) --synth $(GHDL_OPTS) $(ENTITY)
show: run_show
exec gtkwave -f $(SIM_FILE-y) -a $(BUILD_DIR)/$(TARGET).gtkw &
clean:
rm -f $(BUILD_DIR)/$(NAME)*.cf
rm -f $(BUILD_DIR)/$(NAME)*.vcd
rm -f $(BUILD_DIR)/$(NAME)*.fst
rm -f $(BUILD_DIR)/$(NAME)*.ghw
rm -f $(BUILD_DIR)/$(NAME)*.log
rm -f $(BUILD_DIR)/$(NAME)*.o
rm -rf $(BUILD_DIR)/$(WORK_DIR)
rm -f $(BUILD_DIR)/$(TARGET)*.vcd
rm -f $(BUILD_DIR)/$(TARGET)*.fst
rm -f $(BUILD_DIR)/$(TARGET)*.ghw
rm -f $(BUILD_DIR)/$(TARGET)*.log
rm -f $(BUILD_DIR)/$(TARGET)*.o
mrproper:
rm -rf $(BUILD_DIR)
rm -rf $(WORK_DIR)
Common/sim/ieee_proposed/modelsim/Makefile.ghdl
+30
View File
@@ -0,0 +1,30 @@
# -------------------------------------------------
# Compile script for GHDL
# -------------------------------------------------
# -------------------------------------------------
# Global options
# -------------------------------------------------
LANG_STD := 93c
IEEE_STD := standard
WORK_DIR := ieee_proposed
WORK_LIB := ieee_proposed
# -------------------------------------------------
# Target options
# -------------------------------------------------
TARGET := ghdl
SRCS := standard_additions_c.vhdl
SRCS += standard_textio_additions_c.vhdl
SRCS += env_c.vhdl
SRCS += std_logic_1164_additions.vhdl
SRCS += numeric_std_additions.vhdl
SRCS += numeric_std_unsigned_c.vhdl
SRCS += fixed_float_types_c.vhdl
SRCS += fixed_pkg_c.vhdl
SRCS += float_pkg_c.vhdl
include ../../../make/ghdl.mk
lib/CPUs/JCpu/ghdl/Makefile
+3 -4
View File
@@ -1,4 +1,4 @@
NAME ?= tb_cpu
TARGET ?= tb_cpu
include ../src/core/jcpu_core.mk
@@ -16,11 +16,10 @@ tb_mul8x8_ENTITY_RUN := tb_cpu_embedded
SRCS := $(JCPU_CORE_SRCS)
SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += $(addprefix ../src/,$($(NAME)_SRCS))
SRCS += $(addprefix ../src/,$($(TARGET)_SRCS))
# Compile
ENTITY_RUN = $($(NAME)_ENTITY_RUN)
BUILD_DIR := build
ENTITY := $($(TARGET)_ENTITY_RUN)
WITH_GHW := y
include ../../../../Common/make/ghdl.mk
lib/CPUs/JCpu/src/tb_cpu_embedded.vhd
-1
View File
@@ -102,7 +102,6 @@ STIMULUS: process
wait for 1000*CLK_PERIOD;
assert false report "Test finished" severity error;
wait;
end process;
lib/CPUs/JCpu/src/tb_cpu_irq.vhd
-1
View File
@@ -160,7 +160,6 @@ STIMULUS: process
wait for 300*CLK_PERIOD;
end loop;
assert false report "Test finished" severity error;
wait;
end process;
lib/CPUs/JCpu/src/tb_cpu_itest.vhd
-1
View File
@@ -154,7 +154,6 @@ STIMULUS: process
file_close(RESULT);
assert false report "Test finished" severity failure;
wait;
end process;
projects/ac97_Controller/syn/ise91/systest/project/systest.ipf
BIN
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Binary file not shown.
projects/cordic/Makefile
+14 -41
View File
@@ -3,59 +3,32 @@
# -------------------------------------------------
LANG_STD := 93c
IEEE_STD := standard
WORK_PATH := work
SOURCE_PATH := src
LIB_PATH := ../lib
WORK_DIR := work
WORK_LIB := work
# -------------------------------------------------
# Target options
# -------------------------------------------------
TARGET := tb_cordic_top
SOURCES := src/cordic_pkg.vhd \
SRCS := ../../lib/fixed/fixed_util_pkg.vhd
SRCS += ../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd
SRCS += ../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
SRCS += src/cordic_pkg.vhd \
src/cordic_rom.vhd \
src/cordic_stage_pre.vhd \
src/cordic_stage.vhd \
src/cordic_stage_post.vhd \
src/cordic_top.vhd \
src/tb_cordic_top.vhd
# -------------------------------------------------
GHDL_OPT := --workdir=$(WORK_PATH) --std=$(LANG_STD) --ieee=$(IEEE_STD)
# Compile
ENTITY := tb_cordic_top
WITH_GHW := y
# -------------------------------------------------
all: elaborate
.PHONY: syntax
syntax:
ghdl -s $(GHDL_OPT) $(SOURCES)
import:
ghdl -i $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES)
analyze:
ghdl -a $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES)
anaborate:
ghdl -c $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES) -e $(TARGET)
makeunit: analyze
ghdl -m $(GHDL_OPT) $(TARGET)
elaborate: analyze
ghdl -e $(GHDL_OPT) $(TARGET)
run: elaborate
ghdl -r $(GHDL_OPT) $(TARGET) --vcd=$(TARGET).vcd --assert-level=error
show: $(TARGET).vcd
gtkwave $(TARGET).vcd $(TARGET).sav
# -------------------------------------------------
.PHONY: clean
clean:
rm -rf $(TARGET)
cd $(WORK_PATH); rm -rf *.o *.cf
# -------------------------------------------------
include ../../Common/make/ghdl.mk
projects/cordic/x.txt
-254
View File
@@ -1,254 +0,0 @@
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projects/cordic/y.txt
-254
View File
@@ -1,254 +0,0 @@
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