From 85c1156549e53e00554b4c674b87722def71f8c0 Mon Sep 17 00:00:00 2001
From: Jens Ahrensfeld <jens@jayfield.org>
Date: Sun, 21 Mar 2021 15:38:01 +0000
Subject: [PATCH] - added missing IPF project files - improved GHDL build
 script

git-svn-id: http://moon:8086/svn/vhdl/trunk@1432 cc03376c-175c-47c8-b038-4cd826a8556b
---
 Common/make/ghdl.mk                           |  79 +++---
 .../sim/ieee_proposed/modelsim/Makefile.ghdl  |  30 +++
 lib/CPUs/JCpu/ghdl/Makefile                   |   7 +-
 lib/CPUs/JCpu/src/tb_cpu_embedded.vhd         |   1 -
 lib/CPUs/JCpu/src/tb_cpu_irq.vhd              |   1 -
 lib/CPUs/JCpu/src/tb_cpu_itest.vhd            |   1 -
 .../syn/ise91/systest/project/systest.ipf     | Bin 0 -> 4004 bytes
 projects/cordic/Makefile                      |  55 +---
 projects/cordic/x.txt                         | 254 ------------------
 projects/cordic/y.txt                         | 254 ------------------
 projects/cordic/z.txt                         | 254 ------------------
 .../syn/ise91/systest/project/cpu_systest.ipf | Bin 0 -> 4017 bytes
 .../systest/project/cpu_systest_prom.ipf      | Bin 0 -> 30128 bytes
 .../syn/ise91/project/messe_demo.ipf          | Bin 0 -> 4014 bytes
 .../ise101/mips_sys/project/default.ipf       | Bin 0 -> 46770 bytes
 .../ise101/mips_sys/project/mips_sys.ipf      | Bin 0 -> 46770 bytes
 projects/mips_sys/ise92/mips_sys/mips_sys.ipf | Bin 0 -> 46768 bytes
 .../vga_ctrl/syn/ise/project/vga_ctrl.ipf     | Bin 0 -> 3973 bytes
 18 files changed, 96 insertions(+), 840 deletions(-)
 create mode 100644 Common/sim/ieee_proposed/modelsim/Makefile.ghdl
 create mode 100644 projects/ac97_Controller/syn/ise91/systest/project/systest.ipf
 create mode 100644 projects/cpu/syn/ise91/systest/project/cpu_systest.ipf
 create mode 100644 projects/cpu/syn/ise91/systest/project/cpu_systest_prom.ipf
 create mode 100644 projects/messe_demo/syn/ise91/project/messe_demo.ipf
 create mode 100644 projects/mips_sys/ise101/mips_sys/project/default.ipf
 create mode 100644 projects/mips_sys/ise101/mips_sys/project/mips_sys.ipf
 create mode 100644 projects/mips_sys/ise92/mips_sys/mips_sys.ipf
 create mode 100644 projects/vga_ctrl/syn/ise/project/vga_ctrl.ipf

diff --git a/Common/make/ghdl.mk b/Common/make/ghdl.mk
index 50e4786..74507a6 100644
--- a/Common/make/ghdl.mk
+++ b/Common/make/ghdl.mk
@@ -1,59 +1,78 @@
-# NAME
-# BUILD_DIR
+# -------------------------------------------------
+# Global options
+# -------------------------------------------------
 # SRCS
-# ENTITY_RUN
-
 # WITH_VCD
-# WITH_VCD ?= y
+TARGET ?= default
+ENTITY ?= default
+WORK_DIR ?= work
+WORK_LIB ?= work
+LANG_STD ?= 93c
+IEEE_STD ?= standard
+RUN_TIME ?= 1000ns
 
 GHDL := ghdl
 GHDL_GCC := ghdl-gcc
 
-SIM_FILE-$(WITH_VCD) := $(BUILD_DIR)/$(NAME).vcd
-SIM_FILE-$(WITH_FST) := $(BUILD_DIR)/$(NAME).fst
-SIM_FILE-$(WITH_GHW) := $(BUILD_DIR)/$(NAME).ghw
+BUILD_DIR := build/$(TARGET)
+
+SIM_FILE-$(WITH_VCD) := $(BUILD_DIR)/$(TARGET).vcd
+SIM_FILE-$(WITH_FST) := $(BUILD_DIR)/$(TARGET).fst
+SIM_FILE-$(WITH_GHW) := $(BUILD_DIR)/$(TARGET).ghw
 
 GTK_OPTS-$(WITH_VCD) := --vcd=$(SIM_FILE-y)
 GTK_OPTS-$(WITH_FST) := --fst=$(SIM_FILE-y)
 GTK_OPTS-$(WITH_GHW) := --wave=$(SIM_FILE-y)
 
-RUN_OPTS := --assert-level=error 
-TS := ps
+
+RUN_OPTS := --stop-time=$(RUN_TIME)
+GHDL_OPTS := --work=$(WORK_LIB) --workdir=$(BUILD_DIR)/$(WORK_DIR) --std=$(LANG_STD) --ieee=$(IEEE_STD)
 
 all:  analyze
 
-$(BUILD_DIR):
+$(BUILD_DIR)/$(WORK_DIR):
 	mkdir -p $@
 	
-analyze: $(BUILD_DIR) $(SRCS)
-	$(GHDL) -a --work=$(NAME) --workdir=$(BUILD_DIR) --time-resolution=$(TS) $(SRCS)
+syntax: 
+	$(GHDL) -s $(GHDL_OPTS) $(SRCS)
+
+import:
+	$(GHDL) -i $(GHDL_OPTS) $(SRCS)
+
+analyze: $(BUILD_DIR)/$(WORK_DIR) $(SRCS)
+	$(GHDL) -a $(GHDL_OPTS) $(SRCS)
 	
-anaborate: $(BUILD_DIR) $(SRCS)
-	$(GHDL_GCC) -c -o $(BUILD_DIR)/$(NAME) -Wc,O2 --work=$(NAME) --workdir=$(BUILD_DIR) $(SRCS) -e $(ENTITY_RUN)
-	-$(BUILD_DIR)/$(NAME) $(GTK_OPTS-y) $(RUN_OPTS) >$(BUILD_DIR)/$(NAME).log
+anaborate: $(BUILD_DIR)/$(WORK_DIR) $(SRCS)
+	$(GHDL) -c $(GHDL_OPTS) -o $(BUILD_DIR)/$(TARGET) $(SRCS) -e $(ENTITY)
 	
+makeunit: analyze
+	$(GHDL) -m $(GHDL_OPTS) $(ENTITY)
+
+elaborate: analyze
+	$(GHDL) -e $(GHDL_OPTS) $(ENTITY)
+
 run: analyze
-	-$(GHDL) -r --work=$(NAME) --workdir=$(BUILD_DIR) --time-resolution=$(TS) $(ENTITY_RUN) $(RUN_OPTS)
+	$(GHDL) -r $(GHDL_OPTS) $(ENTITY) $(RUN_OPTS)
 	
-run_wave: analyze
-	-$(GHDL) -r --work=$(NAME) --workdir=$(BUILD_DIR) --time-resolution=$(TS) $(ENTITY_RUN) $(GTK_OPTS-y) $(RUN_OPTS) >$(BUILD_DIR)/$(NAME).log
+run_show: analyze
+	$(GHDL) -r $(GHDL_OPTS) $(ENTITY) $(RUN_OPTS) $(GTK_OPTS-y) >$(BUILD_DIR)/$(TARGET).log
 
-wave: run_wave
-	exec gtkwave -f $(SIM_FILE-y) -a $(BUILD_DIR)/$(NAME).gtkw &
-	
 synth: analyze
-	$(GHDL) --synth --work=$(NAME) --workdir=$(BUILD_DIR) $(ENTITY_SYN)
+	$(GHDL) --synth $(GHDL_OPTS) $(ENTITY)
 
+show: run_show
+	exec gtkwave -f $(SIM_FILE-y) -a $(BUILD_DIR)/$(TARGET).gtkw &
+	
 clean:
-	rm -f $(BUILD_DIR)/$(NAME)*.cf
-	rm -f $(BUILD_DIR)/$(NAME)*.vcd
-	rm -f $(BUILD_DIR)/$(NAME)*.fst
-	rm -f $(BUILD_DIR)/$(NAME)*.ghw
-		rm -f $(BUILD_DIR)/$(NAME)*.log
-	rm -f $(BUILD_DIR)/$(NAME)*.o	
+	rm -rf $(BUILD_DIR)/$(WORK_DIR)
+	rm -f $(BUILD_DIR)/$(TARGET)*.vcd
+	rm -f $(BUILD_DIR)/$(TARGET)*.fst
+	rm -f $(BUILD_DIR)/$(TARGET)*.ghw
+	rm -f $(BUILD_DIR)/$(TARGET)*.log
+	rm -f $(BUILD_DIR)/$(TARGET)*.o	
 				
 mrproper:
-	rm -rf $(BUILD_DIR)
+	rm -rf $(WORK_DIR)
 	
 	
 
diff --git a/Common/sim/ieee_proposed/modelsim/Makefile.ghdl b/Common/sim/ieee_proposed/modelsim/Makefile.ghdl
new file mode 100644
index 0000000..d326414
--- /dev/null
+++ b/Common/sim/ieee_proposed/modelsim/Makefile.ghdl
@@ -0,0 +1,30 @@
+# -------------------------------------------------
+# Compile script for GHDL
+# -------------------------------------------------
+
+# -------------------------------------------------
+# Global options
+# -------------------------------------------------
+LANG_STD := 93c
+IEEE_STD := standard
+WORK_DIR := ieee_proposed
+WORK_LIB := ieee_proposed
+
+
+# -------------------------------------------------
+# Target options
+# -------------------------------------------------
+TARGET := ghdl
+
+SRCS := standard_additions_c.vhdl
+SRCS += standard_textio_additions_c.vhdl
+SRCS += env_c.vhdl
+SRCS += std_logic_1164_additions.vhdl
+SRCS += numeric_std_additions.vhdl
+SRCS += numeric_std_unsigned_c.vhdl
+SRCS += fixed_float_types_c.vhdl
+SRCS += fixed_pkg_c.vhdl
+SRCS += float_pkg_c.vhdl
+
+include ../../../make/ghdl.mk
+
diff --git a/lib/CPUs/JCpu/ghdl/Makefile b/lib/CPUs/JCpu/ghdl/Makefile
index 39e7a3c..c1eb39b 100644
--- a/lib/CPUs/JCpu/ghdl/Makefile
+++ b/lib/CPUs/JCpu/ghdl/Makefile
@@ -1,4 +1,4 @@
-NAME ?= tb_cpu
+TARGET ?= tb_cpu
 
 include ../src/core/jcpu_core.mk
 
@@ -16,11 +16,10 @@ tb_mul8x8_ENTITY_RUN := tb_cpu_embedded
 
 SRCS := $(JCPU_CORE_SRCS)
 SRCS += ../../../PCK_FIO-2002.7/PCK_FIO_1993.vhd ../../../PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
-SRCS += $(addprefix ../src/,$($(NAME)_SRCS))
+SRCS += $(addprefix ../src/,$($(TARGET)_SRCS))
 
 # Compile
-ENTITY_RUN = $($(NAME)_ENTITY_RUN)
-BUILD_DIR := build
+ENTITY := $($(TARGET)_ENTITY_RUN)
 WITH_GHW := y
 
 include ../../../../Common/make/ghdl.mk
diff --git a/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd b/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd
index dafb553..0f1956c 100644
--- a/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd
+++ b/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd
@@ -102,7 +102,6 @@ STIMULUS: process
 	
 		wait for 1000*CLK_PERIOD;
 
-		assert false report "Test finished" severity error;
 		wait; 
 	
 	end process;
diff --git a/lib/CPUs/JCpu/src/tb_cpu_irq.vhd b/lib/CPUs/JCpu/src/tb_cpu_irq.vhd
index 8a19414..a181c03 100644
--- a/lib/CPUs/JCpu/src/tb_cpu_irq.vhd
+++ b/lib/CPUs/JCpu/src/tb_cpu_irq.vhd
@@ -160,7 +160,6 @@ STIMULUS: process
 			wait for 300*CLK_PERIOD;
 		end loop;		
 		
-		assert false report "Test finished" severity error;
 		wait; 
 	
 	end process;
diff --git a/lib/CPUs/JCpu/src/tb_cpu_itest.vhd b/lib/CPUs/JCpu/src/tb_cpu_itest.vhd
index 6c28c81..872efcd 100644
--- a/lib/CPUs/JCpu/src/tb_cpu_itest.vhd
+++ b/lib/CPUs/JCpu/src/tb_cpu_itest.vhd
@@ -154,7 +154,6 @@ STIMULUS: process
 	
 		file_close(RESULT);
 		
-		assert false report "Test finished" severity failure;
 		wait; 
 	
 	end process;
diff --git a/projects/ac97_Controller/syn/ise91/systest/project/systest.ipf b/projects/ac97_Controller/syn/ise91/systest/project/systest.ipf
new file mode 100644
index 0000000000000000000000000000000000000000..0f1d2d11a2162dbe82a7cb078811faeef3a1d35e
GIT binary patch
literal 4004
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literal 0
HcmV?d00001

diff --git a/projects/cordic/Makefile b/projects/cordic/Makefile
index 02b059c..4b507ff 100644
--- a/projects/cordic/Makefile
+++ b/projects/cordic/Makefile
@@ -3,59 +3,32 @@
 # -------------------------------------------------
 LANG_STD := 93c
 IEEE_STD := standard
-WORK_PATH := work
-SOURCE_PATH := src
-LIB_PATH := ../lib
+WORK_DIR := work
+WORK_LIB := work
+
 
 # -------------------------------------------------
 # Target options
 # -------------------------------------------------
 TARGET := tb_cordic_top
 
-SOURCES :=	src/cordic_pkg.vhd \
+SRCS := ../../lib/fixed/fixed_util_pkg.vhd
+SRCS += ../../lib/PCK_FIO-2002.7/PCK_FIO_1993.vhd
+SRCS += ../../lib/PCK_FIO-2002.7/PCK_FIO_1993_BODY.vhd
+
+SRCS +=	src/cordic_pkg.vhd \
 			src/cordic_rom.vhd \
 			src/cordic_stage_pre.vhd \
 			src/cordic_stage.vhd \
 			src/cordic_stage_post.vhd \
 			src/cordic_top.vhd \
 			src/tb_cordic_top.vhd 
+
+			
 			
-
 # -------------------------------------------------
-GHDL_OPT := --workdir=$(WORK_PATH) --std=$(LANG_STD) --ieee=$(IEEE_STD)
+# Compile
+ENTITY := tb_cordic_top
+WITH_GHW := y
 
-# -------------------------------------------------
-all: elaborate
-
-.PHONY: syntax
-syntax: 
-	ghdl -s $(GHDL_OPT) $(SOURCES)
-
-import:
-	ghdl -i $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES)
-
-analyze: 
-	ghdl -a $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES)
-
-anaborate:
-	ghdl -c $(GHDL_OPT) $(LIB_PATH)/*.vhd $(SOURCES) -e $(TARGET)
-
-makeunit: analyze
-	ghdl -m $(GHDL_OPT) $(TARGET)
-
-elaborate: analyze
-	ghdl -e $(GHDL_OPT) $(TARGET)
-
-run: elaborate
-	ghdl -r $(GHDL_OPT) $(TARGET) --vcd=$(TARGET).vcd --assert-level=error 
-
-show:  $(TARGET).vcd 
-	gtkwave $(TARGET).vcd $(TARGET).sav
-
-# -------------------------------------------------
-.PHONY: clean
-clean:
-	rm -rf $(TARGET)
-	cd $(WORK_PATH); rm -rf *.o *.cf
-	
-# -------------------------------------------------
+include ../../Common/make/ghdl.mk
diff --git a/projects/cordic/x.txt b/projects/cordic/x.txt
index b1382e8..e69de29 100644
--- a/projects/cordic/x.txt
+++ b/projects/cordic/x.txt
@@ -1,254 +0,0 @@
--1.000000e+000
--9.980267e-001
--9.921147e-001
--9.822873e-001
--9.685832e-001
--9.510565e-001
--9.297765e-001
--9.048271e-001
--8.763067e-001
--8.443279e-001
--8.090170e-001
--7.705132e-001
--7.289686e-001
--6.845471e-001
--6.374240e-001
--5.877853e-001
--5.358268e-001
--4.817537e-001
--4.257793e-001
--3.681246e-001
--3.090170e-001
--2.486899e-001
--1.873813e-001
--1.253332e-001
--6.279052e-002
--9.313226e-010
-6.279052e-002
-1.253332e-001
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-9.921147e-001
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-1.000000e+000
-9.980267e-001
-9.921147e-001
-9.822873e-001
-9.685832e-001
-9.510565e-001
-9.297765e-001
-9.048271e-001
-8.763067e-001
-8.443279e-001
-8.090170e-001
-7.705132e-001
-7.289686e-001
-6.845471e-001
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-4.817537e-001
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-3.681246e-001
-3.090170e-001
-2.486899e-001
-1.873813e-001
-1.253332e-001
-6.279052e-002
--9.313226e-010
--6.279052e-002
--1.253332e-001
--1.873813e-001
--2.486899e-001
--3.090170e-001
--3.681246e-001
--4.257793e-001
--4.817537e-001
--5.358268e-001
--5.877853e-001
--6.374240e-001
--6.845471e-001
--7.289686e-001
--7.705132e-001
--8.090170e-001
--8.443279e-001
--8.763067e-001
--9.048271e-001
--9.297765e-001
--9.510565e-001
--9.685832e-001
--9.822873e-001
--9.921147e-001
--9.980267e-001
--1.000000e+000
--9.980267e-001
--9.921147e-001
--9.822873e-001
--9.685832e-001
--9.510565e-001
--9.297765e-001
--9.048271e-001
--8.763067e-001
--8.443279e-001
--8.090170e-001
--7.705132e-001
--7.289686e-001
--6.845471e-001
--6.374240e-001
--5.877853e-001
--5.358268e-001
--4.817537e-001
--4.257793e-001
--3.681246e-001
--3.090170e-001
--2.486899e-001
--1.873813e-001
--1.253332e-001
--6.279052e-002
--9.313226e-010
-6.279052e-002
-1.253332e-001
-1.873813e-001
-2.486899e-001
-3.090170e-001
-3.681246e-001
-4.257793e-001
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-3.090170e-001
-2.486899e-001
-1.873813e-001
-1.253332e-001
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--3.681246e-001
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--8.763067e-001
--9.048271e-001
--9.297765e-001
--9.510565e-001
--9.685832e-001
--9.822873e-001
--9.921147e-001
--9.980267e-001
--1.000000e+000
--9.980267e-001
--9.921147e-001
--9.822873e-001
--9.685832e-001
--9.510565e-001
--9.297765e-001
--9.048271e-001
--8.763067e-001
--8.443279e-001
--8.090170e-001
--7.705132e-001
--7.289686e-001
--6.845471e-001
--6.374240e-001
--5.877853e-001
--5.358268e-001
--4.817537e-001
--4.257793e-001
--3.681246e-001
--3.090170e-001
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