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[JUART]

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- renamed ports

git-svn-id: http://moon:8086/svn/vhdl/trunk@1351 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2016-12-20 19:09:45 +00:00
parent 9522e9e22e
commit 82a500a99b
6 changed files with 87 additions and 82 deletions
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lib/uart/juart_rx.vhd
+18 -15
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@@ -19,13 +19,16 @@ use IEEE.numeric_std.ALL;
-- Main Entity
--
entity juart_rx is
Port ( serial_in : in std_logic;
data_out : out unsigned(7 downto 0);
data_strobe : out std_logic;
en_16_x_baud : in std_logic;
clk : in std_logic;
rst : in std_logic);
end juart_rx;
Port
(
rst : in std_logic;
clk : in std_logic;
ser_in : in std_logic;
dout : out unsigned(7 downto 0);
dout_vld : out std_logic;
en_16_x_baud : in std_logic
);
end juart_rx;
--
------------------------------------------------------------------------------------
--
@@ -72,10 +75,10 @@ data_out_reg:
process(clk)
begin
if rising_edge(clk) then
data_strobe <= '0';
dout_vld <= '0';
if data_valid = '1' then
data_out <= shiftreg;
data_strobe <= '1';
dout <= shiftreg;
dout_vld <= '1';
end if;
end if;
end process;
@@ -85,7 +88,7 @@ process(clk)
begin
if rising_edge(clk) then
if rst = '1' then
state <= idle;
state <= idle;
else
state <= state_next;
end if;
@@ -93,7 +96,7 @@ begin
end process;
statemachine:
process(state, is_idle, bit_count, bit_sample, serial_in)
process(state, is_idle, bit_count, bit_sample, ser_in)
begin
state_next <= state;
sample_count_rst <= '1';
@@ -107,7 +110,7 @@ begin
state_next <= wait_start;
end if;
when wait_start =>
if serial_in = '0' then
if ser_in = '0' then
sample_count_rst <= '0';
state_next <= start;
end if;
@@ -139,7 +142,7 @@ begin
if rst = '1' then
shiftreg <= (others => '0');
elsif shiftreg_en = '1' and bit_sample = '1' and en_16_x_baud = '1' then
shiftreg <= shiftreg(shiftreg'left-1 downto 0) & serial_in;
shiftreg <= shiftreg(shiftreg'left-1 downto 0) & ser_in;
end if;
end if;
end process;
@@ -172,7 +175,7 @@ idle_detector:
process(clk)
begin
if rising_edge(clk) then
if serial_in = '0' then
if ser_in = '0' then
idle_count <= idle_count_t'high;
elsif idle_count /= 0 and en_16_x_baud = '1' then
idle_count <= idle_count - 1;