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git-svn-id: http://moon:8086/svn/vhdl/trunk@518 cc03376c-175c-47c8-b038-4cd826a8556b
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jens
2009-10-17 12:58:15 +00:00
parent 6ac97e7bf3
commit 8159135dfd
1 changed files with 8 additions and 0 deletions
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lib/CPUs/MIPS/dist/tmpl/notes.txt
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@@ -34,6 +34,14 @@ Changes in release 12
Using NMI as reset is dangerous because periphery is not reseted.
Unitialized/unreseted periphery may cause trouble (e.g. firing unwanted interrupts)
- Bootloader: Startup now invalidates I/D-Caches at boot
- Bugfix: register bypass with same target register, used for unaligned loads (LWL, LWR), was incorrect. Newlib's memcpy() (MIPS-optimized) uses this.
Consectutive load instructions without nops (which is legal) using same target register like
lw $1, 0(mem)
lwl $1, 1(mem)
or
lwl $1, 0(mem)
lwr $1, 1(mem)
or similar, lead to incorrect result. Now it'S fixed.
-----------------------------------------------------------------
Changes in release 11