- Removed linefifo
- Uses now lib/FIFO/fifo_async.vhd git-svn-id: http://moon:8086/svn/vhdl/trunk@112 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
@@ -23,6 +23,7 @@ vcom -explicit -93 "../../../lib/FIFO/src/sync_fifo_ctrl.vhd"
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vcom -explicit -93 "../../../lib/FIFO/src/fifo_sync.vhd"
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vcom -explicit -93 "../../../lib/FIFO/src/fifo_sync_dist.vhd"
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vcom -explicit -93 "../../../lib/FIFO/src/async_fifo_ctrl.vhd"
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vcom -explicit -93 "../../../lib/FIFO/src/fifo_async.vhd"
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# CPU
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vcom -explicit -93 "../../../lib/CPUs/MIPS/src/core/mips_idecode_rom.vhd"
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@@ -45,14 +46,12 @@ vcom -explicit -93 "../../../lib/misc/rom_wb.vhd"
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# VGA
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/fonts/char_rom_c64.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_types.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/dpram.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/clkgen_virtex4.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/linefifo.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/char_gen.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_sync.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_timing.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_backend.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_frontend.vhd"
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vcom -explicit -93 "../../../lib/VGA_ctrl/src/vga_frontend64.vhd"
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# UART
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vcom -explicit -93 "../../../lib/uart/bbfifo_16x8.vhd"
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@@ -85,7 +84,7 @@ vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/reset_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/ddr_phy_virtex4.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb.vhd"
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vcom -explicit -93 "../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend64_wb.vhd"
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# Top and TB
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vcom -explicit -93 "../src/mips_sys_sim.vhd"
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@@ -13,11 +13,11 @@ add wave -noupdate -format Logic /tb_mips_sys/sys_lcd_e
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add wave -noupdate -format Logic /tb_mips_sys/sys_lcd_rs
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add wave -noupdate -format Logic /tb_mips_sys/sys_lcd_rw
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add wave -noupdate -format Logic /tb_mips_sys/refresh
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/st_ctrl
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_cmd/st_sdr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_addr
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_cmd_we
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_bank_addr
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/st_ctrl
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_cmd/st_sdr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_addr
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_cmd_we
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/inst_sdram_ctrl/inst_sdram_ctrl/u_bank_addr
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_fb
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_p
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add wave -noupdate -format Logic /tb_mips_sys/sys_sdr_clk_n
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@@ -31,15 +31,15 @@ add wave -noupdate -format Literal /tb_mips_sys/sys_sdr_ba_q
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_sdr_a_q
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_sdr_data
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add wave -noupdate -format Literal /tb_mips_sys/sys_sdr_dm_q
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/u_dm_wr_in
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/u_tag_in
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/u_tag_rd
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/u_tag_wr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/u_data_r
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/u_data_vld
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/inst_sdram_ctrl/u_data_req_w
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/read_fifo_data_in
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend_wb/read_fifo_data_out
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/u_dm_wr_in
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/u_tag_in
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/u_tag_rd
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/u_tag_wr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/u_data_r
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/u_data_vld
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/inst_sdram_ctrl/u_data_req_w
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/read_fifo_data_in
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_sdram_ctrl_frontend64_wb/read_fifo_data_out
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add wave -noupdate -format Literal /tb_mips_sys/sys_error
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/addr_o
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@@ -83,20 +83,33 @@ add wave -noupdate -format Logic /tb_mips_sys/uut/cyc_o_vga
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add wave -noupdate -format Logic /tb_mips_sys/uut/stb_o_vga
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add wave -noupdate -format Logic /tb_mips_sys/uut/srdy_i_vga
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add wave -noupdate -format Logic /tb_mips_sys/uut/ack_i_vga
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/fifo_full
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/fifo_empty
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/fifo_almost_empty
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/fifo_almost_full
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend/request_cnt
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend/read_cnt
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend/s
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/vga_master_en
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/vga_scan_rdy
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/fifo_color_re
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/fifo_color_we
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_vga_frontend/fifo_color_out
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_vga_frontend/fifo_color_in
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend/scan_rdy
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/fifo_full
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/fifo_empty
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/fifo_almost_empty
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/fifo_almost_full
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend64/request_cnt
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend64/read_cnt
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend64/s
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/vga_master_en
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/vga_scan_rdy
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/fifo_color_re
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/fifo_color_we
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_vga_frontend64/fifo_color_out
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_vga_frontend64/fifo_color_in
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/scan_rdy
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_vga_frontend64/color_in
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/stat_scan
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend64/stat_hpos
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend64/stat_vpos
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add wave -noupdate -format Literal /tb_mips_sys/uut/inst_vga_frontend64/odd_pixel
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/we_w
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/re_r
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add wave -noupdate -format Literal -radix unsigned /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/ptr_w
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add wave -noupdate -format Literal -radix unsigned /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/ptr_r
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add wave -noupdate -format Literal -radix unsigned /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/inst_fifo_ctrl/gcnt_r
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add wave -noupdate -format Literal -radix unsigned /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/inst_fifo_ctrl/bcnt_r
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add wave -noupdate -format Literal -radix unsigned /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/inst_fifo_ctrl/gnxt_r
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add wave -noupdate -format Literal -radix unsigned /tb_mips_sys/uut/inst_vga_frontend64/inst_linefifo/inst_fifo_ctrl/bnxt_r
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add wave -noupdate -divider BUI
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cyc_o_icache
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@@ -253,10 +266,6 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_imem_din
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/cpu_imem_rdy
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add wave -noupdate -divider {User ROM}
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add wave -noupdate -format Logic /tb_mips_sys/sys_user_rom_clk
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add wave -noupdate -format Logic /tb_mips_sys/sys_user_rom_en
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_user_rom_din
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/sys_user_rom_addr
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add wave -noupdate -divider UUT
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add wave -noupdate -format Logic /tb_mips_sys/uut/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_sys/uut/inst_mips_top/inst_pipeline/pc
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@@ -331,7 +340,7 @@ add wave -noupdate -format Literal -radix hexadecimal /tb_mips_sys/uut/inst_mips
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/tram_re
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add wave -noupdate -format Logic /tb_mips_sys/uut/inst_mips_top/inst_bui/inst_dcache/tram_we
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 2} {49999842932 ps} 0} {{Cursor 100} {971060308 ps} 0}
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WaveRestoreCursors {{Cursor 2} {49999842932 ps} 0} {{Cursor 100} {2346072600 ps} 0}
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configure wave -namecolwidth 218
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configure wave -valuecolwidth 130
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configure wave -justifyvalue left
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@@ -345,4 +354,4 @@ configure wave -gridperiod 100
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configure wave -griddelta 40
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configure wave -timeline 1
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update
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WaveRestoreZoom {970843856 ps} {971236215 ps}
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WaveRestoreZoom {8083733091 ps} {8083879943 ps}
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Block a user