Minor changes to satisfy timing

git-svn-id: http://moon:8086/svn/vhdl/trunk@18 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2008-09-20 22:16:55 +00:00
parent 7756d5c412
commit 38291789bf
+15 -13
View File
@@ -309,20 +309,22 @@ proc_stage_pc_next:
branch_ce <= '0';
cop_ctrl.exc_left <= '0';
if rst = '1' then
pc.nxt <= RESET_VECTOR;
pc.last <= RESET_VECTOR;
elsif cop_stat.exc_commit = '1' then
pc.nxt <= cop_stat.exc_vec;
elsif sdu.ID_stall = '0' then
cop_ctrl.exc_left <= cop_stat.exc_exit;
branch_ce <= '1';
pc.nxt <= pc.curr;
pc.last <= pc.curr;
if ID_stage.ctrl.jump = '1' then
pc.nxt <= ID_stage.jimm32;
elsif ID_stage.ctrl.jump_long = '1' then
pc.nxt <= ID_stage.reg_a;
else
pc.nxt <= pc.curr + 4;
else
if cop_stat.exc_commit = '1' then
pc.nxt <= cop_stat.exc_vec;
elsif sdu.ID_stall = '0' then
cop_ctrl.exc_left <= cop_stat.exc_exit;
branch_ce <= '1';
pc.last <= pc.curr;
if ID_stage.ctrl.jump = '1' then
pc.nxt <= ID_stage.jimm32;
elsif ID_stage.ctrl.jump_long = '1' then
pc.nxt <= ID_stage.reg_a;
else
pc.nxt <= pc.curr + 4;
end if;
end if;
end if;
end if;