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- bugfix blitter reset

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git-svn-id: http://moon:8086/svn/vhdl/trunk@674 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2009-11-22 15:36:07 +00:00
parent 51f9d7849f
commit 01739e1519
1 changed files with 4 additions and 9 deletions
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lib/VGA_ctrl/src/vga_frontend64.vhd
+4 -9
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@@ -145,7 +145,6 @@ architecture Behavioral of vga_frontend64 is
signal blit_comb_sel : unsigned(3 downto 0);
signal blit_request : std_logic;
signal blit_request_set : std_logic;
signal blit_request_clr : std_logic;
signal blit_complete : std_logic;
signal blit_complete_ack : std_logic;
signal blit_complete_inten : std_logic;
@@ -180,7 +179,6 @@ architecture Behavioral of vga_frontend64 is
signal blitfifo_color_out : unsigned(63 downto 0);
signal blitfifo_color_in : unsigned(63 downto 0);
signal blit_reset : std_logic;
signal blit_src_cnt_x : unsigned(31 downto 0);
signal blit_src_cnt_y : unsigned(31 downto 0);
signal blit_src_off_y : unsigned(31 downto 0);
@@ -243,14 +241,11 @@ proc_blit_request_flags:
process(CLK_I)
begin
if rising_edge(CLK_I) then
blit_reset <= '0';
if pixel_cnt_rst = '1' then
blit_request <= '0';
blit_reset <= '1';
elsif blit_request = '0' then
if blit_request_set = '1' then
blit_request <= '1';
blit_reset <= '1';
end if;
elsif blit_dst_finish = '1' and blitfifo_empty = '1' then
blit_request <= '0';
@@ -264,10 +259,10 @@ proc_blit_complete_flag:
if rising_edge(CLK_I) then
if RST_I = '1' then
blit_complete <= '0';
elsif blit_dst_finish = '1' and blitfifo_empty = '1' then
blit_complete <= '1';
elsif blit_complete_ack = '1' then
blit_complete <= '0';
elsif blit_dst_finish = '1' and blitfifo_empty = '1' then
blit_complete <= '1';
end if;
end if;
end process;
@@ -602,7 +597,7 @@ proc_blit_addr_src:
process(CLK_I)
begin
if rising_edge(CLK_I) then
if blit_reset = '1' then
if RST_I = '1' or (blit_request_set and not blit_request) = '1' then
blit_src_cnt_x <= (others => '0');
blit_src_cnt_y <= (others => '0');
blit_src_offset <= (others => '0');
@@ -632,7 +627,7 @@ proc_blit_addr_dst:
process(CLK_I)
begin
if rising_edge(CLK_I) then
if blit_reset = '1' then
if RST_I = '1' or (blit_request_set and not blit_request) = '1' then
blit_dst_cnt_x <= (others => '0');
blit_dst_cnt_y <= (others => '0');
blit_dst_offset <= (others => '0');