321 lines
20 KiB
Plaintext
321 lines
20 KiB
Plaintext
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, the Altera Quartus II License Agreement,
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# the Altera MegaCore Function License Agreement, or other
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# applicable license agreement, including, without limitation,
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# that your use is for the sole purpose of programming logic
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# devices manufactured by Altera and sold by Altera or its
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# authorized distributors. Please refer to the applicable
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# agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 15.0.0 Build 145 04/22/2015 SJ Web Edition
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# Date created = 15:44:09 November 26, 2016
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# JMips_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2014 Altera Corporation. All rights reserved.
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
|
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# functions, and any output files from any of the foregoing
|
|
# (including device programming or simulation files), and any
|
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# associated documentation or information are expressly subject
|
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, the Altera Quartus II License Agreement,
|
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# the Altera MegaCore Function License Agreement, or other
|
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# applicable license agreement, including, without limitation,
|
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# that your use is for the sole purpose of programming logic
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# devices manufactured by Altera and sold by Altera or its
|
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# authorized distributors. Please refer to the applicable
|
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# agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 14.0.0 Build 200 06/17/2014 SJ Web Edition
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# Date created = 08:21:44 May 14, 2015
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# JMips_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name DEVICE EP4CE22F17C6
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set_global_assignment -name TOP_LEVEL_ENTITY mips_sys
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "08:21:44 MAY 14, 2015"
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set_global_assignment -name LAST_QUARTUS_VERSION 15.0.0
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
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set_global_assignment -name EDA_RUN_TOOL_AUTOMATICALLY OFF -section_id eda_simulation
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name EDA_TEST_BENCH_ENABLE_STATUS NOT_USED -section_id eda_simulation
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set_global_assignment -name EDA_NATIVELINK_SIMULATION_TEST_BENCH TestBench -section_id eda_simulation
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set_global_assignment -name EDA_TEST_BENCH_NAME TestBench -section_id eda_simulation
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set_global_assignment -name EDA_DESIGN_INSTANCE_NAME NA -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_MODULE_NAME tb_mips_top -section_id TestBench
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set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST ON -section_id eda_simulation
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set_global_assignment -name EDA_WRITER_DONT_WRITE_TOP_ENTITY OFF -section_id eda_simulation
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set_global_assignment -name EDA_MAINTAIN_DESIGN_HIERARCHY ON -section_id eda_simulation
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set_global_assignment -name EDA_FLATTEN_BUSES OFF -section_id eda_simulation
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set_global_assignment -name SYNCHRONIZER_IDENTIFICATION AUTO
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set_global_assignment -name EDA_NATIVELINK_SIMULATION_SETUP_SCRIPT simulation/modelsim/run_msim_gate_vhdl.do -section_id eda_simulation
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set_global_assignment -name EDA_SIMULATION_RUN_SCRIPT simulation/modelsim/run_msim_gate_vhdl.do -section_id eda_simulation
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/CPUs/MIPS/src/bootloader.ROM.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/misc/async_types.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/CPUs/MIPS/src/async_defs.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/misc/async_port_wb.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/misc/gpio_wb.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/misc/rom_wb.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/uart/uart_wb.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/uart/uart_rx_sim.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/uart/uart_tx_sim.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/CPUs/MIPS/src/core/mips_types.vhd -section_id TestBench
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set_global_assignment -name EDA_TEST_BENCH_FILE ../../../../lib/CPUs/MIPS/src/tb_mips_top.vhd -section_id TestBench
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set_global_assignment -name ALLOW_REGISTER_MERGING ON
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set_global_assignment -name ALLOW_REGISTER_DUPLICATION ON
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set_global_assignment -name ALLOW_REGISTER_RETIMING ON
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set_global_assignment -name OPTIMIZATION_MODE BALANCED
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set_global_assignment -name ENABLE_OCT_DONE OFF
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set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
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set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
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set_global_assignment -name USE_CONFIGURATION_DEVICE ON
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set_global_assignment -name CRC_ERROR_OPEN_DRAIN ON
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
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set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
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set_global_assignment -name EDA_USER_COMPILED_SIMULATION_LIBRARY_DIRECTORY "<None>" -section_id eda_simulation
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set_global_assignment -name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH 4
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_clk
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set_location_assignment PIN_E1 -to sys_nmi_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_nmi_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_rst_n
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE test.stp
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set_location_assignment PIN_L3 -to sys_leds[7]
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set_location_assignment PIN_B1 -to sys_leds[6]
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set_location_assignment PIN_F3 -to sys_leds[5]
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set_location_assignment PIN_D1 -to sys_leds[4]
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set_location_assignment PIN_A11 -to sys_leds[3]
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set_location_assignment PIN_B13 -to sys_leds[2]
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set_location_assignment PIN_A13 -to sys_leds[1]
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set_location_assignment PIN_A15 -to sys_leds[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_leds[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to altera_reserved_tck
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to altera_reserved_tdi
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to altera_reserved_tdo
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to altera_reserved_tms
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[12]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_addr[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_ba[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_ba[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_cas_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_cke
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_clk
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_cs_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[15]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[14]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[13]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[12]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_data[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_dqm[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_dqm[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_ras_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to sys_sdram_we_n
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set_location_assignment PIN_P2 -to sys_sdram_addr[0]
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set_location_assignment PIN_N5 -to sys_sdram_addr[1]
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set_location_assignment PIN_N6 -to sys_sdram_addr[2]
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set_location_assignment PIN_M8 -to sys_sdram_addr[3]
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set_location_assignment PIN_P8 -to sys_sdram_addr[4]
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set_location_assignment PIN_T7 -to sys_sdram_addr[5]
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set_location_assignment PIN_N8 -to sys_sdram_addr[6]
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set_location_assignment PIN_T6 -to sys_sdram_addr[7]
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set_location_assignment PIN_R1 -to sys_sdram_addr[8]
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set_location_assignment PIN_P1 -to sys_sdram_addr[9]
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set_location_assignment PIN_N2 -to sys_sdram_addr[10]
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set_location_assignment PIN_N1 -to sys_sdram_addr[11]
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set_location_assignment PIN_L4 -to sys_sdram_addr[12]
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set_location_assignment PIN_G2 -to sys_sdram_data[0]
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set_location_assignment PIN_G1 -to sys_sdram_data[1]
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set_location_assignment PIN_L8 -to sys_sdram_data[2]
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set_location_assignment PIN_K5 -to sys_sdram_data[3]
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set_location_assignment PIN_K2 -to sys_sdram_data[4]
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set_location_assignment PIN_J2 -to sys_sdram_data[5]
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set_location_assignment PIN_J1 -to sys_sdram_data[6]
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set_location_assignment PIN_R7 -to sys_sdram_data[7]
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set_location_assignment PIN_T4 -to sys_sdram_data[8]
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set_location_assignment PIN_T2 -to sys_sdram_data[9]
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set_location_assignment PIN_T3 -to sys_sdram_data[10]
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set_location_assignment PIN_R3 -to sys_sdram_data[11]
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set_location_assignment PIN_R5 -to sys_sdram_data[12]
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set_location_assignment PIN_P3 -to sys_sdram_data[13]
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set_location_assignment PIN_N3 -to sys_sdram_data[14]
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set_location_assignment PIN_K1 -to sys_sdram_data[15]
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set_location_assignment PIN_M7 -to sys_sdram_ba[0]
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set_location_assignment PIN_M6 -to sys_sdram_ba[1]
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set_location_assignment PIN_L1 -to sys_sdram_cas_n
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set_location_assignment PIN_L7 -to sys_sdram_cke
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set_location_assignment PIN_R4 -to sys_sdram_clk
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set_location_assignment PIN_L2 -to sys_sdram_ras_n
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set_location_assignment PIN_R6 -to sys_sdram_dqm[0]
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set_location_assignment PIN_T5 -to sys_sdram_dqm[1]
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set_location_assignment PIN_C2 -to sys_sdram_we_n
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set_location_assignment PIN_P6 -to sys_sdram_cs_n
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set_location_assignment PIN_H1 -to spi_clk
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set_location_assignment PIN_H2 -to spi_miso
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set_location_assignment PIN_C1 -to spi_mosi
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set_location_assignment PIN_D2 -to spi_ss_n
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spi_clk
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spi_miso
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spi_mosi
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to spi_ss_n
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set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to uart_rx
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to uart_tx
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set_location_assignment PIN_D3 -to uart_rx[0]
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set_location_assignment PIN_A3 -to uart_rx[1]
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set_location_assignment PIN_C3 -to uart_tx[0]
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set_location_assignment PIN_B4 -to uart_tx[1]
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set_global_assignment -name VHDL_FILE "Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd"
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set_global_assignment -name VHDL_FILE ../../../../lib/spi/src/spi_flash_wb.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/spi/src/spi_types.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/spi/src/spi_master.vhd
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set_global_assignment -name SDC_FILE JMips.sdc
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set_global_assignment -name VHDL_FILE ../../../../lib/emac/src/sipo.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/emac/src/piso.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_config_mt48lc16m16.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_types.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_top.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl_frontend_wb16.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_ctrl.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_const.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdram_cmd.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdr_phy_de0nano.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/sdr_clk_cycloneive.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/SDRAM/ddr_sdr_v1_5/src/ctrl_sdr_wb32.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/uart_types.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/misc/bbfifo.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/uart_tx.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/uart_rx.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/uart.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/juart_tx.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/juart_rx.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/uart/uart_wb.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/rams/dpram_1w1r1c_ra_alt.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/misc/gpio_wb.vhd
|
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set_global_assignment -name VHDL_FILE ../../../../lib/misc/utils_pkg.vhd
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set_global_assignment -name VHDL_FILE ../../../../lib/misc/rom_wb.vhd
|
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set_global_assignment -name VHDL_FILE ../../../../lib/misc/ram_wb.vhd
|
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set_global_assignment -name VHDL_FILE ../../../../lib/rams/altera/dpram_1w1r2c_ra.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/rams/altera/dpram_2w2r2c_ra.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_sync_ctrl.vhd
|
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set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_sync.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/gray_counter.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_async_ctrl.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_async.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_types.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_top.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_shifter.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_reg.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_pipeline.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_muldiv.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_instr.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_icache.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_dcache.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_cop.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_biu.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_bcu.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/CPUs/MIPS/src/core/mips_alu.vhd
|
|
set_global_assignment -name VHDL_FILE mips_sys.vhd
|
|
set_global_assignment -name VHDL_FILE ../../../../lib/misc/jtag_reg_alt.vhd
|
|
set_location_assignment PIN_M1 -to dip_sw[0]
|
|
set_location_assignment PIN_T8 -to dip_sw[1]
|
|
set_location_assignment PIN_B9 -to dip_sw[2]
|
|
set_location_assignment PIN_M15 -to dip_sw[3]
|
|
set_location_assignment PIN_R8 -to clk_brd
|
|
set_location_assignment PIN_J15 -to rst_brd_n
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to clk_brd
|
|
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to rst_brd_n
|
|
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
|