jens f50a47246a - introduced per-bank activation (avoids multiple activations on same bank) ...

- some other improvements


git-svn-id: http://moon:8086/svn/vhdl/trunk@70 cc03376c-175c-47c8-b038-4cd826a8556b

2008-10-18 11:36:07 +00:00

lib

- introduced per-bank activation (avoids multiple activations on same bank)

2008-10-18 11:36:07 +00:00

projects/mips_sys

- Added VGA master/slave

2008-10-16 23:12:14 +00:00

S

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23 MiB

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VHDL 90.1%

Verilog 4.2%

Tcl 2.5%

SystemVerilog 0.8%

IGOR Pro 0.5%

Other 1.5%