jens d3beeb0538 Refactored after moving of VHDL make

2022-09-07 13:09:41 +02:00

..

.gitignore.templ

- aedd .gitignore.templ

2022-06-30 20:32:45 +02:00

tb_ddc.gtkw

- added DDC

2021-03-23 15:00:54 +00:00

tb_ddc.make

Refactored after moving of VHDL make

2022-09-07 13:09:41 +02:00

tb_results.m

- added

2021-03-23 15:08:51 +00:00

tb_syn_ddc.gtkw

- added

2021-03-23 17:31:55 +00:00

tb_syn_ddc.make

Refactored after moving of VHDL make

2022-09-07 13:09:41 +02:00