jens d3beeb0538 Refactored after moving of VHDL make

2022-09-07 13:09:41 +02:00

..

ghdl

Refactored after moving of VHDL make

2022-09-07 13:09:41 +02:00

sim

- fixed rams

2015-10-23 05:33:41 +00:00

src

Use same frequencies as tb_syn_ddc

2022-06-30 22:36:07 +02:00