jens
2f7ab91e0d
git-svn-id: http://moon:8086/svn/vhdl/trunk@1429 cc03376c-175c-47c8-b038-4cd826a8556b
113 lines
3.9 KiB
Plaintext
113 lines
3.9 KiB
Plaintext
#
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# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
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# SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
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# XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
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# AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
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# OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
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# IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
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# AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
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# FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
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# WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
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# IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
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# REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
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# INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE.
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#
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# (c) Copyright 2005 Xilinx, Inc.
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# All rights reserved.
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#
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# Bus clock nets
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#NET sys_clk TNM_NET = "sys_clk";
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#TIMESPEC "TSSYSCLK" = PERIOD "sys_clk" 9.9 ns HIGH 50 %;
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NET sys_clk LOC = AE14;
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NET sys_clk IOSTANDARD = LVCMOS33;
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NET sys_rst_n LOC = D6;
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NET sys_rst_n PULLUP;
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NET sys_rst_n TIG;
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# GPLED 0-3
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NET sys_led<0> LOC = G5; #GPLED0
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NET sys_led<1> LOC = G6; #GPLED1
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NET sys_led<2> LOC = A11; #GPLED2
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NET sys_led<3> LOC = A12; #GPLED3
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#NET "led<*>" SLEW = SLOW;
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#NET "led<*>" DRIVE = 2;
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# Dip Switches 1-8
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#NET sys_test_in<0> LOC = U24; # DIP SW 8
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#NET sys_test_in<1> LOC = U25; # DIP SW 7
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#NET sys_test_in<2> LOC = V23; # DIP SW 6
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#NET sys_test_in<3> LOC = U23; # DIP SW 5
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#NET sys_test_in<4> LOC = U26; # DIP SW 4
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#NET sys_test_in<5> LOC = T26; # DIP SW 3
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#NET sys_test_in<6> LOC = R19; # DIP SW 2
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#NET sys_test_in<7> LOC = R20; # DIP SW 1
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#NET sys_test_in<0> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<1> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<2> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<3> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<4> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<5> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<6> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<7> IOSTANDARD = LVCMOS33;
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#NET "sys_test_in<*>" PULLDOWN;
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#NET "sys_test_in<*>" TIG;
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#NET "sys_test_in<*>" SLEW = SLOW;
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#NET "sys_test_in<*>" DRIVE = 2;
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NET sys_hpi_a<0> LOC = U22;
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NET sys_hpi_a<1> LOC = Y10;
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NET sys_hpi_a<*> IOSTANDARD = LVCMOS33;
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NET sys_hpi_a<*> SLEW = FAST;
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NET sys_hpi_a<*> DRIVE = 8;
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NET sys_hpi_d<0> LOC = AB7;
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NET sys_hpi_d<1> LOC = AC9;
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NET sys_hpi_d<2> LOC = AB9;
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NET sys_hpi_d<3> LOC = AE6;
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NET sys_hpi_d<4> LOC = AD6;
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NET sys_hpi_d<5> LOC = AF9;
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NET sys_hpi_d<6> LOC = AE9;
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NET sys_hpi_d<7> LOC = AD8;
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NET sys_hpi_d<8> LOC = AC8;
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NET sys_hpi_d<9> LOC = AF4;
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NET sys_hpi_d<10> LOC = AE4;
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NET sys_hpi_d<11> LOC = AD3;
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NET sys_hpi_d<12> LOC = AC3;
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NET sys_hpi_d<13> LOC = AF6;
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NET sys_hpi_d<14> LOC = AF5;
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NET sys_hpi_d<15> LOC = AA7;
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NET sys_hpi_d<*> IOSTANDARD = LVCMOS33;
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NET sys_hpi_d<*> SLEW = FAST;
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NET sys_hpi_d<*> DRIVE = 8;
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NET sys_hpi_d<*> PULLUP;
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NET sys_hpi_rd_n LOC = AA8;
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NET sys_hpi_rd_n IOSTANDARD = LVCMOS33;
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NET sys_hpi_rd_n SLEW = FAST;
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NET sys_hpi_rd_n DRIVE = 8;
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NET sys_hpi_wr_n LOC = Y8;
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NET sys_hpi_wr_n IOSTANDARD = LVCMOS33;
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NET sys_hpi_wr_n SLEW = FAST;
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NET sys_hpi_wr_n DRIVE = 8;
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NET sys_hpi_cs_n LOC = AF10;
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NET sys_hpi_cs_n IOSTANDARD = LVCMOS33;
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NET sys_hpi_cs_n SLEW = FAST;
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NET sys_hpi_cs_n DRIVE = 8;
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NET sys_hpi_rst_n LOC = A7;
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NET sys_hpi_rst_n IOSTANDARD = LVCMOS25;
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NET sys_hpi_rst_n TIG;
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NET sys_hpi_int LOC = V5;
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NET sys_hpi_int IOSTANDARD = LVCMOS33;
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NET sys_hpi_int TIG;
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NET sys_hpi_int PULLUP;
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NET sys_sace_mpce_n LOC = AD5;
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NET sys_sace_mpce_n IOSTANDARD = LVCMOS33;
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NET sys_sace_mpce_n SLEW = FAST;
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NET sys_sace_mpce_n DRIVE = 8;
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