jens 9e5fa1c972 - fixed uart sim ...

git-svn-id: http://moon:8086/svn/vhdl/trunk@1371 cc03376c-175c-47c8-b038-4cd826a8556b

2017-01-18 22:25:53 +00:00

Common

- added

2015-10-24 16:12:48 +00:00

lib

- fixed uart sim

2017-01-18 22:25:53 +00:00

projects

[DE0-Nano]

2017-01-15 13:18:04 +00:00

S

Description

No description provided

23 MiB

Languages

VHDL 90.1%

Verilog 4.2%

Tcl 2.5%

SystemVerilog 0.8%

IGOR Pro 0.5%

Other 1.5%