jens 619807f898 - added vga_backend.inc (Zwischenstand) ...

git-svn-id: http://moon:8086/svn/vhdl/trunk@1552 cc03376c-175c-47c8-b038-4cd826a8556b

2021-03-28 14:18:52 +00:00

Common

- refactored

2021-03-28 10:27:33 +00:00

lib

- added vga_backend.inc (Zwischenstand)

2021-03-28 14:18:52 +00:00

make

- refactored

2021-03-28 14:18:09 +00:00

projects

- use FST

2021-03-28 12:02:56 +00:00

Makefile

- added run_wave target

2021-03-24 13:07:29 +00:00

S

Description

No description provided

23 MiB

Languages

VHDL 90.1%

Verilog 4.2%

Tcl 2.5%

SystemVerilog 0.8%

IGOR Pro 0.5%

Other 1.5%