jens 52e9decf78 - added instructions 'lwc0' and 'swc0' for testing (which are usually invalid) ...

- due to cop_reg_we in MEM_Stage, the output register is removed
  (timing is slightly degraded). The reg pointer is delayed instead by one cycle
- test-reg is now writable in user mode regardles of cop0 usability.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@406 cc03376c-175c-47c8-b038-4cd826a8556b

2009-03-18 23:30:08 +00:00

..

bsp

- deleted

2009-03-14 17:19:59 +00:00

dist

- Update

2009-03-01 18:32:40 +00:00

doc

- Update

2009-03-15 02:37:24 +00:00

sim

- removed idecode_rom.vhd

2009-03-17 09:49:57 +00:00

src

- added instructions 'lwc0' and 'swc0' for testing (which are usually invalid)

2009-03-18 23:30:08 +00:00

syn/ise101

- update

2009-01-30 21:43:29 +00:00

tools

- added install target

2009-02-14 15:02:28 +00:00

todo.txt

- Update

2009-03-18 10:08:05 +00:00