jens
0edf614e5e
Use fifo_sync instead and specified ditributed ram_style in XCF-file during synthesis Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@472 cc03376c-175c-47c8-b038-4cd826a8556b
19 lines
988 B
Plaintext
19 lines
988 B
Plaintext
vhdl work "W:\vhdl\lib\misc\dpram_2w2r.vhd"
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vhdl work "W:\vhdl\lib\misc\dpram_1w1r.vhd"
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vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync_ctrl.vhd"
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vhdl work "W:\vhdl\lib\FIFO\src\fifo_ctrl_pkg.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_types.vhd"
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vhdl work "W:\vhdl\lib\FIFO\src\fifo_sync.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_shifter.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_reg.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_muldiv.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_instr.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_icache.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_dcache.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bcu.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_alu.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_pipeline.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_cop.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_biu.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_top.vhd"
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