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1aa4dcee1fa55e5e131733610d6fdafce096bb5c
vhdl
/
projects
/
vga_ctrl
T
History
jens
1aa4dcee1f
- use correct rams for synthesis
...
git-svn-id:
http://moon:8086/svn/vhdl/trunk@1590
cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-29 19:43:27 +00:00
..
asm
- added main_sim
2021-03-29 14:11:00 +00:00
ghdl
- update
2021-03-29 14:19:41 +00:00
sim
- added
2021-03-21 11:05:13 +00:00
src
- fixed timing issues
2021-03-29 19:11:21 +00:00
syn
/ise
- use correct rams for synthesis
2021-03-29 19:43:27 +00:00