jens 11fa96a4e7 [Uart] ...

- uart_wb instantiates uart
- merged uart_tx, uart_rx into uart
- added uart implementations for Xilinx (kcuart) and Altera (JTAG)

git-svn-id: http://moon:8086/svn/vhdl/trunk@1239 cc03376c-175c-47c8-b038-4cd826a8556b

2015-05-27 15:50:32 +00:00

..

ac97_ctrl

- commit local changes after CVS2SVN

2014-07-20 13:30:14 +00:00

CPUs

- fixed path

2015-05-23 16:18:15 +00:00

doc

- initial version

2015-02-07 06:35:28 +00:00

emac

- updated

2015-05-26 17:27:01 +00:00

FIFO

- interface change to rams

2015-05-17 17:24:05 +00:00

filter

- deleted

2014-07-25 06:47:31 +00:00

fix_std

Initial import

2008-08-23 08:20:30 +00:00

fixed

- moved real_array_t and natural_array_t

2014-07-23 20:30:42 +00:00

fixed_ja

CRLF

2014-07-23 20:08:46 +00:00

jasm

Initial import

2008-08-23 08:20:30 +00:00

JBUS

- added

2014-07-24 06:31:44 +00:00

misc

moved

2015-05-23 08:18:37 +00:00

netlists

- initial version

2015-02-07 06:35:28 +00:00

PCK_FIO-1.16

Minor changes

2010-03-12 07:35:21 +00:00

PCK_FIO-2002.7

- commit local changes after CVS2SVN

2014-07-20 13:30:14 +00:00

ps2_port

- cleaned up

2015-05-23 11:42:43 +00:00

radio

- added

2014-07-24 06:47:53 +00:00

rams

[Xilinx/dpram_2w2r2c_ra]

2015-05-17 18:14:42 +00:00

SDRAM

- generate CKE from SDRAM CMD fsm. Simplified interfaces

2015-05-25 12:13:27 +00:00

SSRAM

- added

2014-07-23 20:13:06 +00:00

Standard

- initial version

2015-02-07 06:35:28 +00:00

uart

[Uart]

2015-05-27 15:50:32 +00:00

VGA_ctrl

[VGA]

2015-05-17 19:10:49 +00:00

ChangeLog

- initial version

2015-02-07 06:35:28 +00:00