jens
2edaa4d7cb
git-svn-id: http://moon:8086/svn/vhdl/trunk@1290 cc03376c-175c-47c8-b038-4cd826a8556b
15 lines
408 B
Plaintext
15 lines
408 B
Plaintext
To operate the test bench for the Micron SDRAM VHDL model, follow the directions
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given below:
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1. Be sure all supporting files for the SDRAM are compiled into your library:
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util1164.vhd
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stdlogar.vhd
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io_utils.vhd
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mti_pkg.vhd
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2. Next, compile the mt48lc1m16a1.vhd file and the test.vhd file.
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3. Simulate the "tb" architecture. This is the testbench for the SDRAM.
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