- added models
git-svn-id: http://moon:8086/svn/vhdl/trunk@1290 cc03376c-175c-47c8-b038-4cd826a8556b
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@@ -0,0 +1,52 @@
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<!DOCTYPE FTML SYSTEM "ftml.dtd">
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<FTML><HEAD><TITLE>FMF Timing for s25fl064a Parts</TITLE>
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<BODY>
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<REVISION.HISTORY>
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version: | author: | mod date: | changes made:
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V1.0 G.Gojanovic 05 May 13 Initial release
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</REVISION.HISTORY>
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<TIMESCALE>1ns</TIMESCALE>
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<MODEL>s25fl064a
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<FMFTIME>
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S25Fl064A0LMAI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMFI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNAI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNFI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMAI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMFI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNAI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNFI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMAI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMFI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNAI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNFI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
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Industrial Ta=-40 to +85 Celsius
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Comercial Ta=0 to +70 Celsius</COMMENT>
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<TIMING>
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(DELAY (ABSOLUTE
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(IOPATH SCK SO (3:6:9) (3:6:9) () (3:6:9) () (3:6:9))
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(IOPATH HOLDNeg SO () () (4:7:10) (4:7:10) (4:7:10) (4:7:10))
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(IOPATH CSNeg SO () () (4:7:10) () (4:7:10) ())
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))
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(TIMINGCHECK
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(SETUP CSNeg SCK (5))
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(SETUP HOLDNeg SCK (5))
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(SETUP SI SCK (5))
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(SETUP WNeg CSNeg (15))
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(HOLD CSNeg SCK (5))
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(HOLD HOLDNeg SCK (5))
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(HOLD SI SCK (5))
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(HOLD WNeg CSNeg (15))
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(WIDTH (negedge SCK) (9))
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(WIDTH (posedge SCK) (9))
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(WIDTH (posedge CSNeg) (100))
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(PERIOD (COND fast_rd SCK) (20.0))
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(PERIOD (COND rd SCK) (40.0))
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)
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</TIMING></FMFTIME>
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</BODY></FTML>
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@@ -0,0 +1,65 @@
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<!DOCTYPE FTML SYSTEM "ftml.dtd">
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<FTML><HEAD><TITLE>FMF Timing for s25fl064a Parts</TITLE>
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<BODY>
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<REVISION.HISTORY>
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version: | author: | mod date: | changes made:
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V1.0 G.Gojanovic 05 May 11 Initial release
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</REVISION.HISTORY>
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<TIMESCALE>1ns</TIMESCALE>
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<MODEL>s25fl064a
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<FMFTIME>
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S25Fl064A0LMAI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMFI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNAI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNFI000<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMAI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMFI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNAI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNFI001<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMAI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LMFI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNAI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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S25Fl064A0LNFI003<SOURCE> s25fl064a_00_a0 April 26, 2005 </SOURCE>
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<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
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Industrial Ta=-40 to +85 Celsius
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Comercial Ta=0 to +70 Celsius</COMMENT>
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<TIMING>
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(DELAY (ABSOLUTE
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(IOPATH SCK SO (3:6:9) (3:6:9) () (3:6:9) () (3:6:9))
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(IOPATH HOLDNeg SO () () (4:7:10) (4:7:10) (4:7:10) (4:7:10))
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(IOPATH CSNeg SO () () (4:7:10) () (4:7:10) ())
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))
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(TIMINGCHECK
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(SETUP CSNeg SCK (5))
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(SETUP HOLDNeg SCK (5))
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(SETUP SI SCK (5))
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(SETUP WNeg CSNeg (15))
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(HOLD CSNeg SCK (5))
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(HOLD HOLDNeg SCK (5))
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(HOLD SI SCK (5))
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(HOLD WNeg CSNeg (15))
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(WIDTH (negedge SCK) (9))
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(WIDTH (posedge SCK) (9))
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(WIDTH (posedge CSNeg) (100))
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(PERIOD (COND fast_rd SCK) (20.0))
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(PERIOD (COND rd SCK) (40.0))
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))
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(1000000:1500000:3000000) ) ) ) )
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(1e9:15e8:3e9) ) ) ) )
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(128e9:192e9:384e9) ) ) ) )
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/WR) (DELAY (ABSOLUTE (DEVICE(60000000:60000000:60000000) ) ) ) )
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(10000000:10000000:10000000) ) ) ) )
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/DP) (DELAY (ABSOLUTE (DEVICE(3000:3000:3000) ) ) ) )
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(CELL (CELLTYPE "VITALbuf")
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(INSTANCE %LABEL%/RES) (DELAY (ABSOLUTE (DEVICE(30000:30000:30000) ) ) )
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</TIMING></FMFTIME>
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</BODY></FTML>
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@@ -0,0 +1,10 @@
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SET sdffile_suffix .sdf
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SET use_global_timing_dir false
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SET timingfile_dir /user/USERNAME/CreateSDF
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SET timingfile_suffix .ftm
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SET time_scale 1ns
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SET local_path .
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SET vendor MODELSIM_HOME
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SET diagnostics on
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SET vhdl_file testbench.vhd
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SET lwb false
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@@ -0,0 +1,462 @@
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#!/usr/local/bin/perl
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#
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# mk_sdf : Perl replacement for C mk_sdf
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#
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# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License version 2 as
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# published by the Free Software Foundation.
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#
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# Author : R. Munden
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# Date : 20001115
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# Version : 2.0.4
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#
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# Revision history:
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# 2.0: 19990702
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# o Intial release of perl version
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# 2.0.1: 19990722
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# o fixed problem with . in path for TimingModels
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# 2.0.2: 20000616
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# o changed instance search to work with Mentor
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# 2.0.3: 20001115
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# o changed to parse ":" without leading space
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# o fixed problem with . in path for TimingModels again
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# 2.0.4: 20030405
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# o chaged SDF version to 3.0
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#
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#################################################################
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#
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# command line arguments:
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# ARGV[0] - name of VHDL netlist
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# global variables:
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# %component_list - list of instance names by component name
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# %instance_isin - list architectures by instances contained therein
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# %instance_comp - list of component names by instance name
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# %comp_lib - library each component (by name) is configured to
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# @instance_list - array of all instance names in design in order found
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$version = "2.0.4";
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$design_name = '';
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$timing_dir = '';
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$diags = "off";
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%keywords = (architecture => 1,
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component => 1,
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timingmodel => 1);
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# INPUT files
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$CMD = "mk_sdf.cmd";
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$VHD = ''; # name of VHDL netlist
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# OUTPUT files
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$RFV = "/tmp/short.vhd"; # reformatted VHDL
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$sdf_file = ''; # name of SDF file
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&read_cmd_file;
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&get_names;
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&reformat;
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open INPUT, $RFV;
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@lines = <INPUT>;
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close INPUT;
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$current_architecture = "";
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foreach $line (@lines)
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{
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@words = split / /, $line;
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foreach $word (@words)
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{
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$keywords{$word} == "1" and do { &$word(@words);};
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if ($component_list{$word})
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||||
{
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||||
$line =~ /(.+) : $word/ and do {
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if ($1 !~ /for/) { # instantiation found
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$component_list{$word} = $component_list{$word} . $1;
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push (@instance_list, $1);
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$instance_name = $1;
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}
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};
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$instance_comp{$1} = $word;
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$instance_isin{$1} = $current_architecture;
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if ( $diags ne off ) {
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print "reading instance $instance_name: $word in $current_architecture\n";
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}
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$line =~ /for all : $word use entity (.+)/ and do
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{
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@config = split(/\./, $1);
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$comp_lib{$word} = $config[0];};
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}
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}
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}
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if ( $diags ne off ) {
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print "finished with netlist\n\n";
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}
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&begin_sdf;
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&build_paths;
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&close_sdf;
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`rm $RFV`;
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print "$time\n";
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sub architecture
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{
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$current_architecture = $_[3];
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push (@architectures, $current_architecture);
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}
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sub component
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{
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if ($_[0] ne "end")
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{
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$name = $_[1];
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$arch_list{$current_architecture} =
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$arch_list{$current_architecture} . " " . $name;
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unless ($component_list{$name}) { $component_list{$name} = " ";}
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}
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}
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sub timingmodel
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{
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$line =~ /timingmodel => \"(.+)\"/ and do {
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$model = $1;
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$model_name{$instance_name} = $model;
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};
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}
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sub begin_sdf
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{
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if ( $diags ne off ) {
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print "writing SDF boilerplate\n";
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}
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$time = localtime;
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if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
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print "Opening $sdf_file\n";
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print SDF "(DELAYFILE\n";
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print SDF " (SDFVERSION \"3.0\")\n";
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print SDF " (DESIGN \"$design_name\")\n";
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print SDF " (DATE \"$time\")\n";
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print SDF " (VENDOR \"Free Model Foundry\")\n";
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print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
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print SDF " (VERSION \"$version\")\n";
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print SDF " (DIVIDER /)\n";
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print SDF " (VOLTAGE)\n";
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print SDF " (PROCESS)\n";
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print SDF " (TEMPERATURE)\n";
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||||
print SDF " (TIMESCALE 1ns)\n";
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}
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||||
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sub build_paths
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||||
{
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||||
foreach $instance_list (@instance_list)
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{
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@instance = $instance_list;
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foreach $instance (@instance)
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{
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||||
if ( $diags ne off ) {
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print "working on $instance\n";
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||||
}
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if ($gtd =~ /true/i) {
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||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
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||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
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} else {
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||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
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||||
}
|
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$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
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||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
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||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
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||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,89 @@
|
||||
##########################################
|
||||
Date (DD/MM/YYYY) - 07.09.2010
|
||||
|
||||
Model name - S25FL064K
|
||||
|
||||
Vendor - SPANSION (www.spansion.com)
|
||||
|
||||
Publication ID - Document No. P/N: S25FL064K_00 Rev. 0.01, June 29. 2010,
|
||||
Spansion Inc.
|
||||
|
||||
VITAL model author - Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
INITIAL RELEASE
|
||||
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl064k-2010-09-07-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 07/09/2010
|
||||
# Release Version => 1.0
|
||||
|
||||
##########################################
|
||||
VITAL model author - Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl064k-2010-09-08-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 08/09/2010
|
||||
# Release Version => 1.1
|
||||
|
||||
# Corrections:
|
||||
# Documentation added.
|
||||
# Write Enable for Volatile Status register Instruction implemented.
|
||||
# Test for Write Enable for Volatile Status register instruction.
|
||||
|
||||
# Files modified
|
||||
-s25fl064.v
|
||||
-testbench_s25fl064k_verilog.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
##########################################
|
||||
VITAL model author - Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl064k-2010-09-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/09/2010
|
||||
# Release Version => 1.2
|
||||
|
||||
# Corrections:
|
||||
# VHDL model added
|
||||
# Read ID instruciton (ABh) also can be issued when device is not in deep power down mode
|
||||
# bus_cycle section for WRR command is changed
|
||||
# path delay conditions modified
|
||||
|
||||
# Files modified
|
||||
-s25fl064.v
|
||||
-testbench_s25fl064k_verilog.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl064k.ftmv
|
||||
-s25fl064k_verilog.sdf
|
||||
##########################################
|
||||
VITAL model author - Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl064k-2010-09-17-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 17/09/2010
|
||||
# Release Version => 1.3
|
||||
|
||||
# Corrections:
|
||||
# Line "define SPEEDSIM" in Verilog model was left commented, and testbench had parameter
|
||||
# 'LongTimming' set on FALSE
|
||||
# some unnecessary lines were removed
|
||||
|
||||
# Files modified
|
||||
-s25fl064.v
|
||||
-testbench_s25fl064k_verilog.vhd
|
||||
-s25fl064k.vhd
|
||||
-testbench_s25fl064k_vhdl.vhd
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl064k-2012-06-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/06/2012
|
||||
# Release Version => 1.4
|
||||
|
||||
# Corrections:
|
||||
# Corrected functionality for sector and block erase and page program operation
|
||||
|
||||
# Files modified
|
||||
-s25fl064k.vhd
|
||||
##########################################
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,61 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl064k Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 10 Aug 25 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl064k
|
||||
<FMFTIME>
|
||||
S25FL064KOSMFI000<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI001<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI003<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI010<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI011<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI013<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY(ABSOLUTE
|
||||
(COND ~read_id (IOPATH SCK SO (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND read_id (IOPATH SCK SO (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5:6:7) () (5:6:7) ()))
|
||||
(COND ~quad_read (IOPATH HOLDNeg SO () () (8:10:12) (5:6:7) (8:10:12) (5:6:7)))
|
||||
(COND dual_read || quad_read (IOPATH SCK SI (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND CSNeg && ~deg_sin (IOPATH CSNeg SI () () (5:6:7) () (5:6:7) ()))
|
||||
(COND ~quad_read && dual_read (IOPATH HOLDNeg SI () () (8:10:12) (5:6:7) (8:10:12) (5:6:7)))
|
||||
(COND quad_read (IOPATH SCK WPNeg (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND quad_read (IOPATH SCK HOLDNeg (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND CSNeg && QE (IOPATH CSNeg SI () () (5:6:7) () (5:6:7) ()))
|
||||
(COND CSNeg && QE (IOPATH CSNeg WPNeg () () (5:6:7) () (5:6:7) ()))
|
||||
(COND CSNeg && QE (IOPATH CSNeg HOLDNeg () () (5:6:7) () (5:6:7) ()))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (posedge SCK) (5))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (2))
|
||||
(SETUP SO (COND quad_pg(posedge SCK)) (2))
|
||||
(SETUP WPNeg (COND quad_pg(posedge SCK)) (2))
|
||||
(SETUP HOLDNeg (COND quad_pg(posedge SCK)) (2))
|
||||
(SETUP HOLDNeg (COND hold_cond(posedge SCK)) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (5))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (5))
|
||||
(HOLD SO (COND quad_pg (posedge SCK)) (5))
|
||||
(HOLD WPNeg (COND quad_pg (posedge SCK)) (5))
|
||||
(HOLD HOLDNeg (COND quad_pg (posedge SCK)) (5))
|
||||
(HOLD HOLDNeg (COND hold_cond(posedge SCK)) (5))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
|
||||
(WIDTH (COND rd_slow (posedge SCK)) (15.2))
|
||||
(WIDTH (COND rd_slow (negedge SCK)) (15.2))
|
||||
(WIDTH (COND rd_fast (posedge SCK)) (6.25))
|
||||
(WIDTH (COND rd_fast (negedge SCK)) (6.25))
|
||||
(WIDTH (COND any_read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pg_ers (posedge CSNeg)) (50))
|
||||
(PERIOD (COND rd_slow SCK) (30.4))
|
||||
(PERIOD (COND rd_fast SCK) (12.5))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,81 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl064k Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 10 Sep 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl064k
|
||||
<FMFTIME>
|
||||
S25FL064KOSMFI000<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI001<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI003<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI010<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI011<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
S25FL064KOSMFI013<SOURCE> Spansion, S25FL064K, Rev. 01,JUN.29,2010 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY(ABSOLUTE
|
||||
(COND RDID == 0 (IOPATH SCK SO (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND RDID == 1 (IOPATH SCK SO (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(IOPATH CSNeg SO () () (5:6:7) () (5:6:7) ())
|
||||
(IOPATH HOLDNeg SO () () (8:10:12) (5:6:7) (8:10:12) (5:6:7))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (5))
|
||||
(SETUP (COND normal SI) (posedge SCK) (2))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (5))
|
||||
(HOLD (COND normal SI) (posedge SCK) (5))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND slow (posedge SCK)) (15.2))
|
||||
(WIDTH (COND slow (negedge SCK)) (15.2))
|
||||
(WIDTH (COND fast (posedge SCK)) (6.25))
|
||||
(WIDTH (COND fast (negedge SCK)) (6.25))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pger (posedge CSNeg)) (50))
|
||||
(PERIOD (COND slow SCK) (30.4))
|
||||
(PERIOD (COND fast SCK) (12.5))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(400000:700000:3000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP1) (DELAY (ABSOLUTE (DEVICE(15000:30000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP2) (DELAY (ABSOLUTE (DEVICE(1000:2500:12000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(10000000:30000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE1) (DELAY (ABSOLUTE (DEVICE(5e7:12e7:8e8) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE2) (DELAY (ABSOLUTE (DEVICE(5e7:15e7:1e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/CE) (DELAY (ABSOLUTE (DEVICE(5e9:15e9:30e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(10000:10000:10000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/DP) (DELAY (ABSOLUTE (DEVICE(3000:3000:3000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES1) (DELAY (ABSOLUTE (DEVICE(3000:3000:3000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES2) (DELAY (ABSOLUTE (DEVICE(1800:1800:1800) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGRES) (DELAY (ABSOLUTE (DEVICE(200:200:200) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSRES) (DELAY (ABSOLUTE (DEVICE(200:200:200) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(15000000:15000000:15000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SUSP_DLY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,10 @@
|
||||
SET sdffile_suffix .sdf
|
||||
SET use_global_timing_dir false
|
||||
SET timingfile_dir /user/USERNAME/CreateSDF
|
||||
SET timingfile_suffix .ftm
|
||||
SET time_scale 1ns
|
||||
SET local_path .
|
||||
SET vendor MODELSIM_HOME
|
||||
SET diagnostics on
|
||||
SET vhdl_file testbench.vhd
|
||||
SET lwb false
|
||||
@@ -0,0 +1,462 @@
|
||||
#!/usr/local/bin/perl
|
||||
#
|
||||
# mk_sdf : Perl replacement for C mk_sdf
|
||||
#
|
||||
# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# Author : R. Munden
|
||||
# Date : 20001115
|
||||
# Version : 2.0.4
|
||||
#
|
||||
# Revision history:
|
||||
# 2.0: 19990702
|
||||
# o Intial release of perl version
|
||||
# 2.0.1: 19990722
|
||||
# o fixed problem with . in path for TimingModels
|
||||
# 2.0.2: 20000616
|
||||
# o changed instance search to work with Mentor
|
||||
# 2.0.3: 20001115
|
||||
# o changed to parse ":" without leading space
|
||||
# o fixed problem with . in path for TimingModels again
|
||||
# 2.0.4: 20030405
|
||||
# o chaged SDF version to 3.0
|
||||
#
|
||||
#################################################################
|
||||
#
|
||||
# command line arguments:
|
||||
|
||||
# ARGV[0] - name of VHDL netlist
|
||||
|
||||
# global variables:
|
||||
|
||||
# %component_list - list of instance names by component name
|
||||
# %instance_isin - list architectures by instances contained therein
|
||||
# %instance_comp - list of component names by instance name
|
||||
# %comp_lib - library each component (by name) is configured to
|
||||
# @instance_list - array of all instance names in design in order found
|
||||
|
||||
$version = "2.0.4";
|
||||
$design_name = '';
|
||||
$timing_dir = '';
|
||||
$diags = "off";
|
||||
|
||||
%keywords = (architecture => 1,
|
||||
component => 1,
|
||||
timingmodel => 1);
|
||||
|
||||
# INPUT files
|
||||
$CMD = "mk_sdf.cmd";
|
||||
$VHD = ''; # name of VHDL netlist
|
||||
|
||||
# OUTPUT files
|
||||
$RFV = "/tmp/short.vhd"; # reformatted VHDL
|
||||
$sdf_file = ''; # name of SDF file
|
||||
|
||||
&read_cmd_file;
|
||||
&get_names;
|
||||
&reformat;
|
||||
|
||||
open INPUT, $RFV;
|
||||
@lines = <INPUT>;
|
||||
close INPUT;
|
||||
|
||||
$current_architecture = "";
|
||||
|
||||
foreach $line (@lines)
|
||||
{
|
||||
@words = split / /, $line;
|
||||
foreach $word (@words)
|
||||
{
|
||||
$keywords{$word} == "1" and do { &$word(@words);};
|
||||
if ($component_list{$word})
|
||||
{
|
||||
$line =~ /(.+) : $word/ and do {
|
||||
if ($1 !~ /for/) { # instantiation found
|
||||
$component_list{$word} = $component_list{$word} . $1;
|
||||
push (@instance_list, $1);
|
||||
$instance_name = $1;
|
||||
}
|
||||
};
|
||||
$instance_comp{$1} = $word;
|
||||
$instance_isin{$1} = $current_architecture;
|
||||
if ( $diags ne off ) {
|
||||
print "reading instance $instance_name: $word in $current_architecture\n";
|
||||
}
|
||||
$line =~ /for all : $word use entity (.+)/ and do
|
||||
{
|
||||
@config = split(/\./, $1);
|
||||
$comp_lib{$word} = $config[0];};
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "finished with netlist\n\n";
|
||||
}
|
||||
|
||||
&begin_sdf;
|
||||
&build_paths;
|
||||
&close_sdf;
|
||||
`rm $RFV`;
|
||||
|
||||
print "$time\n";
|
||||
|
||||
sub architecture
|
||||
{
|
||||
$current_architecture = $_[3];
|
||||
push (@architectures, $current_architecture);
|
||||
}
|
||||
|
||||
sub component
|
||||
{
|
||||
if ($_[0] ne "end")
|
||||
{
|
||||
$name = $_[1];
|
||||
$arch_list{$current_architecture} =
|
||||
$arch_list{$current_architecture} . " " . $name;
|
||||
unless ($component_list{$name}) { $component_list{$name} = " ";}
|
||||
}
|
||||
}
|
||||
|
||||
sub timingmodel
|
||||
{
|
||||
$line =~ /timingmodel => \"(.+)\"/ and do {
|
||||
$model = $1;
|
||||
$model_name{$instance_name} = $model;
|
||||
};
|
||||
}
|
||||
|
||||
sub begin_sdf
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "writing SDF boilerplate\n";
|
||||
}
|
||||
$time = localtime;
|
||||
if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
|
||||
print "Opening $sdf_file\n";
|
||||
print SDF "(DELAYFILE\n";
|
||||
print SDF " (SDFVERSION \"3.0\")\n";
|
||||
print SDF " (DESIGN \"$design_name\")\n";
|
||||
print SDF " (DATE \"$time\")\n";
|
||||
print SDF " (VENDOR \"Free Model Foundry\")\n";
|
||||
print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
|
||||
print SDF " (VERSION \"$version\")\n";
|
||||
print SDF " (DIVIDER /)\n";
|
||||
print SDF " (VOLTAGE)\n";
|
||||
print SDF " (PROCESS)\n";
|
||||
print SDF " (TEMPERATURE)\n";
|
||||
print SDF " (TIMESCALE 1ns)\n";
|
||||
}
|
||||
|
||||
sub build_paths
|
||||
{
|
||||
foreach $instance_list (@instance_list)
|
||||
{
|
||||
@instance = $instance_list;
|
||||
foreach $instance (@instance)
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "working on $instance\n";
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
|
||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
|
||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,196 @@
|
||||
##########################################
|
||||
Date (DD/MM/YYYY) - 22.01.2008.
|
||||
|
||||
Model name - S25FL064P
|
||||
|
||||
Vendor - Spansion LLC
|
||||
|
||||
Publication ID - SPANSION, Rev.16 Issue Date: November 7, 2007
|
||||
|
||||
VITAL model author - Dragisa Stanojkovic
|
||||
d-stanojkovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
INITIAL RELEASE
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2008-01-22-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 22/01/2008
|
||||
# Release Version => 1.0
|
||||
|
||||
##########################################
|
||||
RELEASE 1.1
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2008-02-20-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 20/02/2008
|
||||
# Release Version => 1.1
|
||||
|
||||
# Bugs fixed (from previous release)
|
||||
- Quad functionality issue
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.vhd
|
||||
- s25fl064p.v
|
||||
- testbench_s25fl064p_vhdl.vhd
|
||||
- testbench_s25fl064p_verilog.vhd
|
||||
- spansion_tc_pkg.vhd
|
||||
- model_release_history.txt
|
||||
##########################################
|
||||
##########################################
|
||||
Publication ID - SPANSION, S25FL064 032P DRS Rev.19, 2008
|
||||
|
||||
VITAL model author - Dragisa Stanojkovic
|
||||
d-stanojkovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.2
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2008-03-05-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 05/03/2008
|
||||
# Release Version => 1.2
|
||||
|
||||
# Bugs fixed (from previous release)
|
||||
- MPM mode for Dual/Quad High Performance changed
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.ftm
|
||||
- s25fl064p.ftmv
|
||||
- s25fl064p_vhdl.sdf
|
||||
- s25fl064p_verilog.sdf
|
||||
- s25fl064p.vhd
|
||||
- s25fl064p.v
|
||||
- testbench_s25fl064p_vhdl.vhd
|
||||
- testbench_s25fl064p_verilog.vhd
|
||||
- spansion_tc_pkg.vhd
|
||||
- model_release_history.txt
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.3
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2008-03-20-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 20/03/2008
|
||||
# Release Version => 1.3
|
||||
|
||||
# Bugs fixed (from previous release)
|
||||
- MPM mode removed
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.vhd
|
||||
- s25fl064p.v
|
||||
- testbench_s25fl064p_vhdl.vhd
|
||||
- testbench_s25fl064p_verilog.vhd
|
||||
- spansion_tc_pkg.vhd
|
||||
- model_release_history.txt
|
||||
##########################################
|
||||
##########################################
|
||||
|
||||
VITAL model author - Jadranka Stoickov
|
||||
j-stoickov@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.4
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2008-08-07-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 07/08/2008
|
||||
# Release Version => 1.4
|
||||
|
||||
# Bugs fixed (from previous release)
|
||||
- WEL bit fixed
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.v
|
||||
- model_release_history.txt
|
||||
##########################################
|
||||
##########################################
|
||||
Publication ID - SPANSION, S25FL129_064_032P_DRS Rev.23.2, Oct 13, 2008
|
||||
|
||||
VITAL model author - Jadranka Stoickov
|
||||
j-stoickov@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.5
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2008-15-10-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/12/2008
|
||||
# Release Version => 1.5
|
||||
|
||||
# Changes made (from previous release)
|
||||
- alignment to new datasheet
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.ftm
|
||||
- s25fl064p.ftmv
|
||||
- s25fl064p_vhdl.sdf
|
||||
- s25fl064p_verilog.sdf
|
||||
- s25fl064p.vhd
|
||||
- s25fl064p.v
|
||||
- testbench_s25fl064p_vhdl.vhd
|
||||
- testbench_s25fl064p_verilog.vhd
|
||||
- spansion_tc_pkg.vhd
|
||||
- model_release_history.txt
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.6
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2009-05-29-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 29/05/2009
|
||||
# Release Version => 1.6
|
||||
|
||||
# Changes made (from previous release)
|
||||
- Timing ranges in timing files corrected
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.ftm
|
||||
- s25fl064p.ftmv
|
||||
- s25fl064p_vhdl.sdf
|
||||
- s25fl064p_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.7
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2010-09-29-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 29/09/2010
|
||||
# Release Version => 1.7
|
||||
|
||||
# Changes made (from previous release)
|
||||
# 1. During the QUAD mode HOLD# input is not monitored for its normal function
|
||||
# 2. Internal pull-up resistors for HOLD# and WP# inputs are implemented
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.vhd
|
||||
- s25fl064p.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
RELEASE 1.8
|
||||
|
||||
# Release Label => vital-amd-REL-s25fl064p-2012-01-13-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 13/01/2012
|
||||
# Release Version => 1.8
|
||||
|
||||
# Changes made (from previous release)
|
||||
- alignment to new datasheet (S25FL064P_00_05, November 18, 2011)
|
||||
|
||||
# Files modified (from previous release)
|
||||
- s25fl064p.ftm
|
||||
- s25fl064p.ftmv
|
||||
- s25fl064p_vhdl.sdf
|
||||
- s25fl064p_verilog.sdf
|
||||
- s25fl064p.vhd
|
||||
- s25fl064p.v
|
||||
- testbench_s25fl064p_vhdl.vhd
|
||||
- testbench_s25fl064p_verilog.vhd
|
||||
- spansion_tc_pkg.vhd
|
||||
- spansion_flash_testbench_struct.pdf
|
||||
- spansion_flash_test_cases_list.pdf
|
||||
- model_release_history.txt
|
||||
##########################################
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,230 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl064p Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 D.Stanojkovic 08 Jan 11 Initial release
|
||||
V1.1 D.Stanojkovic 08 Mar 04 New timmings added and changed
|
||||
timming model labeling
|
||||
V1.2 J.Stoickov 08 Dec 10 Changed timming model labeling
|
||||
V1.3 S.Petrovic 09 May 29 Timing ranges corrected
|
||||
V1.4 V.Mancev 12 Jan 10 Latest datasheet update
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl064p
|
||||
<FMFTIME>
|
||||
S25FL064P0XMFI000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI020_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI023_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI030_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI033_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV020_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV023_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV030_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV033_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~dual (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8)))
|
||||
(COND dual (IOPATH SCK SO (6.5:8:9.5) (6.5:8:9.5) () (6.5:8:9.5) () (6.5:8:9.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~dual (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND dual (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(COND dual (IOPATH SCK SI (6.5:8:9.5) (6.5:8:9.5) () (6.5:8:9.5) () (6.5:8:9.5)))
|
||||
(COND dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND dual && CSNeg (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND dual && QUAD (IOPATH SCK HOLDNeg (6.5:8:9.5) (6.5:8:9.5) () (6.5:8:9.5) () (6.5:8:9.5)))
|
||||
(COND dual && CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND dual && QUAD (IOPATH SCK WPNeg (6.5:8:9.5) (6.5:8:9.5) () (6.5:8:9.5) () (6.5:8:9.5)))
|
||||
(COND dual && CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (3))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP SI SCK (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (3))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD SI SCK (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (posedge SCK)) (4.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(PERIOD (COND fast_rd SCK) (9.6))
|
||||
(PERIOD (COND rd SCK) (25.0))
|
||||
(PERIOD (COND rd_jid SCK) (20.0))
|
||||
(PERIOD (COND dual_rd SCK) (12.5))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL064P0XMFI000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI020_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI023_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI030_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI033_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV020_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV023_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV030_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV033_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~dual (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) () (4.5:5.5:6.5) () (4.5:5.5:6.5)))
|
||||
(COND dual (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~dual (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND dual (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(COND dual (IOPATH SCK SI (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8)))
|
||||
(COND dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND dual && CSNeg (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND dual && QUAD (IOPATH SCK HOLDNeg (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8)))
|
||||
(COND dual && CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND dual && QUAD (IOPATH SCK WPNeg (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8)))
|
||||
(COND dual && CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (3))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP SI SCK (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (3))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD SI SCK (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (posedge SCK)) (4.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(PERIOD (COND fast_rd SCK) (9.6))
|
||||
(PERIOD (COND rd SCK) (25.0))
|
||||
(PERIOD (COND rd_jid SCK) (20.0))
|
||||
(PERIOD (COND dual_rd SCK) (12.5))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL064P0XMFI000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI020_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI023_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI030_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI033_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV020_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV023_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV030_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV033_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~dual (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) () (4.5:5.5:6.5) () (4.5:5.5:6.5)))
|
||||
(COND dual (IOPATH SCK SO (4.7:5.8:7) (4.7:5.8:7) () (4.7:5.8:7) () (4.7:5.8:7)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~dual (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND dual (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(COND dual (IOPATH SCK SI (4.7:5.8:7) (4.7:5.8:7) () (4.7:5.8:7) () (4.7:5.8:7)))
|
||||
(COND dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND dual && CSNeg (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND dual && QUAD (IOPATH SCK HOLDNeg (4.7:5.8:7) (4.7:5.8:7) () (4.7:5.8:7) () (4.7:5.8:7)))
|
||||
(COND dual && CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND dual && QUAD (IOPATH SCK WPNeg (4.7:5.8:7) (4.7:5.8:7) () (4.7:5.8:7) () (4.7:5.8:7)))
|
||||
(COND dual && CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (3))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP SI SCK (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (3))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD SI SCK (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (posedge SCK)) (4.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(PERIOD (COND fast_rd SCK) (9.6))
|
||||
(PERIOD (COND rd SCK) (25.0))
|
||||
(PERIOD (COND rd_jid SCK) (20.0))
|
||||
(PERIOD (COND dual_rd SCK) (12.5))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,242 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl064p Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 D.Stanojkovic 08 Jan 22 Initial release
|
||||
V1.1 D.Stanojkovic 08 Mar 04 New timmings added and changed
|
||||
timming model labeling
|
||||
V1.2 J.Stoickov 08 Dec 10 Changed timming model labeling
|
||||
V1.3 S.Petrovic 09 May 29 Timing ranges corrected
|
||||
V1.4 V.Mancev 12 Jan 12 Latest datasheet update
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl064p
|
||||
<FMFTIME>
|
||||
S25FL064P0XMFI000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV000_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV001_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV003_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI020_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI023_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI030_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI033_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV020_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV023_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV030_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV033_F_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8))
|
||||
(IOPATH SCK SI (6.5:8:9.5) (6.5:8:9.5) () (6.5:8:9.5) () (6.5:8:9.5))
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (3))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP SI SCK (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (3))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD SI SCK (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND serial_fast (negedge SCK)) (4.5))
|
||||
(WIDTH (COND serial_fast (posedge SCK)) (4.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.5))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.5))
|
||||
(WIDTH (COND serial (negedge SCK)) (4.5))
|
||||
(WIDTH (COND serial (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (posedge SCK)) (4.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgm (posedge CSNeg)) (50))
|
||||
(PERIOD (COND serial_fast_rd SCK) (9.6))
|
||||
(PERIOD (COND serial_rd SCK) (25.0))
|
||||
(PERIOD (COND serial_rd_jid SCK) (20.0))
|
||||
(PERIOD (COND dual_fast_rd SCK) (12.5))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(1200000:1500000:3000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/EP) (DELAY (ABSOLUTE (DEVICE(1000000:1200000:2400000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(40e7:50e7:2e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(50e9:64e9:128e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WR) (DELAY (ABSOLUTE(DEVICE(100000000:100000000:100000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300000:300000:300000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/DP) (DELAY (ABSOLUTE (DEVICE(10000:10000:10000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PE) (DELAY (ABSOLUTE (DEVICE(20e7:20e7:80e7) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES) (DELAY (ABSOLUTE (DEVICE(30000:30000:30000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL064P0XMFI000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV000_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV001_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV003_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI020_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI023_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI030_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI033_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV020_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV023_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV030_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV033_R_30pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) () (4.5:5.5:6.5) () (4.5:5.5:6.5))
|
||||
(IOPATH SCK SI (5.4:6.7:8) (5.4:6.7:8) () (5.4:6.7:8) () (5.4:6.7:8))
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (3))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP SI SCK (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (3))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD SI SCK (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND serial_fast (negedge SCK)) (4.5))
|
||||
(WIDTH (COND serial_fast (posedge SCK)) (4.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.5))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.5))
|
||||
(WIDTH (COND serial (negedge SCK)) (4.5))
|
||||
(WIDTH (COND serial (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (posedge SCK)) (4.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgm (posedge CSNeg)) (50))
|
||||
(PERIOD (COND serial_fast_rd SCK) (9.6))
|
||||
(PERIOD (COND serial_rd SCK) (25.0))
|
||||
(PERIOD (COND serial_rd_jid SCK) (20.0))
|
||||
(PERIOD (COND dual_fast_rd SCK) (12.5))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(1200000:1500000:3000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/EP) (DELAY (ABSOLUTE (DEVICE(1000000:1200000:2400000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(40e7:50e7:2e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(50e9:64e9:128e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WR) (DELAY (ABSOLUTE(DEVICE(100000000:100000000:100000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300000:300000:300000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/DP) (DELAY (ABSOLUTE (DEVICE(10000:10000:10000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PE) (DELAY (ABSOLUTE (DEVICE(20e7:20e7:80e7) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES) (DELAY (ABSOLUTE (DEVICE(30000:30000:30000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL064P0XMFI000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFI003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFI003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XMFV003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV000_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV001_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XNFV003_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI020_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI023_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI030_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHI033_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV020_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV023_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV030_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
S25FL064P0XBHV033_R_15pF<SOURCE> Spansion, S25FL064P_00_05, November 18, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) () (4.5:5.5:6.5) () (4.5:5.5:6.5))
|
||||
(IOPATH SCK SI (4.7:5.8:7) (4.7:5.8:7) () (4.7:5.8:7) () (4.7:5.8:7))
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (3))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP SI SCK (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (3))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD SI SCK (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND serial_fast (negedge SCK)) (4.5))
|
||||
(WIDTH (COND serial_fast (posedge SCK)) (4.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.5))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.5))
|
||||
(WIDTH (COND serial (negedge SCK)) (4.5))
|
||||
(WIDTH (COND serial (posedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (negedge SCK)) (4.5))
|
||||
(WIDTH (COND rd_jid (posedge SCK)) (4.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgm (posedge CSNeg)) (50))
|
||||
(PERIOD (COND serial_fast_rd SCK) (9.6))
|
||||
(PERIOD (COND serial_rd SCK) (25.0))
|
||||
(PERIOD (COND serial_rd_jid SCK) (20.0))
|
||||
(PERIOD (COND dual_fast_rd SCK) (12.5))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(1200000:1500000:3000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/EP) (DELAY (ABSOLUTE (DEVICE(1000000:1200000:2400000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(40e7:50e7:2e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(50e9:64e9:128e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WR) (DELAY (ABSOLUTE(DEVICE(100000000:100000000:100000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300000:300000:300000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/DP) (DELAY (ABSOLUTE (DEVICE(10000:10000:10000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PE) (DELAY (ABSOLUTE (DEVICE(20e7:20e7:80e7) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES) (DELAY (ABSOLUTE (DEVICE(30000:30000:30000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,10 @@
|
||||
SET sdffile_suffix .sdf
|
||||
SET use_global_timing_dir false
|
||||
SET timingfile_dir /user/USERNAME/CreateSDF
|
||||
SET timingfile_suffix .ftm
|
||||
SET time_scale 1ns
|
||||
SET local_path .
|
||||
SET vendor MODELSIM_HOME
|
||||
SET diagnostics on
|
||||
SET vhdl_file testbench.vhd
|
||||
SET lwb false
|
||||
@@ -0,0 +1,462 @@
|
||||
#!/usr/local/bin/perl
|
||||
#
|
||||
# mk_sdf : Perl replacement for C mk_sdf
|
||||
#
|
||||
# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# Author : R. Munden
|
||||
# Date : 20001115
|
||||
# Version : 2.0.4
|
||||
#
|
||||
# Revision history:
|
||||
# 2.0: 19990702
|
||||
# o Intial release of perl version
|
||||
# 2.0.1: 19990722
|
||||
# o fixed problem with . in path for TimingModels
|
||||
# 2.0.2: 20000616
|
||||
# o changed instance search to work with Mentor
|
||||
# 2.0.3: 20001115
|
||||
# o changed to parse ":" without leading space
|
||||
# o fixed problem with . in path for TimingModels again
|
||||
# 2.0.4: 20030405
|
||||
# o chaged SDF version to 3.0
|
||||
#
|
||||
#################################################################
|
||||
#
|
||||
# command line arguments:
|
||||
|
||||
# ARGV[0] - name of VHDL netlist
|
||||
|
||||
# global variables:
|
||||
|
||||
# %component_list - list of instance names by component name
|
||||
# %instance_isin - list architectures by instances contained therein
|
||||
# %instance_comp - list of component names by instance name
|
||||
# %comp_lib - library each component (by name) is configured to
|
||||
# @instance_list - array of all instance names in design in order found
|
||||
|
||||
$version = "2.0.4";
|
||||
$design_name = '';
|
||||
$timing_dir = '';
|
||||
$diags = "off";
|
||||
|
||||
%keywords = (architecture => 1,
|
||||
component => 1,
|
||||
timingmodel => 1);
|
||||
|
||||
# INPUT files
|
||||
$CMD = "mk_sdf.cmd";
|
||||
$VHD = ''; # name of VHDL netlist
|
||||
|
||||
# OUTPUT files
|
||||
$RFV = "/tmp/short.vhd"; # reformatted VHDL
|
||||
$sdf_file = ''; # name of SDF file
|
||||
|
||||
&read_cmd_file;
|
||||
&get_names;
|
||||
&reformat;
|
||||
|
||||
open INPUT, $RFV;
|
||||
@lines = <INPUT>;
|
||||
close INPUT;
|
||||
|
||||
$current_architecture = "";
|
||||
|
||||
foreach $line (@lines)
|
||||
{
|
||||
@words = split / /, $line;
|
||||
foreach $word (@words)
|
||||
{
|
||||
$keywords{$word} == "1" and do { &$word(@words);};
|
||||
if ($component_list{$word})
|
||||
{
|
||||
$line =~ /(.+) : $word/ and do {
|
||||
if ($1 !~ /for/) { # instantiation found
|
||||
$component_list{$word} = $component_list{$word} . $1;
|
||||
push (@instance_list, $1);
|
||||
$instance_name = $1;
|
||||
}
|
||||
};
|
||||
$instance_comp{$1} = $word;
|
||||
$instance_isin{$1} = $current_architecture;
|
||||
if ( $diags ne off ) {
|
||||
print "reading instance $instance_name: $word in $current_architecture\n";
|
||||
}
|
||||
$line =~ /for all : $word use entity (.+)/ and do
|
||||
{
|
||||
@config = split(/\./, $1);
|
||||
$comp_lib{$word} = $config[0];};
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "finished with netlist\n\n";
|
||||
}
|
||||
|
||||
&begin_sdf;
|
||||
&build_paths;
|
||||
&close_sdf;
|
||||
`rm $RFV`;
|
||||
|
||||
print "$time\n";
|
||||
|
||||
sub architecture
|
||||
{
|
||||
$current_architecture = $_[3];
|
||||
push (@architectures, $current_architecture);
|
||||
}
|
||||
|
||||
sub component
|
||||
{
|
||||
if ($_[0] ne "end")
|
||||
{
|
||||
$name = $_[1];
|
||||
$arch_list{$current_architecture} =
|
||||
$arch_list{$current_architecture} . " " . $name;
|
||||
unless ($component_list{$name}) { $component_list{$name} = " ";}
|
||||
}
|
||||
}
|
||||
|
||||
sub timingmodel
|
||||
{
|
||||
$line =~ /timingmodel => \"(.+)\"/ and do {
|
||||
$model = $1;
|
||||
$model_name{$instance_name} = $model;
|
||||
};
|
||||
}
|
||||
|
||||
sub begin_sdf
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "writing SDF boilerplate\n";
|
||||
}
|
||||
$time = localtime;
|
||||
if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
|
||||
print "Opening $sdf_file\n";
|
||||
print SDF "(DELAYFILE\n";
|
||||
print SDF " (SDFVERSION \"3.0\")\n";
|
||||
print SDF " (DESIGN \"$design_name\")\n";
|
||||
print SDF " (DATE \"$time\")\n";
|
||||
print SDF " (VENDOR \"Free Model Foundry\")\n";
|
||||
print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
|
||||
print SDF " (VERSION \"$version\")\n";
|
||||
print SDF " (DIVIDER /)\n";
|
||||
print SDF " (VOLTAGE)\n";
|
||||
print SDF " (PROCESS)\n";
|
||||
print SDF " (TEMPERATURE)\n";
|
||||
print SDF " (TIMESCALE 1ns)\n";
|
||||
}
|
||||
|
||||
sub build_paths
|
||||
{
|
||||
foreach $instance_list (@instance_list)
|
||||
{
|
||||
@instance = $instance_list;
|
||||
foreach $instance (@instance)
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "working on $instance\n";
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
|
||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
|
||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,21 @@
|
||||
##########################################
|
||||
Date (DD/MM/YYYY) - 08.10.2010
|
||||
|
||||
Model name - S25FL128K
|
||||
|
||||
Vendor - SPANSION (www.spansion.com)
|
||||
|
||||
Publication ID - Document No. P/N: S25FL128K_00_01, July 22. 2010,
|
||||
Spansion Inc.
|
||||
|
||||
VITAL model author - Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
INITIAL RELEASE
|
||||
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128k-2010-10-08-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 08/10/2010
|
||||
# Release Version => 1.0
|
||||
|
||||
##########################################
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,65 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl128k Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 10 Oct 08 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl128k
|
||||
<FMFTIME>
|
||||
S25FL128KOXMFI000<SOURCE> Spansion, S25FL128K, JULY 22,2010 </SOURCE>
|
||||
S25FL128KOXMFI001<SOURCE> Spansion, S25FL128K, JULY 22,2010 </SOURCE>
|
||||
S25FL128KOXMFI003<SOURCE> Spansion, S25FL128K, JULY 22,2010 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY(ABSOLUTE
|
||||
(COND ~read_id (IOPATH SCK SO (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND (~glitch || quad_read) && read_id (IOPATH SCK SO (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5:6:7) () (5:6:7) ()))
|
||||
(COND ~quad_read (IOPATH HOLDNeg SO () () (8:10:12) (5:6:7) (8:10:12) (5:6:7)))
|
||||
(COND (dual_read || quad_read) && ~read_id (IOPATH SCK SI (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND dual_read && read_id && ~glitch (IOPATH SCK SI (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(COND quad_read && read_id (IOPATH SCK SI (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(COND CSNeg && ~deg_sin (IOPATH CSNeg SI () () (5:6:7) () (5:6:7) ()))
|
||||
(COND ~quad_read && dual_read (IOPATH HOLDNeg SI () () (8:10:12) (5:6:7) (8:10:12) (5:6:7)))
|
||||
(COND quad_read && ~read_id (IOPATH SCK WPNeg (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND quad_read && read_id (IOPATH SCK WPNeg (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(COND quad_read && ~read_id (IOPATH SCK HOLDNeg (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND quad_read && read_id (IOPATH SCK HOLDNeg (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(COND CSNeg && QE (IOPATH CSNeg SI () () (5:6:7) () (5:6:7) ()))
|
||||
(COND CSNeg && QE (IOPATH CSNeg WPNeg () () (5:6:7) () (5:6:7) ()))
|
||||
(COND CSNeg && QE (IOPATH CSNeg HOLDNeg () () (5:6:7) () (5:6:7) ()))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (posedge SCK) (5))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (2))
|
||||
(SETUP SO (COND quad_pg(posedge SCK)) (2))
|
||||
(SETUP WPNeg (COND quad_pg(posedge SCK)) (2))
|
||||
(SETUP HOLDNeg (COND quad_pg(posedge SCK)) (2))
|
||||
(SETUP HOLDNeg (COND hold_cond(posedge SCK)) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (5))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (5))
|
||||
(HOLD SO (COND quad_pg (posedge SCK)) (5))
|
||||
(HOLD WPNeg (COND quad_pg (posedge SCK)) (5))
|
||||
(HOLD HOLDNeg (COND quad_pg (posedge SCK)) (5))
|
||||
(HOLD HOLDNeg (COND hold_cond(posedge SCK)) (5))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
|
||||
(WIDTH (COND rd_slow (posedge SCK)) (8))
|
||||
(WIDTH (COND rd_slow (negedge SCK)) (8))
|
||||
(WIDTH (COND rd_fast (posedge SCK)) (4))
|
||||
(WIDTH (COND rd_fast (negedge SCK)) (4))
|
||||
(WIDTH (COND quad_spi (posedge SCK)) (6))
|
||||
(WIDTH (COND quad_spi (negedge SCK)) (6))
|
||||
(WIDTH (COND any_read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pg_ers (posedge CSNeg)) (50))
|
||||
(PERIOD (COND rd_slow SCK) (16))
|
||||
(PERIOD (COND rd_fast SCK) (8))
|
||||
(PERIOD (COND quad_spi SCK) (12))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,81 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl128k Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 10 Oct 05 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl128k
|
||||
<FMFTIME>
|
||||
S25FL128KOXMFI000<SOURCE> Spansion, S25FL128K, JULY 22,2010 </SOURCE>
|
||||
S25FL128KOXMFI001<SOURCE> Spansion, S25FL128K, JULY 22,2010 </SOURCE>
|
||||
S25FL128KOXMFI003<SOURCE> Spansion, S25FL128K, JULY 22,2010 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY(ABSOLUTE
|
||||
(COND RDID == 0 (IOPATH SCK SO (5:6:7) (5:6:7) () (5:6:7) () (5:6:7)))
|
||||
(COND RDID == 1 (IOPATH SCK SO (5.5:7:8.5) (5.5:7:8.5) () (5.5:7:8.5) () (5.5:7:8.5)))
|
||||
(IOPATH CSNeg SO () () (5:6:7) () (5:6:7) ())
|
||||
(IOPATH HOLDNeg SO () () (8:10:12) (5:6:7) (8:10:12) (5:6:7))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg SCK (5))
|
||||
(SETUP (COND normal SI) (posedge SCK) (2))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
|
||||
(HOLD CSNeg SCK (5))
|
||||
(HOLD (COND normal SI) (posedge SCK) (5))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
|
||||
(WIDTH (COND slow (posedge SCK)) (8))
|
||||
(WIDTH (COND slow (negedge SCK)) (8))
|
||||
(WIDTH (COND fast (posedge SCK)) (4))
|
||||
(WIDTH (COND fast (negedge SCK)) (4))
|
||||
(WIDTH (COND quad (posedge SCK)) (6))
|
||||
(WIDTH (COND quad (negedge SCK)) (6))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pger (posedge CSNeg)) (50))
|
||||
(PERIOD (COND slow SCK) (16))
|
||||
(PERIOD (COND fast SCK) (8))
|
||||
(PERIOD (COND quad SCK) (12))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(400000:700000:3000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP1) (DELAY (ABSOLUTE (DEVICE(15000:30000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP2) (DELAY (ABSOLUTE (DEVICE(1000:2500:12000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(10000000:30000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE1) (DELAY (ABSOLUTE (DEVICE(5e7:12e7:8e8) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE2) (DELAY (ABSOLUTE (DEVICE(5e7:15e7:1e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/CE) (DELAY (ABSOLUTE (DEVICE(15e9:25e9:40e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(10000:10000:10000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/DP) (DELAY (ABSOLUTE (DEVICE(3000:3000:3000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES1) (DELAY (ABSOLUTE (DEVICE(3000:3000:3000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/RES2) (DELAY (ABSOLUTE (DEVICE(1800:1800:1800) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGRES) (DELAY (ABSOLUTE (DEVICE(200:200:200) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSRES) (DELAY (ABSOLUTE (DEVICE(200:200:200) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(15000000:15000000:15000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SUSP_DLY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,10 @@
|
||||
SET sdffile_suffix .sdf
|
||||
SET use_global_timing_dir false
|
||||
SET timingfile_dir /user/USERNAME/CreateSDF
|
||||
SET timingfile_suffix .ftm
|
||||
SET time_scale 1ns
|
||||
SET local_path .
|
||||
SET vendor MODELSIM_HOME
|
||||
SET diagnostics on
|
||||
SET vhdl_file testbench.vhd
|
||||
SET lwb false
|
||||
@@ -0,0 +1,462 @@
|
||||
#!/usr/local/bin/perl
|
||||
#
|
||||
# mk_sdf : Perl replacement for C mk_sdf
|
||||
#
|
||||
# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# Author : R. Munden
|
||||
# Date : 20001115
|
||||
# Version : 2.0.4
|
||||
#
|
||||
# Revision history:
|
||||
# 2.0: 19990702
|
||||
# o Intial release of perl version
|
||||
# 2.0.1: 19990722
|
||||
# o fixed problem with . in path for TimingModels
|
||||
# 2.0.2: 20000616
|
||||
# o changed instance search to work with Mentor
|
||||
# 2.0.3: 20001115
|
||||
# o changed to parse ":" without leading space
|
||||
# o fixed problem with . in path for TimingModels again
|
||||
# 2.0.4: 20030405
|
||||
# o chaged SDF version to 3.0
|
||||
#
|
||||
#################################################################
|
||||
#
|
||||
# command line arguments:
|
||||
|
||||
# ARGV[0] - name of VHDL netlist
|
||||
|
||||
# global variables:
|
||||
|
||||
# %component_list - list of instance names by component name
|
||||
# %instance_isin - list architectures by instances contained therein
|
||||
# %instance_comp - list of component names by instance name
|
||||
# %comp_lib - library each component (by name) is configured to
|
||||
# @instance_list - array of all instance names in design in order found
|
||||
|
||||
$version = "2.0.4";
|
||||
$design_name = '';
|
||||
$timing_dir = '';
|
||||
$diags = "off";
|
||||
|
||||
%keywords = (architecture => 1,
|
||||
component => 1,
|
||||
timingmodel => 1);
|
||||
|
||||
# INPUT files
|
||||
$CMD = "mk_sdf.cmd";
|
||||
$VHD = ''; # name of VHDL netlist
|
||||
|
||||
# OUTPUT files
|
||||
$RFV = "/tmp/short.vhd"; # reformatted VHDL
|
||||
$sdf_file = ''; # name of SDF file
|
||||
|
||||
&read_cmd_file;
|
||||
&get_names;
|
||||
&reformat;
|
||||
|
||||
open INPUT, $RFV;
|
||||
@lines = <INPUT>;
|
||||
close INPUT;
|
||||
|
||||
$current_architecture = "";
|
||||
|
||||
foreach $line (@lines)
|
||||
{
|
||||
@words = split / /, $line;
|
||||
foreach $word (@words)
|
||||
{
|
||||
$keywords{$word} == "1" and do { &$word(@words);};
|
||||
if ($component_list{$word})
|
||||
{
|
||||
$line =~ /(.+) : $word/ and do {
|
||||
if ($1 !~ /for/) { # instantiation found
|
||||
$component_list{$word} = $component_list{$word} . $1;
|
||||
push (@instance_list, $1);
|
||||
$instance_name = $1;
|
||||
}
|
||||
};
|
||||
$instance_comp{$1} = $word;
|
||||
$instance_isin{$1} = $current_architecture;
|
||||
if ( $diags ne off ) {
|
||||
print "reading instance $instance_name: $word in $current_architecture\n";
|
||||
}
|
||||
$line =~ /for all : $word use entity (.+)/ and do
|
||||
{
|
||||
@config = split(/\./, $1);
|
||||
$comp_lib{$word} = $config[0];};
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "finished with netlist\n\n";
|
||||
}
|
||||
|
||||
&begin_sdf;
|
||||
&build_paths;
|
||||
&close_sdf;
|
||||
`rm $RFV`;
|
||||
|
||||
print "$time\n";
|
||||
|
||||
sub architecture
|
||||
{
|
||||
$current_architecture = $_[3];
|
||||
push (@architectures, $current_architecture);
|
||||
}
|
||||
|
||||
sub component
|
||||
{
|
||||
if ($_[0] ne "end")
|
||||
{
|
||||
$name = $_[1];
|
||||
$arch_list{$current_architecture} =
|
||||
$arch_list{$current_architecture} . " " . $name;
|
||||
unless ($component_list{$name}) { $component_list{$name} = " ";}
|
||||
}
|
||||
}
|
||||
|
||||
sub timingmodel
|
||||
{
|
||||
$line =~ /timingmodel => \"(.+)\"/ and do {
|
||||
$model = $1;
|
||||
$model_name{$instance_name} = $model;
|
||||
};
|
||||
}
|
||||
|
||||
sub begin_sdf
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "writing SDF boilerplate\n";
|
||||
}
|
||||
$time = localtime;
|
||||
if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
|
||||
print "Opening $sdf_file\n";
|
||||
print SDF "(DELAYFILE\n";
|
||||
print SDF " (SDFVERSION \"3.0\")\n";
|
||||
print SDF " (DESIGN \"$design_name\")\n";
|
||||
print SDF " (DATE \"$time\")\n";
|
||||
print SDF " (VENDOR \"Free Model Foundry\")\n";
|
||||
print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
|
||||
print SDF " (VERSION \"$version\")\n";
|
||||
print SDF " (DIVIDER /)\n";
|
||||
print SDF " (VOLTAGE)\n";
|
||||
print SDF " (PROCESS)\n";
|
||||
print SDF " (TEMPERATURE)\n";
|
||||
print SDF " (TIMESCALE 1ns)\n";
|
||||
}
|
||||
|
||||
sub build_paths
|
||||
{
|
||||
foreach $instance_list (@instance_list)
|
||||
{
|
||||
@instance = $instance_list;
|
||||
foreach $instance (@instance)
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "working on $instance\n";
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
|
||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
|
||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,438 @@
|
||||
##########################################
|
||||
Date (DD/MM/YYYY) - 11.11.2009
|
||||
|
||||
Model name - S25FL128S
|
||||
|
||||
Vendor - Spansion (www.spansion.com)
|
||||
|
||||
Publication ID - S25FL128 256 512 01GS MRS Rev0 98
|
||||
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Hana Dimitrijevic
|
||||
h-dimitrijevic@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
INITIAL RELEASE
|
||||
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2009-11-11-3.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 11/11/2009
|
||||
# Release Version => 1.0
|
||||
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Hana Dimitrijevic
|
||||
h-dimitrijevic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2009-11-12-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 12/11/2009
|
||||
# Release Version => 1.1
|
||||
|
||||
# Correction of s25fl128s.v file :
|
||||
# State transition from Program Suspend to Autoboot state when
|
||||
# RESET command is initiated, is delayed with additional 500 ps.
|
||||
# (For compatibility with Modelsim 6.4b Version)
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2009-11-20-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 20/11/2009
|
||||
# Release Version => 1.2
|
||||
|
||||
# Corrections:
|
||||
# 1.Negative tests which show how model behaves when reset pulse
|
||||
# width is less than specified and when write and erase operations are interrupted .
|
||||
# with reset signal are interrupted with reset signal are added.
|
||||
# 2.Implementation of Continuous Read Mode
|
||||
# 3.After 8 clock cycles for instruction, first address bit is latched on the next
|
||||
# rising edge of clock.
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl128s.ftm
|
||||
-s25fl128s_vhdl.sdf
|
||||
-s25fl128s.v
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-s25fl128s.ftmv
|
||||
-s25fl128s_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2009-11-23-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 23/11/2009
|
||||
# Release Version => 1.3
|
||||
|
||||
# Corrections:
|
||||
# 1.Correction of Bulk Erase Time
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-02-24-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 24/02/2010
|
||||
# Release Version => 1.4
|
||||
|
||||
# Corrections:
|
||||
# 1.Array variable WByte in sensitivity list is replaced with signal WB_flag to enable
|
||||
# compilation in NCSim
|
||||
# 2.addr_cnt for second read in high performance read continuous mode can change its
|
||||
# value only when CSNeg = '0'
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-04-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/04/2010
|
||||
# Release Version => 1.5
|
||||
|
||||
# Corrections:
|
||||
# 1.HOLD mode corrected
|
||||
# 2.Condition for PP operation corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-05-19-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 19/05/2010
|
||||
# Release Version => 1.6
|
||||
|
||||
# Corrections:
|
||||
# 1.SRWD bit assignment is corrected
|
||||
# 2.Condition for WRR command in write_cycle_decode section is corrected
|
||||
# 3.Blocking assignments for signals WSTART and PSTART are replaced with
|
||||
# nonblocking assignments
|
||||
# 4.Conditions in Page Program section are fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-05-26-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 26/05/2010
|
||||
# Release Version => 1.7
|
||||
|
||||
# Corrections:
|
||||
# 1. Timing control sections for Program and Erase operation are changed
|
||||
# 2. Conditions in Page Program section are fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-06-03-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 03/06/2010
|
||||
# Release Version => 1.8
|
||||
|
||||
# Corrections:
|
||||
# 1. bus_cycle_state section for PGSP command is fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-07-29-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 29/07/2010
|
||||
# Release Version => 1.9
|
||||
|
||||
# Corrections:
|
||||
# 1. During the QUAD mode HOLD# input is not monitored for its normal function
|
||||
# 2. Internal pull-up resistors for HOLD# and WP# inputs are implemented
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-08-24-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 24/08/2010
|
||||
# Release Version => 2.0
|
||||
|
||||
# Corrections:
|
||||
# 1. All redundant signals are removed from BusCycle process
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-10-19-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 19/10/2010
|
||||
# Release Version => 2.1
|
||||
|
||||
# Corrections:
|
||||
# 1. Path delay correction: path delay is longer than clock cycle.
|
||||
# 2. Write bank register: WIP bit of status register 1 is not affected by this
|
||||
# instruction.
|
||||
# 3. All other functionality is updated according to new datasheet version 1.5
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-s25fl128s.ftmv
|
||||
-s25fl128s_verilog.sdf
|
||||
-spansion_tc_pkg.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-10-21-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 21/10/2010
|
||||
# Release Version => 2.2
|
||||
|
||||
# Corrections:
|
||||
# 1. VHDL model, which is alligned with datasheet version 1.5, added to the release
|
||||
# 2. Names of documentation files are updated
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-s25fl128s.ftm
|
||||
-s25fl128s_vhdl.sdf
|
||||
-spansion_flash_testbench_struct.pdf
|
||||
-spansion_flash_test_cases_list.pdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-11-05-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 05/11/2010
|
||||
# Release Version => 2.3
|
||||
|
||||
# Corrections:
|
||||
# 1. Hybrid configuration added
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl128s.ftmv
|
||||
-s25fl128s.ftm
|
||||
-s25fl128s_verilog.sdf
|
||||
-s25fl128s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2010-11-12-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 12/11/2010
|
||||
# Release Version => 2.4
|
||||
|
||||
# Corrections:
|
||||
# 1. QUAD Program operation during Erase Suspend is added
|
||||
# 2. Warning for Resume to Suspend time is added
|
||||
# 3. During Erase Suspend, after Program operation is completed, WEL bit is cleared
|
||||
# 4. Implemetation of Software Reset is Changed
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2011-04-08-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 08/04/2011
|
||||
# Release Version => 2.5
|
||||
|
||||
# Corrections:
|
||||
- corrected timing for internal signal rising_edge_CSNeg_ipd
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2011-05-11-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 11/05/2011
|
||||
# Release Version => 2.6
|
||||
|
||||
# Corrections:
|
||||
- Condition for CS# High Time(Program/Erase) is fixed
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl128s.v
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-s25fl128s.ftmv
|
||||
-s25fl128s_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2011-07-01-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 01/07/2011
|
||||
# Release Version => 2.7
|
||||
|
||||
# Corrections:
|
||||
- Latest Datasheet Aligned
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl128s.ftmv
|
||||
-s25fl128s.ftm
|
||||
-s25fl128s_verilog.sdf
|
||||
-s25fl128s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2011-07-14-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 14/07/2011
|
||||
# Release Version => 2.8
|
||||
|
||||
# Corrections:
|
||||
- Optimization issue is fixed
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2011-07-22-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 22/07/2011
|
||||
# Release Version => 2.9
|
||||
|
||||
# Corrections:
|
||||
- Timing check issue is fixed
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2011-11-16-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 16/11/2011
|
||||
# Release Version => 3.0
|
||||
|
||||
# Corrections:
|
||||
- Time tHO is changed to 1 ns (customer's request)
|
||||
- Setting of Device protection mode is modified (customer's request)
|
||||
- BRWR instruction is corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-s25fl128s.ftmv
|
||||
-s25fl128s.ftm
|
||||
-s25fl128s_verilog.sdf
|
||||
-s25fl128s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2012-08-28-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 28/08/2012
|
||||
# Release Version => 3.1
|
||||
|
||||
# Corrections:
|
||||
- QPP instruction is allowed on previously programmed page
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
-s25fl128s.vhd
|
||||
-testbench_s25fl128s_verilog.vhd
|
||||
-testbench_s25fl128s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl128s-2012-08-30-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 30/08/2012
|
||||
# Release Version => 3.2
|
||||
|
||||
# Corrections:
|
||||
- Wrong code corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl128s.v
|
||||
##########################################
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,726 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl128s Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 09 Nov 19 Initial release
|
||||
V1.1 V.Mancev 10 Oct 07 Latest datasheet aligned
|
||||
V1.2 V.Mancev 11 May 11 CS# High Time modifications
|
||||
V1.3 V.Mancev 11 June 27 Latest datasheet aligned
|
||||
V1.4 V.Mancev 11 Nov 16 Time tHO is changed to 1 ns
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl128s
|
||||
<FMFTIME>
|
||||
S25FL128SAGMFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VIO=VCC=2.7V to 3.6V, CL=30pF </COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SAGMFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF </COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SAGMFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SDPMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for Vcc range VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (5))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (4))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SDPMFIR00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR01_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR11_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI000_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI001_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI003_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI010_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI011_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI013_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI200_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI203_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI210_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI213_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI300_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI303_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI310_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI313_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for Vcc range VCC=2.7V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (5))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (4))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,783 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl128s Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 V.Mancev 09 Nov 26 Initial release
|
||||
V1.1 V. Mancev 10 Oct 21 New datasheet aligned
|
||||
R. Prokopovic
|
||||
V1.2 V.Mancev 11 June 27 Latest datasheet aligned
|
||||
V1.3 V.Mancev 11 Nov 16 Time tHO is changed to 1 ns
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl128s
|
||||
<FMFTIME>
|
||||
S25FL128SAGMFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:110e9:165e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SAGMFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:110e9:165e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SAGMFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFIR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGMFVR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGNFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHI313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHID13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHV313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHVD13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIY13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIZ13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIS13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIT13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIK13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SAGBHIL13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:110e9:165e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SDPMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (10:12:14) (10:12:14) (10:12:14) (10:12:14))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (4))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:110e9:165e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL128SDPMFIR00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR01_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR11_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPMFIR13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI000_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI001_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI003_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI010_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI011_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPNFI013_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI200_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI203_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI210_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI213_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI300_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI303_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI310_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHI313_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHIC13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL128SDPBHID13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (10:12:14) (10:12:14) (10:12:14) (10:12:14))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (4))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:110e9:165e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,10 @@
|
||||
SET sdffile_suffix .sdf
|
||||
SET use_global_timing_dir false
|
||||
SET timingfile_dir /user/USERNAME/CreateSDF
|
||||
SET timingfile_suffix .ftm
|
||||
SET time_scale 1ns
|
||||
SET local_path .
|
||||
SET vendor MODELSIM_HOME
|
||||
SET diagnostics on
|
||||
SET vhdl_file testbench.vhd
|
||||
SET lwb false
|
||||
@@ -0,0 +1,462 @@
|
||||
#!/usr/local/bin/perl
|
||||
#
|
||||
# mk_sdf : Perl replacement for C mk_sdf
|
||||
#
|
||||
# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# Author : R. Munden
|
||||
# Date : 20001115
|
||||
# Version : 2.0.4
|
||||
#
|
||||
# Revision history:
|
||||
# 2.0: 19990702
|
||||
# o Intial release of perl version
|
||||
# 2.0.1: 19990722
|
||||
# o fixed problem with . in path for TimingModels
|
||||
# 2.0.2: 20000616
|
||||
# o changed instance search to work with Mentor
|
||||
# 2.0.3: 20001115
|
||||
# o changed to parse ":" without leading space
|
||||
# o fixed problem with . in path for TimingModels again
|
||||
# 2.0.4: 20030405
|
||||
# o chaged SDF version to 3.0
|
||||
#
|
||||
#################################################################
|
||||
#
|
||||
# command line arguments:
|
||||
|
||||
# ARGV[0] - name of VHDL netlist
|
||||
|
||||
# global variables:
|
||||
|
||||
# %component_list - list of instance names by component name
|
||||
# %instance_isin - list architectures by instances contained therein
|
||||
# %instance_comp - list of component names by instance name
|
||||
# %comp_lib - library each component (by name) is configured to
|
||||
# @instance_list - array of all instance names in design in order found
|
||||
|
||||
$version = "2.0.4";
|
||||
$design_name = '';
|
||||
$timing_dir = '';
|
||||
$diags = "off";
|
||||
|
||||
%keywords = (architecture => 1,
|
||||
component => 1,
|
||||
timingmodel => 1);
|
||||
|
||||
# INPUT files
|
||||
$CMD = "mk_sdf.cmd";
|
||||
$VHD = ''; # name of VHDL netlist
|
||||
|
||||
# OUTPUT files
|
||||
$RFV = "/tmp/short.vhd"; # reformatted VHDL
|
||||
$sdf_file = ''; # name of SDF file
|
||||
|
||||
&read_cmd_file;
|
||||
&get_names;
|
||||
&reformat;
|
||||
|
||||
open INPUT, $RFV;
|
||||
@lines = <INPUT>;
|
||||
close INPUT;
|
||||
|
||||
$current_architecture = "";
|
||||
|
||||
foreach $line (@lines)
|
||||
{
|
||||
@words = split / /, $line;
|
||||
foreach $word (@words)
|
||||
{
|
||||
$keywords{$word} == "1" and do { &$word(@words);};
|
||||
if ($component_list{$word})
|
||||
{
|
||||
$line =~ /(.+) : $word/ and do {
|
||||
if ($1 !~ /for/) { # instantiation found
|
||||
$component_list{$word} = $component_list{$word} . $1;
|
||||
push (@instance_list, $1);
|
||||
$instance_name = $1;
|
||||
}
|
||||
};
|
||||
$instance_comp{$1} = $word;
|
||||
$instance_isin{$1} = $current_architecture;
|
||||
if ( $diags ne off ) {
|
||||
print "reading instance $instance_name: $word in $current_architecture\n";
|
||||
}
|
||||
$line =~ /for all : $word use entity (.+)/ and do
|
||||
{
|
||||
@config = split(/\./, $1);
|
||||
$comp_lib{$word} = $config[0];};
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "finished with netlist\n\n";
|
||||
}
|
||||
|
||||
&begin_sdf;
|
||||
&build_paths;
|
||||
&close_sdf;
|
||||
`rm $RFV`;
|
||||
|
||||
print "$time\n";
|
||||
|
||||
sub architecture
|
||||
{
|
||||
$current_architecture = $_[3];
|
||||
push (@architectures, $current_architecture);
|
||||
}
|
||||
|
||||
sub component
|
||||
{
|
||||
if ($_[0] ne "end")
|
||||
{
|
||||
$name = $_[1];
|
||||
$arch_list{$current_architecture} =
|
||||
$arch_list{$current_architecture} . " " . $name;
|
||||
unless ($component_list{$name}) { $component_list{$name} = " ";}
|
||||
}
|
||||
}
|
||||
|
||||
sub timingmodel
|
||||
{
|
||||
$line =~ /timingmodel => \"(.+)\"/ and do {
|
||||
$model = $1;
|
||||
$model_name{$instance_name} = $model;
|
||||
};
|
||||
}
|
||||
|
||||
sub begin_sdf
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "writing SDF boilerplate\n";
|
||||
}
|
||||
$time = localtime;
|
||||
if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
|
||||
print "Opening $sdf_file\n";
|
||||
print SDF "(DELAYFILE\n";
|
||||
print SDF " (SDFVERSION \"3.0\")\n";
|
||||
print SDF " (DESIGN \"$design_name\")\n";
|
||||
print SDF " (DATE \"$time\")\n";
|
||||
print SDF " (VENDOR \"Free Model Foundry\")\n";
|
||||
print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
|
||||
print SDF " (VERSION \"$version\")\n";
|
||||
print SDF " (DIVIDER /)\n";
|
||||
print SDF " (VOLTAGE)\n";
|
||||
print SDF " (PROCESS)\n";
|
||||
print SDF " (TEMPERATURE)\n";
|
||||
print SDF " (TIMESCALE 1ns)\n";
|
||||
}
|
||||
|
||||
sub build_paths
|
||||
{
|
||||
foreach $instance_list (@instance_list)
|
||||
{
|
||||
@instance = $instance_list;
|
||||
foreach $instance (@instance)
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "working on $instance\n";
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
|
||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
|
||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,350 @@
|
||||
##########################################
|
||||
Date (DD/MM/YYYY) - 16.11.2009
|
||||
|
||||
Model name - S25FL256S
|
||||
|
||||
Vendor - Spansion (www.spansion.com)
|
||||
|
||||
Publication ID - S25FL128 256 512 01GS MRS Rev0 98
|
||||
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
INITIAL RELEASE
|
||||
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2009-11-16-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 16/11/2009
|
||||
# Release Version => 1.0
|
||||
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2009-11-19-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 19/11/2009
|
||||
# Release Version => 1.1
|
||||
|
||||
# Corrections:
|
||||
# 1.Negative tests which show how model behaves when reset pulse
|
||||
# width is less than specified and when write and erase operations are interrupted .
|
||||
# with reset signal are interrupted with reset signal are added.
|
||||
# 2.Implementation of Continuous Read Mode
|
||||
# 3.After 8 clock cycles for instruction, first address bit is latched on the next
|
||||
# rising edge of clock.
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.vhd
|
||||
-testbench_s25fl256s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl256s.ftm
|
||||
-s25fl256s_vhdl.sdf
|
||||
-s25fl256s.v
|
||||
-testbench_s25fl256s_verilog.vhd
|
||||
-s25fl256s.ftmv
|
||||
-s25fl256s_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-03-04-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 04/03/2010
|
||||
# Release Version => 1.2
|
||||
|
||||
# Corrections:
|
||||
# 1.Array variable WByte in sensitivity list is replaced with signal WB_flag to enable
|
||||
# compilation in NCSim
|
||||
# 2.addr_cnt for second read in high performance read continuous mode can change its
|
||||
# value only when CSNeg = '0'
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-04-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/04/2010
|
||||
# Release Version => 1.3
|
||||
|
||||
# Corrections:
|
||||
# 1.HOLD mode corrected
|
||||
# 2.Condition for PP operation corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-05-21-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 21/05/2010
|
||||
# Release Version => 1.4
|
||||
|
||||
# Corrections:
|
||||
# 1.SRWD bit assignment is corrected
|
||||
# 2.Condition for WRR command in write_cycle_decode section is corrected
|
||||
# 3.Blocking assignments for signals WSTART and PSTART are replaced with
|
||||
# nonblocking assignments
|
||||
# 4.Conditions in Page Program section are fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-05-25-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 25/05/2010
|
||||
# Release Version => 1.5
|
||||
|
||||
# Corrections:
|
||||
# 1. Timing control sections for Program and Erase operation are changed
|
||||
# 2. Conditions in Page Program section are fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-06-03-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 03/06/2010
|
||||
# Release Version => 1.6
|
||||
|
||||
# Corrections:
|
||||
# 1. bus_cycle_state section for PGSP command is fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-07-28-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 28/07/2010
|
||||
# Release Version => 1.7
|
||||
|
||||
# Corrections:
|
||||
# 1. During the QUAD mode HOLD# input is not monitored for its normal function
|
||||
# 2. Internal pull-up resistors for HOLD# and WP# inputs are implemented
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-08-24-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 24/08/2010
|
||||
# Release Version => 1.8
|
||||
|
||||
# Corrections:
|
||||
# 1. All redundant signals are removed from BusCycle process
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-10-14-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 14/10/2010
|
||||
# Release Version => 1.9
|
||||
|
||||
# Corrections:
|
||||
# 1. Latest datasheet aligned (VERILOG files only)
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl256s.v
|
||||
-testbench_s25fl256s_verilog.vhd
|
||||
-s25fl256s.ftmv
|
||||
-s25fl256s_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-10-20-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 20/10/2010
|
||||
# Release Version => 2.0
|
||||
|
||||
# Corrections:
|
||||
# 1. Latest datasheet aligned (VHDL files added)
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.vhd
|
||||
-testbench_s25fl256s_vhdl.vhd
|
||||
-s25fl256s.ftm
|
||||
-s25fl256s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-11-05-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 05/11/2010
|
||||
# Release Version => 2.1
|
||||
|
||||
# Corrections:
|
||||
# 1. Hybrid configuration added
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl256s.v
|
||||
-testbench_s25fl256s_verilog.vhd
|
||||
-s25fl256s.vhd
|
||||
-testbench_s25fl256s_vhdl.vhd
|
||||
-s25fl256s.ftm
|
||||
-s25fl256s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2010-11-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/11/2010
|
||||
# Release Version => 2.2
|
||||
|
||||
# Corrections:
|
||||
# 1. QUAD Program operation during Erase Suspend is added
|
||||
# 2. Warning for Resume to Suspend time is added
|
||||
# 3. During Erase Suspend, after Program operation is completed, WEL bit is cleared
|
||||
# 4. Implementation of Software Reset is Changed
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2011-04-18-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 18/04/2011
|
||||
# Release Version => 2.3
|
||||
|
||||
# Corrections:
|
||||
- corrected timing for internal signal rising_edge_CSNeg_ipd
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2011-07-05-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 05/07/2011
|
||||
# Release Version => 2.4
|
||||
|
||||
# Corrections:
|
||||
- Latest Datasheet Aligned
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
-testbench_s25fl256s_verilog.vhd
|
||||
-testbench_s25fl256s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl256s.ftmv
|
||||
-s25fl256s.ftm
|
||||
-s25fl256s_verilog.sdf
|
||||
-s25fl256s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2011-07-14-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 14/07/2011
|
||||
# Release Version => 2.5
|
||||
|
||||
# Corrections:
|
||||
- Optimization issue is fixed
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2011-07-19-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 19/07/2011
|
||||
# Release Version => 2.6
|
||||
|
||||
# Corrections:
|
||||
- Timing check issue is fixed
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2011-11-18-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 18/11/2011
|
||||
# Release Version => 2.7
|
||||
|
||||
# Corrections:
|
||||
- Time tHO is changed to 1 ns (customer's request)
|
||||
- Setting of Device protection mode is modified (customer's request)
|
||||
- BRWR instruction is corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
-testbench_s25fl256s_verilog.vhd
|
||||
-testbench_s25fl256s_vhdl.vhd
|
||||
-s25fl256s.ftmv
|
||||
-s25fl256s.ftm
|
||||
-s25fl256s_verilog.sdf
|
||||
-s25fl256s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl256s-2012-08-28-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 28/08/2012
|
||||
# Release Version => 2.8
|
||||
|
||||
# Corrections:
|
||||
- QPP Instruction allowed on previosly programmed page
|
||||
|
||||
# Files modified
|
||||
-s25fl256s.v
|
||||
-s25fl256s.vhd
|
||||
-testbench_s25fl256s_verilog.vhd
|
||||
-testbench_s25fl256s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,725 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl256s Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 09 Nov 27 Initial release
|
||||
V1.1 V.Mancev 10 Oct 20 Latest datasheet aligned
|
||||
V1.2 B.Colakovic 11 June 29 Latest datasheet aligned
|
||||
V1.3 V.Mancev 11 Nov 17 Time tHO is changed to 1 ns
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl256s
|
||||
<FMFTIME>
|
||||
S25FL256SAGMFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VIO=VCC=2.7V to 3.6V, CL=30pF </COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SAGMFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF </COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SAGMFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SDPMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for Vcc range VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (5))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (4))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SDPMFIR00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR01_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR11_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI000_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI001_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI003_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI010_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI011_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI013_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI200_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI203_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI210_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI213_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI300_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI303_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI310_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI313_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for Vcc range VCC=2.7V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (5))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (4))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,781 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl256s Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 V.Mancev 09 Nov 26 Initial release
|
||||
V1.1 V.Mancev 11 July 04 Latest datasheet aligned
|
||||
V1.2 V.Mancev 11 Nov 17 Time tHO is changed to 1 ns
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl256s
|
||||
<FMFTIME>
|
||||
S25FL256SAGMFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(33e9:66e9:330e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SAGMFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR01_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV000_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV001_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV003_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV200_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV203_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV300_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV303_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL00_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL03_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(33e9:66e9:330e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SAGMFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFIR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR01_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGMFVR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV000_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV001_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV003_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGNFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHI313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHID13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV200_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV203_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV300_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV303_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHV313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHVD13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIY13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIZ13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIS13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIT13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIK13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL00_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL03_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SAGBHIL13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(33e9:66e9:330e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SDPMFIR00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR01_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI000_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI001_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI003_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI200_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI203_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI300_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI303_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID00_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID03_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (10:12:14) (10:12:14) (10:12:14) (10:12:14))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (4))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(33e9:66e9:330e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL256SDPMFIR00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR01_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR11_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPMFIR13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI000_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI001_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI003_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI010_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI011_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPNFI013_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI200_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI203_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI210_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI213_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI300_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI303_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI310_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHI313_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHIC13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID00_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID03_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL256SDPBHID13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (10:12:14) (10:12:14) (10:12:14) (10:12:14))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (4))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP256) (DELAY (ABSOLUTE (DEVICE(183e3:366e3:550e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP512) (DELAY (ABSOLUTE (DEVICE(250e3:500e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(133e3:266e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE64) (DELAY (ABSOLUTE (DEVICE(217e6:434e6:650e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE256) (DELAY (ABSOLUTE (DEVICE(625e6:1250e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(33e9:66e9:330e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,10 @@
|
||||
SET sdffile_suffix .sdf
|
||||
SET use_global_timing_dir false
|
||||
SET timingfile_dir /user/USERNAME/CreateSDF
|
||||
SET timingfile_suffix .ftm
|
||||
SET time_scale 1ns
|
||||
SET local_path .
|
||||
SET vendor MODELSIM_HOME
|
||||
SET diagnostics on
|
||||
SET vhdl_file testbench.vhd
|
||||
SET lwb false
|
||||
@@ -0,0 +1,462 @@
|
||||
#!/usr/local/bin/perl
|
||||
#
|
||||
# mk_sdf : Perl replacement for C mk_sdf
|
||||
#
|
||||
# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# Author : R. Munden
|
||||
# Date : 20001115
|
||||
# Version : 2.0.4
|
||||
#
|
||||
# Revision history:
|
||||
# 2.0: 19990702
|
||||
# o Intial release of perl version
|
||||
# 2.0.1: 19990722
|
||||
# o fixed problem with . in path for TimingModels
|
||||
# 2.0.2: 20000616
|
||||
# o changed instance search to work with Mentor
|
||||
# 2.0.3: 20001115
|
||||
# o changed to parse ":" without leading space
|
||||
# o fixed problem with . in path for TimingModels again
|
||||
# 2.0.4: 20030405
|
||||
# o chaged SDF version to 3.0
|
||||
#
|
||||
#################################################################
|
||||
#
|
||||
# command line arguments:
|
||||
|
||||
# ARGV[0] - name of VHDL netlist
|
||||
|
||||
# global variables:
|
||||
|
||||
# %component_list - list of instance names by component name
|
||||
# %instance_isin - list architectures by instances contained therein
|
||||
# %instance_comp - list of component names by instance name
|
||||
# %comp_lib - library each component (by name) is configured to
|
||||
# @instance_list - array of all instance names in design in order found
|
||||
|
||||
$version = "2.0.4";
|
||||
$design_name = '';
|
||||
$timing_dir = '';
|
||||
$diags = "off";
|
||||
|
||||
%keywords = (architecture => 1,
|
||||
component => 1,
|
||||
timingmodel => 1);
|
||||
|
||||
# INPUT files
|
||||
$CMD = "mk_sdf.cmd";
|
||||
$VHD = ''; # name of VHDL netlist
|
||||
|
||||
# OUTPUT files
|
||||
$RFV = "/tmp/short.vhd"; # reformatted VHDL
|
||||
$sdf_file = ''; # name of SDF file
|
||||
|
||||
&read_cmd_file;
|
||||
&get_names;
|
||||
&reformat;
|
||||
|
||||
open INPUT, $RFV;
|
||||
@lines = <INPUT>;
|
||||
close INPUT;
|
||||
|
||||
$current_architecture = "";
|
||||
|
||||
foreach $line (@lines)
|
||||
{
|
||||
@words = split / /, $line;
|
||||
foreach $word (@words)
|
||||
{
|
||||
$keywords{$word} == "1" and do { &$word(@words);};
|
||||
if ($component_list{$word})
|
||||
{
|
||||
$line =~ /(.+) : $word/ and do {
|
||||
if ($1 !~ /for/) { # instantiation found
|
||||
$component_list{$word} = $component_list{$word} . $1;
|
||||
push (@instance_list, $1);
|
||||
$instance_name = $1;
|
||||
}
|
||||
};
|
||||
$instance_comp{$1} = $word;
|
||||
$instance_isin{$1} = $current_architecture;
|
||||
if ( $diags ne off ) {
|
||||
print "reading instance $instance_name: $word in $current_architecture\n";
|
||||
}
|
||||
$line =~ /for all : $word use entity (.+)/ and do
|
||||
{
|
||||
@config = split(/\./, $1);
|
||||
$comp_lib{$word} = $config[0];};
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "finished with netlist\n\n";
|
||||
}
|
||||
|
||||
&begin_sdf;
|
||||
&build_paths;
|
||||
&close_sdf;
|
||||
`rm $RFV`;
|
||||
|
||||
print "$time\n";
|
||||
|
||||
sub architecture
|
||||
{
|
||||
$current_architecture = $_[3];
|
||||
push (@architectures, $current_architecture);
|
||||
}
|
||||
|
||||
sub component
|
||||
{
|
||||
if ($_[0] ne "end")
|
||||
{
|
||||
$name = $_[1];
|
||||
$arch_list{$current_architecture} =
|
||||
$arch_list{$current_architecture} . " " . $name;
|
||||
unless ($component_list{$name}) { $component_list{$name} = " ";}
|
||||
}
|
||||
}
|
||||
|
||||
sub timingmodel
|
||||
{
|
||||
$line =~ /timingmodel => \"(.+)\"/ and do {
|
||||
$model = $1;
|
||||
$model_name{$instance_name} = $model;
|
||||
};
|
||||
}
|
||||
|
||||
sub begin_sdf
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "writing SDF boilerplate\n";
|
||||
}
|
||||
$time = localtime;
|
||||
if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
|
||||
print "Opening $sdf_file\n";
|
||||
print SDF "(DELAYFILE\n";
|
||||
print SDF " (SDFVERSION \"3.0\")\n";
|
||||
print SDF " (DESIGN \"$design_name\")\n";
|
||||
print SDF " (DATE \"$time\")\n";
|
||||
print SDF " (VENDOR \"Free Model Foundry\")\n";
|
||||
print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
|
||||
print SDF " (VERSION \"$version\")\n";
|
||||
print SDF " (DIVIDER /)\n";
|
||||
print SDF " (VOLTAGE)\n";
|
||||
print SDF " (PROCESS)\n";
|
||||
print SDF " (TEMPERATURE)\n";
|
||||
print SDF " (TIMESCALE 1ns)\n";
|
||||
}
|
||||
|
||||
sub build_paths
|
||||
{
|
||||
foreach $instance_list (@instance_list)
|
||||
{
|
||||
@instance = $instance_list;
|
||||
foreach $instance (@instance)
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "working on $instance\n";
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
|
||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
|
||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
Binary file not shown.
Binary file not shown.
@@ -0,0 +1,380 @@
|
||||
##########################################
|
||||
Date (DD/MM/YYYY) - 16.11.2009
|
||||
|
||||
Model name - S25FL256S
|
||||
|
||||
Vendor - Spansion (www.spansion.com)
|
||||
|
||||
Publication ID - S25FL128 256 512 01GS MRS Rev0 98
|
||||
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
##########################################
|
||||
INITIAL RELEASE
|
||||
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2009-11-16-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 16/11/2009
|
||||
# Release Version => 1.0
|
||||
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2009-11-19-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 19/11/2009
|
||||
# Release Version => 1.1
|
||||
|
||||
# Corrections:
|
||||
# 1.Negative tests which show how model behaves when reset pulse
|
||||
# width is less than specified and when write and erase operations are interrupted .
|
||||
# with reset signal are interrupted with reset signal are added.
|
||||
# 2.Implementation of Continuous Read Mode
|
||||
# 3.After 8 clock cycles for instruction, first address bit is latched on the next
|
||||
# rising edge of clock.
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl512s.ftm
|
||||
-s25fl512s_vhdl.sdf
|
||||
-s25fl512s.v
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
-s25fl512s.ftmv
|
||||
-s25fl512s_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-03-04-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 04/03/2010
|
||||
# Release Version => 1.2
|
||||
|
||||
# Corrections:
|
||||
# 1.Array variable WByte in sensitivity list is replaced with signal WB_flag to enable
|
||||
# compilation in NCSim
|
||||
# 2.addr_cnt for second read in high performance read continuous mode can change its
|
||||
# value only when CSNeg = '0'
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-04-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/04/2010
|
||||
# Release Version => 1.3
|
||||
|
||||
# Corrections:
|
||||
# 1.HOLD mode corrected
|
||||
# 2.Condition for PP operation corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-05-21-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 21/05/2010
|
||||
# Release Version => 1.4
|
||||
|
||||
# Corrections:
|
||||
# 1.SRWD bit assignment is corrected
|
||||
# 2.Condition for WRR command in write_cycle_decode section is corrected
|
||||
# 3.Blocking assignments for signals WSTART and PSTART are replaced with
|
||||
# nonblocking assignments
|
||||
# 4.Conditions in Page Program section are fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-05-25-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 25/05/2010
|
||||
# Release Version => 1.5
|
||||
|
||||
# Corrections:
|
||||
# 1. Timing control sections for Program and Erase operation are changed
|
||||
# 2. Conditions in Page Program section are fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-06-03-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 03/06/2010
|
||||
# Release Version => 1.6
|
||||
|
||||
# Corrections:
|
||||
# 1. bus_cycle_state section for PGSP command is fixed
|
||||
#
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-07-28-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 28/07/2010
|
||||
# Release Version => 1.7
|
||||
|
||||
# Corrections:
|
||||
# 1. During the QUAD mode HOLD# input is not monitored for its normal function
|
||||
# 2. Internal pull-up resistors for HOLD# and WP# inputs are implemented
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-08-24-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 24/08/2010
|
||||
# Release Version => 1.8
|
||||
|
||||
# Corrections:
|
||||
# 1. All redundant signals are removed from BusCycle process
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-10-14-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 14/10/2010
|
||||
# Release Version => 1.9
|
||||
|
||||
# Corrections:
|
||||
# 1. Latest datasheet aligned (VERILOG files only)
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl512s.v
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
-s25fl512s.ftmv
|
||||
-s25fl512s_verilog.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-10-20-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 20/10/2010
|
||||
# Release Version => 2.0
|
||||
|
||||
# Corrections:
|
||||
# 1. Latest datasheet aligned (VHDL files added)
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-s25fl512s.ftm
|
||||
-s25fl512s_vhdl.sdf
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-10-22-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 22/10/2010
|
||||
# Release Version => 2.1
|
||||
|
||||
# Corrections:
|
||||
# 1. Latest datasheet aligned (VHDL files added)
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-s25fl512s.ftm
|
||||
-s25fl512s_verilog.sdf
|
||||
-s25fl512s.v
|
||||
-s25fl512s.sv
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
-s25fl512s.ftmv
|
||||
-s25fl512s_vhdl.sdf
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-11-05-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 05/11/2010
|
||||
# Release Version => 2.2
|
||||
|
||||
# Corrections:
|
||||
# 1. Latest datasheet aligned
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-s25fl512s.v
|
||||
-s25fl512s.sv
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Ranko Prokopovic
|
||||
r-prokopovic@hdl-dh.com
|
||||
Hana Dimitrijevic
|
||||
h-dimitrijevic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2010-11-15-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/11/2010
|
||||
# Release Version => 2.3
|
||||
|
||||
# Corrections:
|
||||
# 1. QUAD Program operation during Erase Suspend is added
|
||||
# 2. Warning for Resume to Suspend time is added
|
||||
# 3. During Erase Suspend, after Program operation is completed, WEL bit is cleared
|
||||
# 4. Implementation of Software Reset is Changed
|
||||
# 5. ADDRHILO_PG procedure corrected
|
||||
|
||||
# Files modified
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2011-04-18-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 18/04/2011
|
||||
# Release Version => 2.4
|
||||
|
||||
# Corrections:
|
||||
- corrected timing for internal signal rising_edge_CSNeg_ipd
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.sv
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2011-07-11-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 11/07/2011
|
||||
# Release Version => 2.5
|
||||
|
||||
# Corrections:
|
||||
- Latest Datasheet Aligned
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
-s25fl512s.ftmv
|
||||
-s25fl512s.ftm
|
||||
-s25fl512s_verilog.sdf
|
||||
-s25fl512s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2011-07-15-2.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 15/07/2011
|
||||
# Release Version => 2.6
|
||||
|
||||
# Corrections:
|
||||
- Optimization issue is fixed
|
||||
- Timingmodel is corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.sv
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
Branislav Colakovic
|
||||
b-colakovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2011-07-22-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 22/07/2011
|
||||
# Release Version => 2.7
|
||||
|
||||
# Corrections:
|
||||
- Timing check issue is fixed
|
||||
- Correction for P4E and P4E4 instructions
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.sv
|
||||
-s25fl512s.vhd
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Vesna Mancev
|
||||
v-mancev@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2011-11-18-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 18/11/2011
|
||||
# Release Version => 2.8
|
||||
|
||||
# Corrections:
|
||||
- Time tHO is changed to 1 ns (customer's request)
|
||||
- Setting of Device protection mode is modified (customer's request)
|
||||
- BRWR instruction is corrected
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-s25fl512s.ftmv
|
||||
-s25fl512s.ftm
|
||||
-s25fl512s_verilog.sdf
|
||||
-s25fl512s_vhdl.sdf
|
||||
##########################################
|
||||
##########################################
|
||||
VITAL model author - Snezana Petrovic
|
||||
s-petrovic@hdl-dh.com
|
||||
##########################################
|
||||
# Release Label => vital-amd-serial-s25fl-REL-s25fl512s-2012-06-02-1.tar.gz
|
||||
# Release Date (DD/MM/YYYY) => 02/06/2012
|
||||
# Release Version => 2.9
|
||||
|
||||
# Corrections:
|
||||
- OPP instruction is allowed in previously programmed page
|
||||
|
||||
# Files modified
|
||||
-s25fl512s.v
|
||||
-s25fl512s.sv
|
||||
-s25fl512s.vhd
|
||||
-testbench_s25fl512s_verilog.vhd
|
||||
-testbench_s25fl512s_vhdl.vhd
|
||||
-spansion_tc_pkg.vhd
|
||||
|
||||
##########################################
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,511 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl512s Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 R. Prokopovic 09 Nov 27 Initial release
|
||||
V1.1 V.Mancev 10 Oct 20 Latest datasheet aligned
|
||||
V1.2 B.Colakovic 11 July 11 Latest datasheet aligned
|
||||
V1.3 V.Mancev 11 Nov 17 Time tHO is changed to 1 ns
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl512s
|
||||
<FMFTIME>
|
||||
S25FL512SAGMFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VIO=VCC=2.7V to 3.6V, CL=30pF </COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SAGMFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF </COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SAGMFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (3))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SDPMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for Vcc range VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (5))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (4))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SDPMFIR10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR11_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI210_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI213_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI310_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI313_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for Vcc range VCC=2.7V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND ~ddr (IOPATH SCK SO (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND (ddr || rd_fast) (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && dual (IOPATH SCK SI (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && dual (IOPATH SCK SI (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND ~ddr && QUAD (IOPATH SCK HOLDNeg (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && QUAD (IOPATH SCK HOLDNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(COND ~ddr && QUAD (IOPATH SCK WPNeg (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND ddr && QUAD (IOPATH SCK WPNeg (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
|
||||
(COND CSNeg (IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && dual (IOPATH CSNeg SI () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg HOLDNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
(COND CSNeg && QUAD (IOPATH CSNeg WPNeg () () (5.4:6.7:8) () (5.4:6.7:8) ()))
|
||||
|
||||
(COND ~QUAD (IOPATH HOLDNeg SO () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
(COND ~QUAD && dual (IOPATH HOLDNeg SI () () (7:10.5:14) (7:10.5:14) (7:10.5:14) (7:10.5:14)))
|
||||
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP CSNeg (COND sdr_rd SCK) (3))
|
||||
(SETUP CSNeg (COND ddr_rd SCK) (3))
|
||||
(SETUP SI (COND deg_sin(posedge SCK)) (5))
|
||||
(SETUP SI (COND ddro(posedge SCK)) (2))
|
||||
(SETUP SI (COND ddro(negedge SCK)) (2))
|
||||
(SETUP WPNeg (COND wr_prot(negedge CSNeg)) (20))
|
||||
(SETUP HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
|
||||
(HOLD CSNeg (COND sdr_rd SCK) (3))
|
||||
(HOLD CSNeg (COND ddr_rd SCK) (3))
|
||||
(HOLD SI (COND deg_sin (posedge SCK)) (4))
|
||||
(HOLD SI (COND ddro (posedge SCK)) (2))
|
||||
(HOLD SI (COND ddro (negedge SCK)) (2))
|
||||
(HOLD WPNeg (COND wr_prot (posedge CSNeg)) (100))
|
||||
(HOLD HOLDNeg (COND quad_rd (posedge SCK)) (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
|
||||
(WIDTH (COND rd (posedge SCK)) (10))
|
||||
(WIDTH (COND rd (negedge SCK)) (10))
|
||||
(WIDTH (COND dual_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast_rd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (posedge SCK)) (7.5))
|
||||
(WIDTH (COND ddrd (negedge SCK)) (7.5))
|
||||
(WIDTH (COND RD_EQU_1 (posedge CSNeg)) (10))
|
||||
(WIDTH (COND RD_EQU_0 (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND ddrd SCK) (15))
|
||||
)
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,547 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for s25fl512s Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 V.Mancev 09 Nov 26 Initial release
|
||||
V1.1 V.Mancev 11 July 11 Latest datasheet aligned
|
||||
V1.2 V.Mancev 11 Nov 17 Time tHO is changed to 1 ns
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>s25fl512s
|
||||
<FMFTIME>
|
||||
S25FL512SAGMFI010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV010_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV011_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV013_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for VCC=2.7V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (5.4:6.7:8) (5.4:6.7:8) (1) (5.4:6.7:8) (1) (5.4:6.7:8)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(200e3:340e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(100e3:150e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(200e6:400e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:103e9:460e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SAGMFI010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV010_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV011_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV013_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR11_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV210_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV213_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV310_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV313_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL10_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL13_R_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (4.3:6.0:7.65) (4.3:6.0:7.65) (1) (4.3:6.0:7.65) (1) (4.3:6.0:7.65)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(200e3:340e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(100e3:150e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(200e6:400e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:103e9:460e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SAGMFI010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFI013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFIR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV010_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV011_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFV013_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR11_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGMFVR13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHI313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHID13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV210_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV213_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV310_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHV313_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVA13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVB13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVC13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHVD13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIY13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIZ13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIS13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIT13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIK13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL10_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SAGBHIL13_R_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (4.5:5.5:6.5) (4.5:5.5:6.5) (1) (4.5:5.5:6.5) (1) (4.5:5.5:6.5)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (3))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (3))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (2))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (3))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (4.8))
|
||||
(WIDTH (COND dual (negedge SCK)) (4.8))
|
||||
(WIDTH (COND fast (negedge SCK)) (3.75))
|
||||
(WIDTH (COND fast (posedge SCK)) (3.75))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (6.25))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (6.25))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (7.52))
|
||||
(PERIOD (COND dual_rd SCK) (9.6))
|
||||
(PERIOD (COND quadpg SCK) (12.5))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(200e3:340e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(100e3:150e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(200e6:400e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:103e9:460e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SDPMFIR10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR11_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI210_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI213_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI310_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI313_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID10_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID13_F_30pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=30pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (1.5:8:14.5) (1.5:8:14.5) (1) (1.5:8:14.5) (1) (1.5:8:14.5)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (10:12:14) (10:12:14) (10:12:14) (10:12:14))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (4))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(200e3:340e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(100e3:150e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(200e6:400e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:103e9:460e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
<FMFTIME>
|
||||
S25FL512SDPMFIR10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR11_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPMFIR13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI210_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI213_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI310_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHI313_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHIC13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID10_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
S25FL512SDPBHID13_F_15pF<SOURCE> Spansion, FL-S_PPD_2.0 April 1, 2011 </SOURCE>
|
||||
<COMMENT>The values listed are for regulated Vcc range VCC=3.0V to 3.6V, CL=15pF,
|
||||
Industrial Ta=-40 to +85 Celsius</COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(COND normal (IOPATH SCK SO (2:7:12) (2:7:12) (1) (2:7:12) (1) (2:7:12)))
|
||||
(COND DDR (IOPATH SCK SO (1.5:4:6.5) (1.5:4:6.5) (1) (1.5:4:6.5) (1) (1.5:4:6.5)))
|
||||
(IOPATH CSNeg SO () () (5.4:6.7:8) () (5.4:6.7:8) ())
|
||||
(IOPATH HOLDNeg SO () () (10:12:14) (10:12:14) (10:12:14) (10:12:14))
|
||||
(IOPATH RSTNeg SO () () (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8) (5.4:6.7:8))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP (COND normal CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(SETUP (COND normal SI) (posedge SCK) (5))
|
||||
(SETUP WPNeg CSNeg (20))
|
||||
(SETUP HOLDNeg SCK (5))
|
||||
(SETUP RSTNeg CSNeg (50))
|
||||
(SETUP (COND DDR SI) (posedge SCK) (2))
|
||||
(SETUP (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(HOLD (COND normal CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND DDR CSNeg) (posedge SCK) (3))
|
||||
(HOLD (COND normal SI) (posedge SCK) (4))
|
||||
(HOLD WPNeg CSNeg (100))
|
||||
(HOLD HOLDNeg SCK (5))
|
||||
(HOLD CSNeg RSTNeg (35000))
|
||||
(HOLD (COND DDR SI) (posedge SCK) (2))
|
||||
(HOLD (COND DDR SI) (negedge SCK) (2))
|
||||
|
||||
(WIDTH (COND serial (posedge SCK)) (10))
|
||||
(WIDTH (COND serial (negedge SCK)) (10))
|
||||
(WIDTH (COND dual (posedge SCK)) (7.5))
|
||||
(WIDTH (COND dual (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (negedge SCK)) (7.5))
|
||||
(WIDTH (COND fast (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (posedge SCK)) (7.5))
|
||||
(WIDTH (COND quadpg (negedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (posedge SCK)) (7.5))
|
||||
(WIDTH (COND DDR (negedge SCK)) (7.5))
|
||||
(WIDTH (COND read (posedge CSNeg)) (10))
|
||||
(WIDTH (COND pgers (posedge CSNeg)) (50))
|
||||
(WIDTH (negedge RSTNeg) (200))
|
||||
(WIDTH (posedge RSTNeg) (50))
|
||||
(PERIOD (COND serial_rd SCK) (20))
|
||||
(PERIOD (COND fast_rd SCK) (15))
|
||||
(PERIOD (COND dual_rd SCK) (15))
|
||||
(PERIOD (COND quadpg SCK) (15))
|
||||
(PERIOD (COND DDR_rd SCK) (15))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PP) (DELAY (ABSOLUTE (DEVICE(200e3:340e3:750e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BP) (DELAY (ABSOLUTE (DEVICE(100e3:150e3:400e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/SE) (DELAY (ABSOLUTE (DEVICE(200e6:400e6:1875e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/BE) (DELAY (ABSOLUTE (DEVICE(55e9:103e9:460e9) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/WRR) (DELAY (ABSOLUTE(DEVICE(200e6:200e6:200e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PU) (DELAY (ABSOLUTE (DEVICE(300e3:300e3:300e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PRGSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/ERSSUSP) (DELAY (ABSOLUTE (DEVICE(40e3:40e3:40e3) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PPBERASE) (DELAY (ABSOLUTE (DEVICE(15e6:15e6:15e6) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSULCK) (DELAY (ABSOLUTE (DEVICE(1000:1000:1000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE %LABEL%/PASSACC) (DELAY (ABSOLUTE (DEVICE(100e3:100e3:100e3) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,10 @@
|
||||
SET sdffile_suffix .sdf
|
||||
SET use_global_timing_dir false
|
||||
SET timingfile_dir /user/USERNAME/CreateSDF
|
||||
SET timingfile_suffix .ftm
|
||||
SET time_scale 1ns
|
||||
SET local_path .
|
||||
SET vendor MODELSIM_HOME
|
||||
SET diagnostics on
|
||||
SET vhdl_file testbench.vhd
|
||||
SET lwb false
|
||||
@@ -0,0 +1,462 @@
|
||||
#!/usr/local/bin/perl
|
||||
#
|
||||
# mk_sdf : Perl replacement for C mk_sdf
|
||||
#
|
||||
# Copyright (C) 2000, 1999 Free Model Foundry; http:/vhdl.org/fmf/
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License version 2 as
|
||||
# published by the Free Software Foundation.
|
||||
#
|
||||
# Author : R. Munden
|
||||
# Date : 20001115
|
||||
# Version : 2.0.4
|
||||
#
|
||||
# Revision history:
|
||||
# 2.0: 19990702
|
||||
# o Intial release of perl version
|
||||
# 2.0.1: 19990722
|
||||
# o fixed problem with . in path for TimingModels
|
||||
# 2.0.2: 20000616
|
||||
# o changed instance search to work with Mentor
|
||||
# 2.0.3: 20001115
|
||||
# o changed to parse ":" without leading space
|
||||
# o fixed problem with . in path for TimingModels again
|
||||
# 2.0.4: 20030405
|
||||
# o chaged SDF version to 3.0
|
||||
#
|
||||
#################################################################
|
||||
#
|
||||
# command line arguments:
|
||||
|
||||
# ARGV[0] - name of VHDL netlist
|
||||
|
||||
# global variables:
|
||||
|
||||
# %component_list - list of instance names by component name
|
||||
# %instance_isin - list architectures by instances contained therein
|
||||
# %instance_comp - list of component names by instance name
|
||||
# %comp_lib - library each component (by name) is configured to
|
||||
# @instance_list - array of all instance names in design in order found
|
||||
|
||||
$version = "2.0.4";
|
||||
$design_name = '';
|
||||
$timing_dir = '';
|
||||
$diags = "off";
|
||||
|
||||
%keywords = (architecture => 1,
|
||||
component => 1,
|
||||
timingmodel => 1);
|
||||
|
||||
# INPUT files
|
||||
$CMD = "mk_sdf.cmd";
|
||||
$VHD = ''; # name of VHDL netlist
|
||||
|
||||
# OUTPUT files
|
||||
$RFV = "/tmp/short.vhd"; # reformatted VHDL
|
||||
$sdf_file = ''; # name of SDF file
|
||||
|
||||
&read_cmd_file;
|
||||
&get_names;
|
||||
&reformat;
|
||||
|
||||
open INPUT, $RFV;
|
||||
@lines = <INPUT>;
|
||||
close INPUT;
|
||||
|
||||
$current_architecture = "";
|
||||
|
||||
foreach $line (@lines)
|
||||
{
|
||||
@words = split / /, $line;
|
||||
foreach $word (@words)
|
||||
{
|
||||
$keywords{$word} == "1" and do { &$word(@words);};
|
||||
if ($component_list{$word})
|
||||
{
|
||||
$line =~ /(.+) : $word/ and do {
|
||||
if ($1 !~ /for/) { # instantiation found
|
||||
$component_list{$word} = $component_list{$word} . $1;
|
||||
push (@instance_list, $1);
|
||||
$instance_name = $1;
|
||||
}
|
||||
};
|
||||
$instance_comp{$1} = $word;
|
||||
$instance_isin{$1} = $current_architecture;
|
||||
if ( $diags ne off ) {
|
||||
print "reading instance $instance_name: $word in $current_architecture\n";
|
||||
}
|
||||
$line =~ /for all : $word use entity (.+)/ and do
|
||||
{
|
||||
@config = split(/\./, $1);
|
||||
$comp_lib{$word} = $config[0];};
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "finished with netlist\n\n";
|
||||
}
|
||||
|
||||
&begin_sdf;
|
||||
&build_paths;
|
||||
&close_sdf;
|
||||
`rm $RFV`;
|
||||
|
||||
print "$time\n";
|
||||
|
||||
sub architecture
|
||||
{
|
||||
$current_architecture = $_[3];
|
||||
push (@architectures, $current_architecture);
|
||||
}
|
||||
|
||||
sub component
|
||||
{
|
||||
if ($_[0] ne "end")
|
||||
{
|
||||
$name = $_[1];
|
||||
$arch_list{$current_architecture} =
|
||||
$arch_list{$current_architecture} . " " . $name;
|
||||
unless ($component_list{$name}) { $component_list{$name} = " ";}
|
||||
}
|
||||
}
|
||||
|
||||
sub timingmodel
|
||||
{
|
||||
$line =~ /timingmodel => \"(.+)\"/ and do {
|
||||
$model = $1;
|
||||
$model_name{$instance_name} = $model;
|
||||
};
|
||||
}
|
||||
|
||||
sub begin_sdf
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "writing SDF boilerplate\n";
|
||||
}
|
||||
$time = localtime;
|
||||
if (open(SDF, ">$sdf_file") !=1) { die "can't open $sdf_file\n";}
|
||||
print "Opening $sdf_file\n";
|
||||
print SDF "(DELAYFILE\n";
|
||||
print SDF " (SDFVERSION \"3.0\")\n";
|
||||
print SDF " (DESIGN \"$design_name\")\n";
|
||||
print SDF " (DATE \"$time\")\n";
|
||||
print SDF " (VENDOR \"Free Model Foundry\")\n";
|
||||
print SDF " (PROGRAM \"SDF timing utility(tm)\")\n";
|
||||
print SDF " (VERSION \"$version\")\n";
|
||||
print SDF " (DIVIDER /)\n";
|
||||
print SDF " (VOLTAGE)\n";
|
||||
print SDF " (PROCESS)\n";
|
||||
print SDF " (TEMPERATURE)\n";
|
||||
print SDF " (TIMESCALE 1ns)\n";
|
||||
}
|
||||
|
||||
sub build_paths
|
||||
{
|
||||
foreach $instance_list (@instance_list)
|
||||
{
|
||||
@instance = $instance_list;
|
||||
foreach $instance (@instance)
|
||||
{
|
||||
if ( $diags ne off ) {
|
||||
print "working on $instance\n";
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
$timing_file =~ s/\s//;
|
||||
if ( $diags ne off ) {
|
||||
print "$instance should be in $timing_file\n";
|
||||
}
|
||||
if (-e $timing_file) {
|
||||
if ($model_name{$instance} ne "") {
|
||||
print SDF " (CELL\n";
|
||||
print SDF " (CELLTYPE \"$instance_comp{$instance}\")\n";
|
||||
$inst = $instance;
|
||||
$full_inst = $instance;
|
||||
while ($component_list{$instance_isin{$inst}}) {
|
||||
$full_inst = "$component_list{$instance_isin{$inst}}/$full_inst";
|
||||
$full_inst =~ s/\s+//;
|
||||
$inst = $component_list{$instance_isin{$inst}};
|
||||
$inst =~ s/\s+//;
|
||||
# print SDF " (INSTANCE $component_list{$instance_isin{$instance}}/$instance)\n";
|
||||
}
|
||||
print SDF " (INSTANCE $full_inst)\n";
|
||||
&add_timing;
|
||||
}
|
||||
} else {
|
||||
if ( $diags ne off ) {
|
||||
print "$timing_file not found!\n";
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
sub add_timing
|
||||
{
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
# unless ($lib_path{$comp_lib{$instance_comp{$instance}}})
|
||||
unless ($timing_file)
|
||||
{
|
||||
print "path to $timing_file not found\n";
|
||||
exit;
|
||||
}
|
||||
if ($gtd =~ /true/i) {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
# $path = "$lib_path{$comp_lib{$instance_comp{$instance}}}./$timing_dir";
|
||||
} else {
|
||||
$path = "$lib_path{$comp_lib{$instance_comp{$instance}}}/$timing_dir";
|
||||
}
|
||||
$timing_file = "$path/$instance_comp{$instance}_vhd.ftm";
|
||||
if (open(TF, "<$timing_file") !=1) { warn "can't open $timing_file\n"; }
|
||||
if ( $diags ne off ) {
|
||||
print "reading $timing_file\n";
|
||||
}
|
||||
$section_found = "false";
|
||||
while (<TF>)
|
||||
{
|
||||
next unless (/$model_name{$instance}/i || ($part_found eq "true"));
|
||||
$part_found = "true";
|
||||
if ( $diags ne off ) {
|
||||
print "found entry for $model_name{$instance}\n";
|
||||
}
|
||||
next unless (/<timing>/i || ($timing_found eq "true"));
|
||||
$timing_found = "true";
|
||||
next if (/<timing>/i);
|
||||
if (/<\/timing>/i)
|
||||
{
|
||||
print SDF " )\n";
|
||||
$timing_found = "false";
|
||||
$part_found = "false";
|
||||
$section_found = "true";
|
||||
last;
|
||||
} else {
|
||||
if (/%LABEL%/)
|
||||
{
|
||||
if ($component_list{$instance_isin{$instance}})
|
||||
{
|
||||
$_ =~ s/%LABEL%/$component_list{$instance_isin{$instance}}\/$instance/;
|
||||
} else {
|
||||
$_ =~ s/%LABEL%/$instance/;
|
||||
}
|
||||
}
|
||||
print SDF $_;
|
||||
}
|
||||
}
|
||||
unless ($section_found eq "true") {
|
||||
print "$model_name not found\n";
|
||||
}
|
||||
}
|
||||
|
||||
sub close_sdf
|
||||
{
|
||||
print SDF ")\n";
|
||||
print "closing $sdf_file\n";
|
||||
close(SDF);
|
||||
}
|
||||
|
||||
# read mk_sdf.cmd
|
||||
|
||||
sub read_cmd_file {
|
||||
|
||||
if (open(CMD, $CMD) !=1) { die "can't open $CMD\n"; }
|
||||
while (<CMD>) {
|
||||
chop;
|
||||
@fields = '';
|
||||
@fields = split;
|
||||
unless ($fields[0] =~ /#/) {
|
||||
if ($fields[0] =~ /SET/) {
|
||||
if ($fields[1] =~ /vhdl_file/) {$VHD = $fields[2]}
|
||||
if ($fields[1] =~ /sdffile_suffix/) {$suffix = $fields[2]}
|
||||
if ($fields[1] =~ /use_global_timing_dir/) {$gtd = $fields[2]}
|
||||
if ($fields[1] =~ /timingfile_dir/) {$timing_dir = $fields[2]}
|
||||
if ($fields[1] =~ /vendor/) {$vendor = $fields[2]}
|
||||
if ($fields[1] =~ /diagnostics/) {$diags = $fields[2]}
|
||||
}
|
||||
}
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "\nmk_sdf diagnostics on\n\n";
|
||||
print "vhdl_file $VHD\n";
|
||||
print "sdffile_suffix $suffix\n";
|
||||
print "use_global_timing_dir $gtd\n";
|
||||
print "timingfile_dir $timing_dir\n";
|
||||
print "vendor $vendor\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
|
||||
# get name of netlist
|
||||
|
||||
sub get_names
|
||||
{
|
||||
|
||||
if ($ARGV[0] ne "") { $VHD = "$ARGV[0]"; }
|
||||
|
||||
if ($ARGV[1] eq "")
|
||||
{
|
||||
@name = split(/\./,$VHD);
|
||||
$design_name = $name[0];
|
||||
} else {
|
||||
$design_name = "$ARGV[1]";
|
||||
}
|
||||
$sdf_file = $design_name . $suffix;
|
||||
if ($gtd =~ /false/i)
|
||||
{
|
||||
if ($vendor =~ /modeltech/i) { &read_mti; }
|
||||
if ($vendor =~ /cadence/i) { &read_cds; }
|
||||
}
|
||||
if ( $diags ne off ) {
|
||||
print "design name is $design_name\n\n";
|
||||
}
|
||||
}
|
||||
#
|
||||
################################################################
|
||||
#
|
||||
|
||||
# reformat netlist
|
||||
|
||||
sub reformat
|
||||
{
|
||||
$entfound = false;
|
||||
|
||||
if (open(VHD, $VHD) !=1) { die "can't open $VHD\n"; }
|
||||
if (open(OUT, ">$RFV") !=1) { die "can't open $OUT\n"; }
|
||||
|
||||
while (<VHD>) {
|
||||
if (/^--|library|package/i) { next }
|
||||
if (/--/) { # strip embeded comments
|
||||
@line = split("--");
|
||||
$_ = $line[0];
|
||||
}
|
||||
s/:/ : /g;
|
||||
s/;/ ;/g;
|
||||
s/\s+/ /g; # reduces spaces and tabs
|
||||
s/^\s//g; # no leading spaces
|
||||
if (/entity/i) {
|
||||
$entfound = "true";
|
||||
}
|
||||
chomp;
|
||||
if ( $entfound eq true ) {
|
||||
print OUT lc($_);
|
||||
if (/;|is|begin/i) { print OUT "\n"; }
|
||||
}
|
||||
}
|
||||
|
||||
close OUT;
|
||||
if ( $diags ne off ) {
|
||||
print "reformatted netlist written to $RFV\n\n";
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
# read ModelTech's modelsim.ini file
|
||||
|
||||
sub read_mti
|
||||
{
|
||||
$lib_found = "false";
|
||||
if ($ENV{MODELPATH})
|
||||
{
|
||||
$ini_file = "$ENV{MODELPATH}/../modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$MODELPATH environment variable not found\n";
|
||||
}
|
||||
$lib_found = "false";
|
||||
if (-e "modelsim.ini")
|
||||
{
|
||||
$ini_file = "modelsim.ini";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
if ($lib_found eq "true")
|
||||
{
|
||||
chomp;
|
||||
if (/\[.+\]/) { last; }
|
||||
s/\s+//;
|
||||
@lib_line = split(/=/);
|
||||
$lib_line[1] =~ s/\/work//;
|
||||
$lib_path{$lib_line[0]} = $lib_line[1];
|
||||
} elsif (/\[Library\]/i)
|
||||
{
|
||||
$lib_found = "true";
|
||||
next;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local modelsim.ini file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
|
||||
# read Cadence's cds.lib file
|
||||
|
||||
sub read_cds
|
||||
{
|
||||
if ($ENV{CDS_VHDL})
|
||||
{
|
||||
$ini_file = "$ENV{CDS_VHDL}/files/cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "\$CDS_VHDL environment variable not found\n";
|
||||
}
|
||||
if (-e "cds.lib")
|
||||
{
|
||||
$ini_file = "cds.lib";
|
||||
if (open(INI, "$ini_file") !=1) { die "can't open $ini_file\n";}
|
||||
if ( $diags ne off ) {
|
||||
print "reading $ini_file\n\n";
|
||||
}
|
||||
while (<INI>)
|
||||
{
|
||||
chomp;
|
||||
s/\s+/ /;
|
||||
if (/define/i)
|
||||
{
|
||||
@lib_line = split;
|
||||
$lib_path{$lib_line[1]} = $lib_line[2];
|
||||
}
|
||||
}
|
||||
} else {
|
||||
print "local cds.lib file not found, may not be needed\n";
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,205 @@
|
||||
<!DOCTYPE FTML SYSTEM "ftml.dtd">
|
||||
<FTML><HEAD><TITLE>FMF Timing for testbench Parts</TITLE>
|
||||
<BODY>
|
||||
<REVISION.HISTORY>
|
||||
version: | author: | mod date: | changes made:
|
||||
V1.0 VHD2FTM 03 July 11 Initial release
|
||||
</REVISION.HISTORY>
|
||||
<TIMESCALE>1ns</TIMESCALE>
|
||||
<MODEL>am29lv640m
|
||||
<FMFTIME>
|
||||
MY_MEM<SOURCE></SOURCE>
|
||||
AM29LV640MH90R<SOURCE></SOURCE>
|
||||
AM29LV640ML90R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH101<SOURCE></SOURCE>
|
||||
AM29LV640ML101<SOURCE></SOURCE>
|
||||
AM29LV640MH101R<SOURCE></SOURCE>
|
||||
AM29LV640ML101R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (100:100:100) (100:100:100))
|
||||
(IOPATH A0 DQ1 (30:30:30) (30:30:30))
|
||||
(IOPATH CENeg DQ0 (95:95:95) (95:95:95) (11:11:11) (95:95:95) (11:11:11) (95:95:95))
|
||||
(IOPATH OENeg DQ0 (25:25:25) (25:25:25) (11:11:11) (25:25:25) (11:11:11) (25:25:25))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (100))
|
||||
(IOPATH WENeg RY (0) (100))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (100:100:100))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH112<SOURCE></SOURCE>
|
||||
AM29LV640ML112<SOURCE></SOURCE>
|
||||
AM29LV640MH112R<SOURCE></SOURCE>
|
||||
AM29LV640ML112R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (110:110:110) (110:110:110))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (105:105:105) (105:105:105) (11:11:11) (105:105:105) (11:11:11) (105:105:105))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (110))
|
||||
(IOPATH WENeg RY (0) (110))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (110:110:110))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
<FMFTIME>
|
||||
AM29LV640MH120<SOURCE></SOURCE>
|
||||
AM29LV640ML120<SOURCE></SOURCE>
|
||||
AM29LV640MH120R<SOURCE></SOURCE>
|
||||
AM29LV640ML120R<SOURCE></SOURCE>
|
||||
<COMMENT></COMMENT>
|
||||
<TIMING>
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (120:120:120) (120:120:120))
|
||||
(IOPATH A0 DQ1 (40:40:40) (40:40:40))
|
||||
(IOPATH CENeg DQ0 (115:115:115) (115:115:115) (11:11:11) (115:115:115) (11:11:11) (115:115:115))
|
||||
(IOPATH OENeg DQ0 (35:35:35) (35:35:35) (11:11:11) (35:35:35) (11:11:11) (35:35:35))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (120))
|
||||
(IOPATH WENeg RY (0) (120))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (120:120:120))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
</TIMING></FMFTIME>
|
||||
</BODY></FTML>
|
||||
@@ -0,0 +1,58 @@
|
||||
(DELAYFILE
|
||||
(SDFVERSION "3.0")
|
||||
(DESIGN "testbench")
|
||||
(DATE "Wed Jan 28 15:15:41 2004")
|
||||
(VENDOR "Free Model Foundry")
|
||||
(PROGRAM "SDF timing utility(tm)")
|
||||
(VERSION "2.0.4")
|
||||
(DIVIDER /)
|
||||
(VOLTAGE)
|
||||
(PROCESS)
|
||||
(TEMPERATURE)
|
||||
(TIMESCALE 1ns)
|
||||
(CELL
|
||||
(CELLTYPE "my_mem")
|
||||
(INSTANCE dut)
|
||||
(DELAY (ABSOLUTE
|
||||
(IOPATH A0 DQ0 (90:90:90) (90:90:90))
|
||||
(IOPATH A0 DQ1 (25:25:25) (25:25:25))
|
||||
(IOPATH CENeg DQ0 (85:85:85) (85:85:85) (11:11:11) (85:85:85) (11:11:11) (85:85:85))
|
||||
(IOPATH OENeg DQ0 (20:20:20) (20:20:20) (11:11:11) (20:20:20) (11:11:11) (20:20:20))
|
||||
(IOPATH RESETNeg DQ0 () () (0:0:0) () (0:0:0) ())
|
||||
(IOPATH CENeg RY (0) (90))
|
||||
(IOPATH WENeg RY (0) (90))
|
||||
))
|
||||
(TIMINGCHECK
|
||||
(SETUP A0 CENeg (0:0:0))
|
||||
(SETUP A0 OENeg (15:15:15))
|
||||
(SETUP DQ0 CENeg (45:45:45))
|
||||
(HOLD CENeg RESETNeg (50:50:50))
|
||||
(HOLD OENeg WENeg (0:0:0))
|
||||
(HOLD A0 CENeg (45:45:45))
|
||||
(HOLD A0 OENeg (0:0:0))
|
||||
(HOLD DQ0 CENeg (0:0:0))
|
||||
(HOLD WENeg OENeg (0:0:0))
|
||||
(WIDTH (negedge RESETNeg) (500:500:500))
|
||||
(WIDTH (posedge OENeg) (20:20:20))
|
||||
(WIDTH (negedge WENeg) (35:35:35))
|
||||
(WIDTH (posedge WENeg) (30:30:30))
|
||||
(WIDTH (negedge CENeg) (45:45:45))
|
||||
(WIDTH (posedge CENeg) (30:30:30))
|
||||
(WIDTH (negedge A0) (90:90:90))
|
||||
))
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/WBPB) (DELAY (ABSOLUTE (DEVICE(11000:11000:11000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/POB) (DELAY (ABSOLUTE (DEVICE(100000:100000:100000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/SEO) (DELAY (ABSOLUTE (DEVICE(500000000:500000000:500000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/HANG) (DELAY (ABSOLUTE (DEVICE(400000000:400000000:400000000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/START_T1) (DELAY (ABSOLUTE (DEVICE(5000:5000:20000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/CTMOUT) (DELAY (ABSOLUTE (DEVICE(50000:50000:50000) ) ) ) )
|
||||
(CELL (CELLTYPE "VITALbuf")
|
||||
(INSTANCE dut/READY) (DELAY (ABSOLUTE (DEVICE(20000:20000:20000) ) ) )
|
||||
)
|
||||
)
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,144 @@
|
||||
--------------------------------------------------------------------------------
|
||||
-- File name: gen_utils.vhd
|
||||
--------------------------------------------------------------------------------
|
||||
-- Copyright (C) 1996, 1998, 2001 Free Model Foundry; http://eda.org/fmf/
|
||||
--
|
||||
-- This program is free software; you can redistribute it and/or modify
|
||||
-- it under the terms of the GNU General Public License version 2 as
|
||||
-- published by the Free Software Foundation.
|
||||
--
|
||||
-- MODIFICATION HISTORY:
|
||||
--
|
||||
-- version: | author: | mod date: | changes made:
|
||||
-- V1.0 R. Steele 96 SEP 26 Initial release
|
||||
-- V1.1 REV3 97 Feb 27 Added Xon and MsgOn generics
|
||||
-- V1.2 R. Steele 97 APR 16 Changed wired-or to wired-and
|
||||
-- V1.3 R. Steele 97 APR 16 Added diff. receiver table
|
||||
-- V1.4 R. Munden 98 APR 13 Added GenParity and CheckParity
|
||||
-- V1.5 R. Munden 01 NOV 24 Added UnitDelay01ZX
|
||||
--
|
||||
--------------------------------------------------------------------------------
|
||||
LIBRARY IEEE; USE IEEE.std_Logic_1164.ALL;
|
||||
USE IEEE.VITAL_primitives.ALL;
|
||||
USE IEEE.VITAL_timing.ALL;
|
||||
|
||||
PACKAGE gen_utils IS
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Result map for Wired-and output values (open collector)
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT STD_wired_and_rmap : VitalResultMapType := ('U','X','0','Z');
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Table for computing a single signal from a differential receiver input
|
||||
-- pair.
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT diff_rec_tab : VitalStateTableType := (
|
||||
|
||||
------INPUTS--|-PREV-|-OUTPUT----
|
||||
-- A ANeg | Aint | Aint' --
|
||||
--------------|------|-----------
|
||||
( 'X', '-', '-', 'X'), -- A unknown
|
||||
( '-', 'X', '-', 'X'), -- A unknown
|
||||
( '1', '-', 'X', '1'), -- Recover from 'X'
|
||||
( '0', '-', 'X', '0'), -- Recover from 'X'
|
||||
( '/', '0', '0', '1'), -- valid diff. rising edge
|
||||
( '1', '\', '0', '1'), -- valid diff. rising edge
|
||||
( '\', '1', '1', '0'), -- valid diff. falling edge
|
||||
( '0', '/', '1', '0'), -- valid diff. falling edge
|
||||
( '-', '-', '-', 'S') -- default
|
||||
); -- end of VitalStateTableType definition
|
||||
|
||||
|
||||
----------------------------------------------------------------------------
|
||||
-- Default Constants
|
||||
----------------------------------------------------------------------------
|
||||
CONSTANT UnitDelay : VitalDelayType := 1 ns;
|
||||
CONSTANT UnitDelay01 : VitalDelayType01 := (1 ns, 1 ns);
|
||||
CONSTANT UnitDelay01Z : VitalDelayType01Z := (others => 1 ns);
|
||||
CONSTANT UnitDelay01ZX : VitalDelayType01ZX := (others => 1 ns);
|
||||
|
||||
CONSTANT DefaultInstancePath : STRING := "*";
|
||||
CONSTANT DefaultTimingChecks : BOOLEAN := FALSE;
|
||||
CONSTANT DefaultTimingModel : STRING := "UNIT";
|
||||
CONSTANT DefaultXon : BOOLEAN := TRUE;
|
||||
CONSTANT DefaultMsgOn : BOOLEAN := TRUE;
|
||||
|
||||
-- Older VITAL generic being phased out
|
||||
CONSTANT DefaultXGeneration : BOOLEAN := TRUE;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic; -- '0' - Parity Error
|
||||
|
||||
END gen_utils;
|
||||
|
||||
PACKAGE BODY gen_utils IS
|
||||
|
||||
function XOR_REDUCE(ARG: STD_LOGIC_VECTOR) return UX01 is
|
||||
-- pragma subpgm_id 403
|
||||
variable result: STD_LOGIC;
|
||||
begin
|
||||
result := '0';
|
||||
for i in ARG'range loop
|
||||
result := result xor ARG(i);
|
||||
end loop;
|
||||
return result;
|
||||
end;
|
||||
-------------------------------------------------------------------
|
||||
-- Generate Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION GenParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic_vector
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic_vector (Data'Length - 1 DOWNTO 0);
|
||||
BEGIN
|
||||
I := 0;
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result(I+7 DOWNTO I) := Data(I+7 downto I);
|
||||
Result(I+8) := XOR_REDUCE( Data(I+7 downto I) ) XOR ODDEVEN;
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END GenParity;
|
||||
|
||||
-------------------------------------------------------------------
|
||||
-- Check Parity for each 8-bit in 9th bit
|
||||
-------------------------------------------------------------------
|
||||
FUNCTION CheckParity
|
||||
(Data : in std_logic_vector; -- Data
|
||||
ODDEVEN : in std_logic; -- ODD (1) / EVEN(0)
|
||||
SIZE : in POSITIVE) -- Bit Size
|
||||
RETURN std_logic -- '0' - Parity Error
|
||||
IS
|
||||
VARIABLE I: NATURAL;
|
||||
VARIABLE Result: std_logic;
|
||||
BEGIN
|
||||
I := 0; Result := '1';
|
||||
WHILE (I < SIZE) LOOP
|
||||
Result := Result AND
|
||||
NOT (XOR_REDUCE( Data(I+8 downto I) ) XOR ODDEVEN);
|
||||
I := I + 9;
|
||||
END LOOP;
|
||||
RETURN Result;
|
||||
END CheckParity;
|
||||
|
||||
END gen_utils;
|
||||
@@ -0,0 +1,47 @@
|
||||
# Micron Technology, Inc. (FILE DUMP / MEMORY DUMP)
|
||||
# BA ROWS COLS DQ
|
||||
# -- ------------- --------- ----------------
|
||||
00 0000000000000 000000000 0000000001100100
|
||||
00 0000000000000 000000001 0000000001100101
|
||||
00 0000000000000 000000010 0000000001100110
|
||||
00 0000000000000 000000011 0000000001100111
|
||||
00 0000000000000 000000100 0000000001101000
|
||||
00 0000000000000 000000101 0000000001101001
|
||||
00 0000000000000 000000110 0000000001101010
|
||||
00 0000000000000 000000111 0000000001101011
|
||||
00 0000000000000 000001000 0011111111111110
|
||||
00 0000000000000 000001001 0011111111111110
|
||||
00 0000000000000 000001010 0011111111111110
|
||||
01 0000000000000 000000000 0000000011001000
|
||||
01 0000000000000 000000001 0000000011001001
|
||||
01 0000000000000 000000010 0000000011001010
|
||||
01 0000000000000 000000011 0000000011001011
|
||||
01 0000000000000 000000100 0000000011001100
|
||||
01 0000000000000 000000101 0000000011001101
|
||||
01 0000000000000 000000110 0000000011001110
|
||||
01 0000000000000 000000111 0000000011001111
|
||||
01 0000000000000 000001000 0111111111111101
|
||||
01 0000000000000 000001001 0111111111111101
|
||||
01 0000000000000 000001010 0111111111111101
|
||||
10 0000000000000 000000000 0000000100101100
|
||||
10 0000000000000 000000001 0000000100101101
|
||||
10 0000000000000 000000010 0000000100101110
|
||||
10 0000000000000 000000011 0000000100101111
|
||||
10 0000000000000 000000100 0000000100110000
|
||||
10 0000000000000 000000101 0000000100110001
|
||||
10 0000000000000 000000110 0000000100110010
|
||||
10 0000000000000 000000111 0000000100110011
|
||||
10 0000000000000 000001000 1011111111111011
|
||||
10 0000000000000 000001001 1011111111111011
|
||||
10 0000000000000 000001010 1011111111111011
|
||||
11 0000000000000 000000000 0000000110010000
|
||||
11 0000000000000 000000001 0000000110010001
|
||||
11 0000000000000 000000010 0000000110010010
|
||||
11 0000000000000 000000011 0000000110010011
|
||||
11 0000000000000 000000100 0000000110010100
|
||||
11 0000000000000 000000101 0000000110010101
|
||||
11 0000000000000 000000110 0000000110010110
|
||||
11 0000000000000 000000111 0000000110010111
|
||||
11 0000000000000 000001000 1111111111110111
|
||||
11 0000000000000 000001001 1111111111110111
|
||||
11 0000000000000 000001010 1111111111110111
|
||||
@@ -0,0 +1,349 @@
|
||||
---------------------------------------------------------------------------------
|
||||
--COMMAND FORMAT --
|
||||
-- --
|
||||
-- write(column address(integer), bank(bit_vector), first data(integer), dqm(bit), cke(bit));--
|
||||
-- read(column address(integer), bank(bit_vector), dqm(bit), cke(bit)); --
|
||||
-- active(row address(integer), bank(bit_vector), data bus (integer), dqm(bit), cke(bit));--
|
||||
-- precharge(bank(bit_vector), address (integer), data bus(integer), dqm(bit), cke(bit)); --
|
||||
-- nop(data bus(integer), dqm(bit), cke(bit), cs(bit)); --
|
||||
-- burst_term(data bus(integer), dqm(bit_vector), cke(bit)); --
|
||||
-- load_array('1'); --
|
||||
-- load_mode_reg(register(integer), cke(bit)); --
|
||||
-- next_cycle(clk); This is used after every command(incl. nop) to clock --
|
||||
-- at the correct clock frequency entered in the clock --
|
||||
-- period constant below --
|
||||
-- unload_array(row_start(integer), row_end(integer), bank(bit_vector)) --
|
||||
-- load_mode_reg(op_code(integer)) --
|
||||
-- --
|
||||
---------------------------------------------------------------------------------
|
||||
|
||||
LIBRARY work;
|
||||
LIBRARY ieee;
|
||||
USE ieee.std_logic_1164.all;
|
||||
USE std.textio.all;
|
||||
USE work.generate_vectors.all;
|
||||
|
||||
ENTITY vector_generate IS
|
||||
END vector_generate;
|
||||
|
||||
ARCHITECTURE vector_generate OF vector_generate IS
|
||||
|
||||
SIGNAL stim_done : BOOLEAN := FALSE;
|
||||
SIGNAL clk : BIT := '0';
|
||||
CONSTANT clk_start : time := 15 ns;
|
||||
CONSTANT clk_period : time := 10 ns;
|
||||
CONSTANT Z : INTEGER := -100;
|
||||
|
||||
BEGIN
|
||||
|
||||
PROCESS
|
||||
|
||||
BEGIN
|
||||
|
||||
WAIT UNTIL clk = '1' AND clk'EVENT;
|
||||
|
||||
--------------------ENTER COMMANDS BELOW THIS LINE-----------------------------
|
||||
--******************DO NOT USE -100 FOR A DQ VALUE*************************----
|
||||
--*******************Z WILL PLACE HI-Z ON THE BUS**************************----
|
||||
--*******USE next_cycle(clk) FOR ADVANCING TO NEXT CLOCK CYCLE*************----
|
||||
|
||||
nop(Z, "00", '1', '1'); --Always begin with one nop when using Micron's testbench
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
load_array;
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("00", 1024, Z, "00", '1');
|
||||
|
||||
FOR i IN 1 to 2 LOOP
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
END LOOP;
|
||||
|
||||
next_cycle(clk);
|
||||
auto_refresh;
|
||||
|
||||
FOR i IN 1 TO 8 LOOP
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
END LOOP;
|
||||
|
||||
next_cycle(clk);
|
||||
auto_refresh;
|
||||
|
||||
FOR i IN 1 TO 8 LOOP
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
END LOOP;
|
||||
|
||||
next_cycle(clk);
|
||||
load_mode_reg(51, '1'); -- 19 / 35 / 51 -> lat=3,bl=8,mode=seq
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
-- Write Section
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "00", Z, "00", '1'); -- Activate Bank 0
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk); -- Write Bank 0
|
||||
write(0, "00", 100, "00", '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(101, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "01", 102, "00", '1'); -- Activate Bank 1
|
||||
|
||||
next_cycle(clk);
|
||||
nop(103, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(104, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(105, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(106, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(107, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
write(0, "01", 200, "00", '1'); -- Write Bank 1
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("00", 0, 201, "00", '1'); -- Precharge Bank 0
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "10", 202, "00", '1'); -- Activate Bank 2
|
||||
|
||||
next_cycle(clk);
|
||||
nop(203, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(204, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(205, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(206, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(207, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
write(0, "10", 300, "00", '1'); -- Write Bank 2
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("01", 0, 301, "00", '1'); -- Precharge Bank 1
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "11", 302, "00", '1'); -- Activate Bank 3
|
||||
|
||||
next_cycle(clk);
|
||||
nop(303, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(304, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(305, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(306, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(307, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
write(0, "11", 400, "00", '1'); -- Write Bank 3
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("10", 0, 401, "00", '1'); -- Precharge Bank 2
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "00", 402, "00", '1'); -- Activate Bank 0
|
||||
|
||||
next_cycle(clk);
|
||||
nop(403, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(404, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(405, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(406, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(407, "00", '1', '1');
|
||||
|
||||
-- Read Section
|
||||
|
||||
next_cycle(clk);
|
||||
read(0, "00", "00", '1'); -- Read Bank 0
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("11", 0, Z, "00", '1'); -- Precharge Bank 3
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "01", Z, "00", '1'); -- Activate Bank 1
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
read(0, "01", "00", '1'); -- Read Bank 1
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("00", 0, Z, "00", '1'); -- Precharge Bank 0
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "10", Z, "00", '1'); -- Activate Bank 2
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
read(0, "10", "00", '1'); -- Read Bank 2
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("01", 0, Z, "00", '1'); -- Precharge Bank 1
|
||||
|
||||
next_cycle(clk);
|
||||
active(0, "11", Z, "00", '1'); -- Activate Bank 3
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
read(0, "11", "00", '1'); -- Read Bank 3
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("10", 0, Z, "00", '1'); -- Precharge Bank 2
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
precharge("11", 0, Z, "00", '1'); -- Precharge Bank 3
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
next_cycle(clk);
|
||||
unload_array;
|
||||
|
||||
next_cycle(clk);
|
||||
nop(Z, "00", '1', '1');
|
||||
|
||||
stim_done <= TRUE; --always include this line at the end of your stimulus
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
--*************************************************************************----
|
||||
END PROCESS;
|
||||
|
||||
|
||||
clock:
|
||||
PROCESS
|
||||
VARIABLE done_time : time;
|
||||
VARIABLE cycle_var : integer := 0;
|
||||
BEGIN
|
||||
cycle <= 0;
|
||||
clk <= '0';
|
||||
WAIT for clk_start;
|
||||
WHILE not stim_done loop
|
||||
clk <= '1';
|
||||
cycle <= cycle_var;
|
||||
WAIT for clk_period/2;
|
||||
cycle_var := cycle_var + 1;
|
||||
clk <= '0';
|
||||
WAIT for clk_period/2;
|
||||
END LOOP;
|
||||
|
||||
ASSERT (FALSE)
|
||||
REPORT "Test Vectors Generated"
|
||||
SEVERITY note;
|
||||
|
||||
WAIT;
|
||||
END PROCESS;
|
||||
|
||||
|
||||
END;
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user